TW327218B - Memory card and method of error correction for the memory card - Google Patents

Memory card and method of error correction for the memory card

Info

Publication number
TW327218B
TW327218B TW085112607A TW85112607A TW327218B TW 327218 B TW327218 B TW 327218B TW 085112607 A TW085112607 A TW 085112607A TW 85112607 A TW85112607 A TW 85112607A TW 327218 B TW327218 B TW 327218B
Authority
TW
Taiwan
Prior art keywords
memory card
error correction
data
eccs
memory device
Prior art date
Application number
TW085112607A
Other languages
English (en)
Inventor
Yoshimasa Yoshimura
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Application granted granted Critical
Publication of TW327218B publication Critical patent/TW327218B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Detection And Correction Of Errors (AREA)
TW085112607A 1996-06-10 1996-10-15 Memory card and method of error correction for the memory card TW327218B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8147177A JPH09330273A (ja) 1996-06-10 1996-06-10 メモリカードおよびメモリカードにおける誤り訂正方法

Publications (1)

Publication Number Publication Date
TW327218B true TW327218B (en) 1998-02-21

Family

ID=15424331

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085112607A TW327218B (en) 1996-06-10 1996-10-15 Memory card and method of error correction for the memory card

Country Status (4)

Country Link
US (1) US5848076A (zh)
JP (1) JPH09330273A (zh)
DE (1) DE19700510A1 (zh)
TW (1) TW327218B (zh)

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DE19804596C2 (de) * 1998-02-05 2000-10-12 Jan Otterstedt Verfahren und Schaltungsanordnung zum Test von über Teiladreßdekoder adressierbaren Halbleiterspeichern
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US6526477B1 (en) * 1999-09-03 2003-02-25 Adaptec, Inc. Host-memory based raid system, device, and method
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EP1346364B8 (en) * 2000-12-20 2013-01-09 Callahan Cellular L.L.C. Data processing device with a write once memory (wom)
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JP2011108286A (ja) * 2001-02-28 2011-06-02 Spansion Llc メモリ装置
US6981196B2 (en) 2001-07-25 2005-12-27 Hewlett-Packard Development Company, L.P. Data storage method for use in a magnetoresistive solid-state storage device
US20030023922A1 (en) 2001-07-25 2003-01-30 Davis James A. Fault tolerant magnetoresistive solid-state storage device
US7036068B2 (en) 2001-07-25 2006-04-25 Hewlett-Packard Development Company, L.P. Error correction coding and decoding in a solid-state storage device
JP4059472B2 (ja) * 2001-08-09 2008-03-12 株式会社ルネサステクノロジ メモリカード及びメモリコントローラ
JP2003141888A (ja) * 2001-11-01 2003-05-16 Mitsubishi Electric Corp 不揮発性半導体記憶装置
US6934903B1 (en) * 2001-12-17 2005-08-23 Advanced Micro Devices, Inc. Using microcode to correct ECC errors in a processor
US6973604B2 (en) 2002-03-08 2005-12-06 Hewlett-Packard Development Company, L.P. Allocation of sparing resources in a magnetoresistive solid-state storage device
US7073099B1 (en) 2002-05-30 2006-07-04 Marvell International Ltd. Method and apparatus for improving memory operation and yield
US7594135B2 (en) 2003-12-31 2009-09-22 Sandisk Corporation Flash memory system startup operation
US6988237B1 (en) 2004-01-06 2006-01-17 Marvell Semiconductor Israel Ltd. Error-correction memory architecture for testing production errors
US7266635B1 (en) 2004-07-22 2007-09-04 Marvell Semiconductor Israel Ltd. Address lookup apparatus having memory and content addressable memory
US7398348B2 (en) 2004-08-24 2008-07-08 Sandisk 3D Llc Method and apparatus for using a one-time or few-time programmable memory with a host device designed for erasable/rewritable memory
US7590918B2 (en) * 2004-09-10 2009-09-15 Ovonyx, Inc. Using a phase change memory as a high volume memory
EP1659592A1 (fr) * 2004-11-17 2006-05-24 Semtech Neuchâtel SA Procédé d'accès à une mémoire avec détection d'erreur à la base d'un code d'erreur contenant le nombre de bits d'un mot de donnée ayant la même valeur logique, et dispositif correspondant
US20060155916A1 (en) * 2005-01-11 2006-07-13 Gilbert Carl L Writing uncorrupted data to electronic memory
DE102005035661A1 (de) * 2005-07-29 2007-02-01 Infineon Technologies Ag Halbleiter-Speicherbauelement-System, und Verfahren zum Betreiben eines Halbleiter-Speicherbauelement-Systems
US7480847B2 (en) * 2005-08-29 2009-01-20 Sun Microsystems, Inc. Error correction code transformation technique
DE102005043335A1 (de) * 2005-09-12 2007-05-16 Siemens Ag Anordnung mit einem Tachographen
JP4889343B2 (ja) * 2006-03-31 2012-03-07 パナソニック株式会社 半導体記憶装置
JP2008090433A (ja) * 2006-09-29 2008-04-17 Toshiba Corp メモリコントローラ、メモリシステム及びデータ転送方法
US8145983B1 (en) 2006-11-08 2012-03-27 Marvell International Ltd. Methods and apparatus for identification of likely errors in data blocks
KR101472797B1 (ko) * 2007-07-16 2014-12-15 삼성전자주식회사 데이터를 읽거나 쓰기 위한 방법 및 장치
US8250452B2 (en) * 2007-08-20 2012-08-21 Infineon Technologies Ag Method and apparatus for embedded memory security
US20090055906A1 (en) * 2007-08-20 2009-02-26 Infineon Technologies Ag Method and apparatus for embedded memory security
JP4464454B1 (ja) * 2008-11-27 2010-05-19 Ｎｅｃエレクトロニクス株式会社 半導体装置及び半導体装置におけるベリファイ方法
CN102411517B (zh) * 2010-09-21 2013-09-11 智微科技股份有限公司 易失性存储器的存取方法以及易失性存储器的存取装置
TWI464581B (zh) * 2011-02-21 2014-12-11 Etron Technology Inc 非揮發性記憶體模組、非揮發性記憶體處理系統、與相關非揮發性記憶體管理方法
JP2016099711A (ja) * 2014-11-19 2016-05-30 凸版印刷株式会社 Ｉｃカードおよびその起動方法
DE102017117779B4 (de) * 2017-08-04 2023-01-05 Infineon Technologies Ag Verfahren und Vorrichtung zum Test von Speicherzellen
US10754989B2 (en) 2018-03-27 2020-08-25 International Business Machines Corporation Runtime self-correction for blockchain ledgers
US11640331B2 (en) * 2021-07-29 2023-05-02 Texas Instruments Incorporated Securing physical layer startup from a low-power state

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US5488691A (en) * 1993-11-17 1996-01-30 International Business Machines Corporation Memory card, computer system and method of operation for differentiating the use of read-modify-write cycles in operating and initializaiton modes
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Also Published As

Publication number Publication date
JPH09330273A (ja) 1997-12-22
DE19700510A1 (de) 1997-12-11
US5848076A (en) 1998-12-08

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees