TW325598B - Electrically programmable memory cell arrangement and method for its production - Google Patents

Electrically programmable memory cell arrangement and method for its production

Info

Publication number
TW325598B
TW325598B TW085115623A TW85115623A TW325598B TW 325598 B TW325598 B TW 325598B TW 085115623 A TW085115623 A TW 085115623A TW 85115623 A TW85115623 A TW 85115623A TW 325598 B TW325598 B TW 325598B
Authority
TW
Taiwan
Prior art keywords
memory cell
rows
electrically programmable
cell arrangement
programmable memory
Prior art date
Application number
TW085115623A
Other languages
English (en)
Inventor
Krautschneider Wolfgang
Risch Lothar
Hofmann Franz
Reisinger Hans
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Application granted granted Critical
Publication of TW325598B publication Critical patent/TW325598B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
TW085115623A 1996-01-08 1996-12-18 Electrically programmable memory cell arrangement and method for its production TW325598B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19600422A DE19600422C1 (de) 1996-01-08 1996-01-08 Elektrisch programmierbare Speicherzellenanordnung und Verfahren zu deren Herstellung

Publications (1)

Publication Number Publication Date
TW325598B true TW325598B (en) 1998-01-21

Family

ID=7782302

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085115623A TW325598B (en) 1996-01-08 1996-12-18 Electrically programmable memory cell arrangement and method for its production

Country Status (6)

Country Link
US (1) US5959328A (zh)
EP (1) EP0783180B1 (zh)
JP (1) JPH09199697A (zh)
KR (1) KR970060503A (zh)
DE (2) DE19600422C1 (zh)
TW (1) TW325598B (zh)

Families Citing this family (44)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19652547C2 (de) 1996-12-17 2002-04-25 Infineon Technologies Ag Speicherzellenanordnung mit Grabenstruktur und einem Gatedielektrikum, das ein Material mit Ladungsträger-Haftstellen enthält, und Verfahren zu deren Herstellung
FR2767219B1 (fr) * 1997-08-08 1999-09-17 Commissariat Energie Atomique Dispositif memoire non volatile programmable et effacable electriquement compatible avec un procede de fabrication cmos/soi
EP1068645B1 (de) * 1998-03-24 2014-05-07 Infineon Technologies AG Speicherzellenanordnung und verfahren zu ihrer herstellung
US6255155B1 (en) * 1998-04-23 2001-07-03 Hyundai Electronics Industries Co., Ltd. Nonvolatile memory and method for fabricating the same
TW395055B (en) * 1998-06-22 2000-06-21 United Microelectronics Corp Structure of read-only memory and the manufacturing method thereof
US6204529B1 (en) * 1999-08-27 2001-03-20 Hsing Lan Lung 8 bit per cell non-volatile semiconductor memory structure utilizing trench technology and dielectric floating gate
JP4730999B2 (ja) 2000-03-10 2011-07-20 スパンション エルエルシー 不揮発性メモリの製造方法
US6596617B1 (en) 2000-06-22 2003-07-22 Progressant Technologies, Inc. CMOS compatible process for making a tunable negative differential resistance (NDR) device
US6754104B2 (en) * 2000-06-22 2004-06-22 Progressant Technologies, Inc. Insulated-gate field-effect transistor integrated with negative differential resistance (NDR) FET
US6594193B2 (en) 2000-06-22 2003-07-15 Progressent Technologies, Inc. Charge pump for negative differential resistance transistor
US6479862B1 (en) 2000-06-22 2002-11-12 Progressant Technologies, Inc. Charge trapping device and method for implementing a transistor having a negative differential resistance mode
US6512274B1 (en) 2000-06-22 2003-01-28 Progressant Technologies, Inc. CMOS-process compatible, tunable NDR (negative differential resistance) device and method of operating same
US6518589B2 (en) 2000-06-22 2003-02-11 Progressant Technologies, Inc. Dual mode FET & logic circuit having negative differential resistance mode
US6559470B2 (en) 2000-06-22 2003-05-06 Progressed Technologies, Inc. Negative differential resistance field effect transistor (NDR-FET) and circuits using the same
US6724655B2 (en) 2000-06-22 2004-04-20 Progressant Technologies, Inc. Memory cell using negative differential resistance field effect transistors
EP1307920A2 (de) 2000-08-11 2003-05-07 Infineon Technologies AG Speicherzelle, speicherzellenanordnung und herstellungsverfahren
DE10039441A1 (de) * 2000-08-11 2002-02-28 Infineon Technologies Ag Speicherzelle, Speicherzellenanordnung und Herstellungsverfahren
JP2002170891A (ja) * 2000-11-21 2002-06-14 Halo Lsi Design & Device Technol Inc デュアルビット多準位バリスティックｍｏｎｏｓメモリの製造、プログラミング、および動作のプロセス
JP2002261175A (ja) * 2000-12-28 2002-09-13 Sony Corp 不揮発性半導体記憶装置およびその製造方法
GB0101695D0 (en) * 2001-01-23 2001-03-07 Koninkl Philips Electronics Nv Manufacture of trench-gate semiconductor devices
US6956262B1 (en) 2001-12-21 2005-10-18 Synopsys Inc. Charge trapping pull up element
US7453083B2 (en) * 2001-12-21 2008-11-18 Synopsys, Inc. Negative differential resistance field effect transistor for implementing a pull up element in a memory cell
US6912151B2 (en) * 2002-06-28 2005-06-28 Synopsys, Inc. Negative differential resistance (NDR) based memory device with reduced body effects
US7098472B2 (en) * 2002-06-28 2006-08-29 Progressant Technologies, Inc. Negative differential resistance (NDR) elements and memory device using the same
US6795337B2 (en) * 2002-06-28 2004-09-21 Progressant Technologies, Inc. Negative differential resistance (NDR) elements and memory device using the same
US7095659B2 (en) * 2002-06-28 2006-08-22 Progressant Technologies, Inc. Variable voltage supply bias and methods for negative differential resistance (NDR) based memory device
US6864104B2 (en) * 2002-06-28 2005-03-08 Progressant Technologies, Inc. Silicon on insulator (SOI) negative differential resistance (NDR) based memory device with reduced body effects
US6847562B2 (en) * 2002-06-28 2005-01-25 Progressant Technologies, Inc. Enhanced read and write methods for negative differential resistance (NDR) based memory device
US6567292B1 (en) 2002-06-28 2003-05-20 Progressant Technologies, Inc. Negative differential resistance (NDR) element and memory with reduced soft error rate
US6861707B1 (en) * 2002-06-28 2005-03-01 Progressant Technologies, Inc. Negative differential resistance (NDR) memory cell with reduced soft error rate
DE10241171A1 (de) * 2002-09-05 2004-03-18 Infineon Technologies Ag Wort- und Bitleitungsanordnung für einen FINFET-Halbleiterspeicher
US6806117B2 (en) * 2002-12-09 2004-10-19 Progressant Technologies, Inc. Methods of testing/stressing a charge trapping device
US6980467B2 (en) * 2002-12-09 2005-12-27 Progressant Technologies, Inc. Method of forming a negative differential resistance device
US7012833B2 (en) * 2002-12-09 2006-03-14 Progressant Technologies, Inc. Integrated circuit having negative differential resistance (NDR) devices with varied peak-to-valley ratios (PVRs)
US6979580B2 (en) 2002-12-09 2005-12-27 Progressant Technologies, Inc. Process for controlling performance characteristics of a negative differential resistance (NDR) device
US6812084B2 (en) * 2002-12-09 2004-11-02 Progressant Technologies, Inc. Adaptive negative differential resistance device
US6849483B2 (en) * 2002-12-09 2005-02-01 Progressant Technologies, Inc. Charge trapping device and method of forming the same
US7005711B2 (en) * 2002-12-20 2006-02-28 Progressant Technologies, Inc. N-channel pull-up element and logic circuit
US6963104B2 (en) * 2003-06-12 2005-11-08 Advanced Micro Devices, Inc. Non-volatile memory device
US6933558B2 (en) * 2003-12-04 2005-08-23 Advanced Micro Devices, Inc. Flash memory device
JP2007517386A (ja) * 2003-12-19 2007-06-28 インフィネオン テクノロジーズ アクチエンゲゼルシャフト ブリッジ電界効果トランジスタメモリセル、上記セルを備えるデバイス、および、ブリッジ電界効果トランジスタメモリセルの製造方法
KR100540478B1 (ko) * 2004-03-22 2006-01-11 주식회사 하이닉스반도체 전하 트랩을 갖는 게이트유전체를 포함한 휘발성 메모리셀 트랜지스터 및 그 제조 방법
KR100682899B1 (ko) * 2004-11-10 2007-02-15 삼성전자주식회사 저항 변화층을 스토리지 노드로 구비하는 메모리 소자의제조 방법
JP2006196622A (ja) * 2005-01-12 2006-07-27 Nec Electronics Corp 不揮発性半導体記憶装置及び不揮発性半導体記憶装置の製造方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4047974A (en) * 1975-12-30 1977-09-13 Hughes Aircraft Company Process for fabricating non-volatile field effect semiconductor memory structure utilizing implanted ions to induce trapping states
DE3032364C2 (de) * 1980-08-28 1987-11-12 Philips Patentverwaltung Gmbh, 2000 Hamburg Elektrisch programmierbarer Halbleiter-Festwertspeicher und Verfahren zu seiner Herstellung
JPS61107762A (ja) * 1984-10-31 1986-05-26 Toshiba Corp 半導体記憶装置の製造方法
JPH0715953B2 (ja) * 1985-08-09 1995-02-22 株式会社リコー 書換え可能なメモリ装置とその製造方法
JPH05102436A (ja) * 1991-10-09 1993-04-23 Ricoh Co Ltd 半導体メモリ装置とその製造方法
JPH05326976A (ja) * 1992-05-20 1993-12-10 Rohm Co Ltd 半導体記憶装置およびその製法
EP0655788B1 (en) * 1993-11-29 1998-01-21 STMicroelectronics S.A. A volatile memory cell
JPH07254651A (ja) * 1994-03-16 1995-10-03 Toshiba Corp 半導体集積回路装置
US5467308A (en) * 1994-04-05 1995-11-14 Motorola Inc. Cross-point eeprom memory array
US5387534A (en) * 1994-05-05 1995-02-07 Micron Semiconductor, Inc. Method of forming an array of non-volatile sonos memory cells and array of non-violatile sonos memory cells

Also Published As

Publication number Publication date
KR970060503A (ko) 1997-08-12
US5959328A (en) 1999-09-28
EP0783180B1 (de) 2005-11-02
EP0783180A1 (de) 1997-07-09
DE19600422C1 (de) 1997-08-21
JPH09199697A (ja) 1997-07-31
DE59611290D1 (de) 2005-12-08

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