TW324859B - Manufacturing method of non-volatile semiconductor memory with erasing gate - Google Patents

Manufacturing method of non-volatile semiconductor memory with erasing gate

Info

Publication number
TW324859B
TW324859B TW085113179A TW85113179A TW324859B TW 324859 B TW324859 B TW 324859B TW 085113179 A TW085113179 A TW 085113179A TW 85113179 A TW85113179 A TW 85113179A TW 324859 B TW324859 B TW 324859B
Authority
TW
Taiwan
Prior art keywords
region
gate
layer
insulating layer
conductive layer
Prior art date
Application number
TW085113179A
Other languages
English (en)
Inventor
Kenji Saitou
Original Assignee
Nippon Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co filed Critical Nippon Electric Co
Application granted granted Critical
Publication of TW324859B publication Critical patent/TW324859B/zh

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42Simultaneous manufacture of periphery and memory cells
    • H10B41/43Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor
    • H10B41/48Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor with a tunnel dielectric layer also being used as part of the peripheral transistor
TW085113179A 1995-10-31 1996-10-29 Manufacturing method of non-volatile semiconductor memory with erasing gate TW324859B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7308356A JP2734433B2 (ja) 1995-10-31 1995-10-31 不揮発性半導体記憶装置の製造方法

Publications (1)

Publication Number Publication Date
TW324859B true TW324859B (en) 1998-01-11

Family

ID=17980082

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085113179A TW324859B (en) 1995-10-31 1996-10-29 Manufacturing method of non-volatile semiconductor memory with erasing gate

Country Status (5)

Country Link
US (1) US5846861A (zh)
EP (1) EP0773583A1 (zh)
JP (1) JP2734433B2 (zh)
KR (1) KR100210999B1 (zh)
TW (1) TW324859B (zh)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100244276B1 (ko) * 1997-07-09 2000-02-01 김영환 비휘발성 메모리 소자의 어레이 및 그의 제조방법
KR100244278B1 (ko) * 1997-07-09 2000-02-01 김영환 비휘발성 메모리 소자의 제조 방법
US6258669B1 (en) * 1997-12-18 2001-07-10 Advanced Micro Devices, Inc. Methods and arrangements for improved formation of control and floating gates in non-volatile memory semiconductor devices
JP3241316B2 (ja) * 1998-01-07 2001-12-25 日本電気株式会社 フラッシュメモリの製造方法
TW409428B (en) * 1998-03-20 2000-10-21 Seiko Epson Corp Non-volatile semiconductor memory apparatus and the manufacture method thereof
JPH11330430A (ja) * 1998-05-18 1999-11-30 Nec Corp 不揮発性半導体記憶装置の製造方法
JP3662137B2 (ja) 1999-03-12 2005-06-22 株式会社東芝 不揮発性半導体記憶装置の製造方法
US6429124B1 (en) * 1999-04-14 2002-08-06 Micron Technology, Inc. Local interconnect structures for integrated circuits and methods for making the same
US6901006B1 (en) 1999-07-14 2005-05-31 Hitachi, Ltd. Semiconductor integrated circuit device including first, second and third gates
KR100339420B1 (ko) * 1999-11-03 2002-05-31 박종섭 반도체 메모리 소자의 제조 방법
KR100348311B1 (ko) * 2000-07-19 2002-08-09 주식회사 하이닉스반도체 비휘발성 메모리 소자 및 그 제조방법
US6455440B1 (en) * 2001-07-13 2002-09-24 Macronix International Co., Ltd. Method for preventing polysilicon stringer in memory device
CN112086510A (zh) 2019-06-13 2020-12-15 联华电子股份有限公司 存储器元件的结构

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5268319A (en) * 1988-06-08 1993-12-07 Eliyahou Harari Highly compact EPROM and flash EEPROM devices
US5070032A (en) * 1989-03-15 1991-12-03 Sundisk Corporation Method of making dense flash eeprom semiconductor memory structures

Also Published As

Publication number Publication date
KR100210999B1 (ko) 1999-07-15
JPH09129853A (ja) 1997-05-16
EP0773583A1 (en) 1997-05-14
US5846861A (en) 1998-12-08
JP2734433B2 (ja) 1998-03-30

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