TW274631B - Manufacturing method for semiconductor device - Google Patents

Manufacturing method for semiconductor device

Info

Publication number
TW274631B
TW274631B TW084104608A TW84104608A TW274631B TW 274631 B TW274631 B TW 274631B TW 084104608 A TW084104608 A TW 084104608A TW 84104608 A TW84104608 A TW 84104608A TW 274631 B TW274631 B TW 274631B
Authority
TW
Taiwan
Prior art keywords
oxide
substrate
film
proof film
semiconductor device
Prior art date
Application number
TW084104608A
Other languages
English (en)
Inventor
Takashi Kuroi
Maiko Kobayashi
Original Assignee
Mitsubishi Electric Machine
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Machine filed Critical Mitsubishi Electric Machine
Application granted granted Critical
Publication of TW274631B publication Critical patent/TW274631B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76205Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Drying Of Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)
TW084104608A 1995-04-07 1995-05-08 Manufacturing method for semiconductor device TW274631B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP08272295A JP3422593B2 (ja) 1995-04-07 1995-04-07 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
TW274631B true TW274631B (en) 1996-04-21

Family

ID=13782309

Family Applications (1)

Application Number Title Priority Date Filing Date
TW084104608A TW274631B (en) 1995-04-07 1995-05-08 Manufacturing method for semiconductor device

Country Status (4)

Country Link
US (1) US5956600A (zh)
JP (1) JP3422593B2 (zh)
KR (1) KR100218872B1 (zh)
TW (1) TW274631B (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110416089A (zh) * 2019-07-31 2019-11-05 上海华虹宏力半导体制造有限公司 一种ldmos的制备方法

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5824594A (en) * 1996-04-29 1998-10-20 Samsung Electronics Co., Ltd. Integrated circuit device isolating methods including silicon spacers and oxidation barrier films
JP2000031264A (ja) * 1998-07-08 2000-01-28 Mitsubishi Electric Corp 半導体装置およびその製造方法
US6306726B1 (en) 1999-08-30 2001-10-23 Micron Technology, Inc. Method of forming field oxide
JP4107096B2 (ja) * 2003-02-10 2008-06-25 ヤマハ株式会社 ウェットエッチング方法
FR2879020B1 (fr) * 2004-12-08 2007-05-04 Commissariat Energie Atomique Procede d'isolation de motifs formes dans un film mince en materiau semi-conducteur oxydable
EP2495762B1 (en) * 2011-03-03 2017-11-01 IMEC vzw Method for producing a floating gate semiconductor memory device
US20120276707A1 (en) * 2011-04-28 2012-11-01 Nanya Technology Corporation Method for forming trench isolation
CN118016593B (zh) * 2024-04-09 2024-07-19 合肥晶合集成电路股份有限公司 一种半导体结构及其制备方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63144542A (ja) * 1986-12-09 1988-06-16 Nec Corp 半導体装置及びその製造方法
JPH01161851A (ja) * 1987-12-18 1989-06-26 Sony Corp 半導体装置の製造方法
JPS63313834A (ja) * 1988-01-13 1988-12-21 Hitachi Ltd 半導体集積回路
JPH02304927A (ja) * 1989-05-19 1990-12-18 Nec Corp 半導体装置の製造方法
JPH0590396A (ja) * 1991-09-30 1993-04-09 Mitsubishi Electric Corp 半導体装置及びその製造方法
JPH05182956A (ja) * 1991-12-27 1993-07-23 Sony Corp 埋め込みlocos製造方法
KR970003731B1 (ko) * 1993-10-14 1997-03-21 엘지반도체 주식회사 반도체 장치의 소자 격리막 제조방법

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110416089A (zh) * 2019-07-31 2019-11-05 上海华虹宏力半导体制造有限公司 一种ldmos的制备方法

Also Published As

Publication number Publication date
JPH08279555A (ja) 1996-10-22
JP3422593B2 (ja) 2003-06-30
US5956600A (en) 1999-09-21
KR100218872B1 (ko) 1999-09-01

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees