TW273628B - - Google Patents
Info
- Publication number
- TW273628B TW273628B TW084108162A TW84108162A TW273628B TW 273628 B TW273628 B TW 273628B TW 084108162 A TW084108162 A TW 084108162A TW 84108162 A TW84108162 A TW 84108162A TW 273628 B TW273628 B TW 273628B
- Authority
- TW
- Taiwan
- Prior art keywords
- address
- circuit
- coded
- enable signal
- redundancy
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
- G11C29/806—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout by reducing size of decoders
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
- G11C29/812—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout using a reduced amount of fuses
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Dram (AREA)
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP94112661A EP0697659B1 (de) | 1994-08-12 | 1994-08-12 | Redundanz-Schaltungsanordnung für einen integrierten Halbleiterspeicher |
Publications (1)
Publication Number | Publication Date |
---|---|
TW273628B true TW273628B (zh) | 1996-04-01 |
Family
ID=8216199
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW084108162A TW273628B (zh) | 1994-08-12 | 1995-08-04 |
Country Status (8)
Country | Link |
---|---|
US (1) | US5657279A (zh) |
EP (1) | EP0697659B1 (zh) |
JP (1) | JP3626254B2 (zh) |
KR (1) | KR100349094B1 (zh) |
AT (1) | ATE187826T1 (zh) |
DE (1) | DE59409008D1 (zh) |
HK (1) | HK1004494A1 (zh) |
TW (1) | TW273628B (zh) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5706292A (en) | 1996-04-25 | 1998-01-06 | Micron Technology, Inc. | Layout for a semiconductor memory device having redundant elements |
JP2982695B2 (ja) * | 1996-07-15 | 1999-11-29 | 日本電気株式会社 | 半導体メモリ |
CA2202692C (en) * | 1997-04-14 | 2006-06-13 | Mosaid Technologies Incorporated | Column redundancy in semiconductor memories |
US6002620A (en) * | 1998-01-09 | 1999-12-14 | Information Storage Devices, Inc. | Method and apparatus of column redundancy for non-volatile analog and multilevel memory |
US6137735A (en) * | 1998-10-30 | 2000-10-24 | Mosaid Technologies Incorporated | Column redundancy circuit with reduced signal path delay |
US6473872B1 (en) | 2000-03-08 | 2002-10-29 | Infineon Technologies Ag | Address decoding system and method for failure toleration in a memory bank |
CN104835529B (zh) * | 2014-02-10 | 2018-05-29 | 晶豪科技股份有限公司 | 用于半导体装置的冗余评估电路 |
CN113327641B (zh) * | 2020-02-28 | 2024-05-03 | 中芯国际集成电路制造(上海)有限公司 | eFuse存储单元、eFuse存储阵列及其使用方法、eFuse系统 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04103099A (ja) * | 1990-08-23 | 1992-04-06 | Toshiba Corp | 半導体記憶装置 |
JPH0831279B2 (ja) * | 1990-12-20 | 1996-03-27 | インターナショナル・ビジネス・マシーンズ・コーポレイション | 冗長システム |
JP2629475B2 (ja) * | 1991-04-04 | 1997-07-09 | 松下電器産業株式会社 | 半導体集積回路 |
US5293564A (en) * | 1991-04-30 | 1994-03-08 | Texas Instruments Incorporated | Address match scheme for DRAM redundancy scheme |
-
1994
- 1994-08-12 EP EP94112661A patent/EP0697659B1/de not_active Expired - Lifetime
- 1994-08-12 DE DE59409008T patent/DE59409008D1/de not_active Expired - Lifetime
- 1994-08-12 AT AT94112661T patent/ATE187826T1/de not_active IP Right Cessation
-
1995
- 1995-08-04 TW TW084108162A patent/TW273628B/zh active
- 1995-08-09 JP JP22472295A patent/JP3626254B2/ja not_active Expired - Fee Related
- 1995-08-11 KR KR1019950024768A patent/KR100349094B1/ko not_active IP Right Cessation
- 1995-08-14 US US08/514,602 patent/US5657279A/en not_active Expired - Fee Related
-
1998
- 1998-04-20 HK HK98103300A patent/HK1004494A1/xx not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
EP0697659B1 (de) | 1999-12-15 |
ATE187826T1 (de) | 2000-01-15 |
JP3626254B2 (ja) | 2005-03-02 |
JPH0896595A (ja) | 1996-04-12 |
US5657279A (en) | 1997-08-12 |
KR100349094B1 (ko) | 2002-12-28 |
EP0697659A1 (de) | 1996-02-21 |
DE59409008D1 (de) | 2000-01-20 |
KR960008534A (ko) | 1996-03-22 |
HK1004494A1 (en) | 1998-11-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0608572A3 (en) | Reduced catadioptric system with high numerical aperture. | |
GB1531528A (en) | Apparatus for providing valid information for invalid information in unalterable memory means | |
EP0627636A3 (en) | Plastic lens. | |
DE69129138D1 (de) | DRAM mit einem Wortleitungsbetriebsschaltungssystem | |
EP0124900A3 (en) | Reduntant type memory circuit with an improved clock generator | |
EP0616010A3 (en) | Resin composition. | |
TW326530B (en) | Memory device with reduced number of fuses | |
EP0590573A3 (en) | Resin for a plastic lens. | |
EP0608936A3 (en) | Electricity storage. | |
FR2684206B1 (fr) | Circuit de lecture de fusible de redondance pour memoire integree. | |
TW273628B (zh) | ||
EP0577967A3 (en) | Integrated memory circuit. | |
DE68922240D1 (de) | Komplementärausgangsschaltung für eine logische Schaltung. | |
EP0358955A3 (en) | Microprocessor in a redundant configuration with a monitoring mode of operation | |
EP0151849A3 (en) | Information storing circuit using blown and unblown fuses | |
CA2042798A1 (en) | Viterbi decoder | |
EP0648020A3 (en) | Output driver circuit. | |
GB8403945D0 (en) | Semiconductor memory device | |
EP0617377A3 (en) | Microcomputer with flash memory. | |
EP0644445A3 (de) | Asphärisches Objektiv. | |
EP0607942A3 (en) | Read only memory. | |
EP0622801A3 (en) | Hierarchical bit line memory architecture. | |
EP0651506A3 (de) | Integrierte Komparator-Schaltung. | |
EP0647944A3 (en) | Output circuit for memory circuit with multiple output bits. | |
GB9322190D0 (en) | New memory checker |