TW273049B - Fabricating method for high-density DRAM - Google Patents

Abstract

A fabricating method for high-density DRAM with high capacitance comprises: selectively forming field oxide and active area on silicon semiconductor substrate; forming field effect transistor including gate oxide, gate electrode, N- lightly doped region, spacer and source/drain; forming the first isolation, the second isolation and the third isolation; with lithography and plasma etch anisotropically etching the above the first isolation, the second isolation and the third isolation to form node contact of field effect transistor; forming the first polysilicon layer, the fourth isolation and photoresist, in which the first polysilicon layer will fill up the above node contact; with lithography and plasma etch anisotropically etching the above first polysilicon layer and the fourth isolation; laterally etching the above photoresist to etch partial portion of the above photoresist to expose the fourth isolation locally; with plasma etch anisotropically etching locally exposed the above fourth isolation; removing the above photoresist; with the above fourth isolation as oxidation mask, thermally oxidizing the above first polysilicon layer, that is not covered by the fourth isolation, to form polysilicon thermal SiO2 locally; with phosphorous acid selectively removing the above fourth isolation; with the above polysilicon thermal SiO2 as etch mask and plasma etch anisotropically etching the above first polysilicon layer to one proper depth to from barrel-shaped the first polysilicon layer; with diluted HF removing the above third isolation and polysilicon thermal SiO2 to form storage node of capacitor; forming one second polysilicon layer; with lithography and plasma etch etching the above capacitor dielectric and the second polysilicon layer to pattern top plate of capacitor.