Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Winbond Electronics CorpfiledCriticalWinbond Electronics Corp
Priority to TW83104555ApriorityCriticalpatent/TW239235B/en
Application grantedgrantedCritical
Publication of TW239235BpublicationCriticalpatent/TW239235B/en
A process for erasable nonvolatile memory cell structure includes the following steps: 1. taking one medium product after front-end process; 2. implementing floating gate on the medium product; 3. implanting doped ion into the medium product to form high-voltage junction; 4. forming sharp spacer around the floating gate to get one floating gate with sharp spacer; 5. growing the second insulating layer around the floating gate with sharp spacer; 6. implementing control gate on the second insulating layer; 7. implanting doped ion into the medium product to from heavily doped area which is erasable nonvolatile memory cell.
TW83104555A1994-05-191994-05-19Process for erasable nonvolatile memory cell structure
TW239235B
(en)