DE3172114D1 - Memory matrix using one-transistor floating gate mos cells - Google Patents
Memory matrix using one-transistor floating gate mos cellsInfo
- Publication number
- DE3172114D1 DE3172114D1 DE8181103816T DE3172114T DE3172114D1 DE 3172114 D1 DE3172114 D1 DE 3172114D1 DE 8181103816 T DE8181103816 T DE 8181103816T DE 3172114 T DE3172114 T DE 3172114T DE 3172114 D1 DE3172114 D1 DE 3172114D1
- Authority
- DE
- Germany
- Prior art keywords
- floating gate
- memory matrix
- gate mos
- transistor floating
- mos cells
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000011159 matrix material Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
- H01L29/7881—Programmable transistors with only two possible levels of programmation
- H01L29/7882—Programmable transistors with only two possible levels of programmation charging by injection of carriers through a conductive insulator, e.g. Poole-Frankel conduction
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
- G11C16/0425—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a merged floating gate and select transistor
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Non-Volatile Memory (AREA)
- Read Only Memory (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/160,530 US4336603A (en) | 1980-06-18 | 1980-06-18 | Three terminal electrically erasable programmable read only memory |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3172114D1 true DE3172114D1 (en) | 1985-10-10 |
Family
ID=22577266
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8181103816T Expired DE3172114D1 (en) | 1980-06-18 | 1981-05-19 | Memory matrix using one-transistor floating gate mos cells |
Country Status (4)
Country | Link |
---|---|
US (1) | US4336603A (en) |
EP (1) | EP0042964B1 (en) |
JP (1) | JPS6016039B2 (en) |
DE (1) | DE3172114D1 (en) |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3176810D1 (en) * | 1980-12-23 | 1988-08-18 | Fujitsu Ltd | Electrically programmable non-volatile semiconductor memory device |
US4939559A (en) * | 1981-12-14 | 1990-07-03 | International Business Machines Corporation | Dual electron injector structures using a conductive oxide between injectors |
US4432072A (en) * | 1981-12-31 | 1984-02-14 | International Business Machines Corporation | Non-volatile dynamic RAM cell |
US4446535A (en) * | 1981-12-31 | 1984-05-01 | International Business Machines Corporation | Non-inverting non-volatile dynamic RAM cell |
US4558339A (en) * | 1982-03-09 | 1985-12-10 | Rca Corporation | Electrically alterable, nonvolatile floating gate memory device |
US4417264A (en) * | 1982-03-09 | 1983-11-22 | Rca Corporation | Electrically alterable, nonvolatile floating gate memory device |
US4688078A (en) * | 1982-09-30 | 1987-08-18 | Ning Hseih | Partially relaxable composite dielectric structure |
EP0105802A3 (en) * | 1982-09-30 | 1986-02-26 | Fairchild Semiconductor Corporation | Programmable read only memory |
US4795719A (en) * | 1984-05-15 | 1989-01-03 | Waferscale Integration, Inc. | Self-aligned split gate eprom process |
US4639893A (en) * | 1984-05-15 | 1987-01-27 | Wafer Scale Integration, Inc. | Self-aligned split gate EPROM |
US4868629A (en) * | 1984-05-15 | 1989-09-19 | Waferscale Integration, Inc. | Self-aligned split gate EPROM |
US4729115A (en) * | 1984-09-27 | 1988-03-01 | International Business Machines Corporation | Non-volatile dynamic random access memory cell |
JPS6180866A (en) * | 1984-09-27 | 1986-04-24 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Non-volatile semiconductor memory cell |
US4665417A (en) * | 1984-09-27 | 1987-05-12 | International Business Machines Corporation | Non-volatile dynamic random access memory cell |
IT1213229B (en) * | 1984-10-23 | 1989-12-14 | Ates Componenti Elettron | MERGED NON-VOLATILE MEMORY CELL WITH FLOATING GATE OVERLAPPING THE CONTROL AND SELECTION GATE. |
JPH0721317B2 (en) * | 1986-04-16 | 1995-03-08 | 本田技研工業株式会社 | Front / reverse switching device |
US5016215A (en) * | 1987-09-30 | 1991-05-14 | Texas Instruments Incorporated | High speed EPROM with reverse polarity voltages applied to source and drain regions during reading and writing |
FR2650109B1 (en) * | 1989-07-20 | 1993-04-02 | Gemplus Card Int | INTEGRATED MOS CIRCUIT WITH ADJUSTABLE THRESHOLD VOLTAGE |
JPH0426995A (en) * | 1990-05-18 | 1992-01-30 | Mitsubishi Electric Corp | Nonvolatile semiconductor memory |
US5293328A (en) * | 1992-01-15 | 1994-03-08 | National Semiconductor Corporation | Electrically reprogrammable EPROM cell with merged transistor and optiumum area |
US5457061A (en) * | 1994-07-15 | 1995-10-10 | United Microelectronics Corporation | Method of making top floating-gate flash EEPROM structure |
US6151248A (en) | 1999-06-30 | 2000-11-21 | Sandisk Corporation | Dual floating gate EEPROM cell array with steering gates shared by adjacent cells |
US6103573A (en) | 1999-06-30 | 2000-08-15 | Sandisk Corporation | Processing techniques for making a dual floating gate EEPROM cell array |
US6091633A (en) * | 1999-08-09 | 2000-07-18 | Sandisk Corporation | Memory array architecture utilizing global bit lines shared by multiple cells |
US6512263B1 (en) * | 2000-09-22 | 2003-01-28 | Sandisk Corporation | Non-volatile memory cell array having discontinuous source and drain diffusions contacted by continuous bit line conductors and methods of forming |
US7525149B2 (en) * | 2005-08-24 | 2009-04-28 | Micron Technology, Inc. | Combined volatile and non-volatile memory device with graded composition insulator stack |
US8320191B2 (en) | 2007-08-30 | 2012-11-27 | Infineon Technologies Ag | Memory cell arrangement, method for controlling a memory cell, memory array and electronic device |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3972059A (en) * | 1973-12-28 | 1976-07-27 | International Business Machines Corporation | Dielectric diode, fabrication thereof, and charge store memory therewith |
US3914855A (en) * | 1974-05-09 | 1975-10-28 | Bell Telephone Labor Inc | Methods for making MOS read-only memories |
US4014675A (en) * | 1974-12-05 | 1977-03-29 | Hercules Incorporated | Fertilizer stick |
JPS5223532A (en) * | 1975-08-16 | 1977-02-22 | Sato Shinzou | Salt bath* electrical heating nitriding of steel subsequent to quenching |
US4161039A (en) * | 1976-12-15 | 1979-07-10 | Siemens Aktiengesellschaft | N-Channel storage FET |
US4104675A (en) * | 1977-06-21 | 1978-08-01 | International Business Machines Corporation | Moderate field hole and electron injection from one interface of MIM or MIS structures |
US4099196A (en) * | 1977-06-29 | 1978-07-04 | Intel Corporation | Triple layer polysilicon cell |
US4203158A (en) * | 1978-02-24 | 1980-05-13 | Intel Corporation | Electrically programmable and erasable MOS floating gate memory device employing tunneling and method of fabricating same |
JPS5927235B2 (en) * | 1978-07-14 | 1984-07-04 | 井関農機株式会社 | Weight sizer saucer tipping device |
JPS5642375A (en) * | 1979-08-31 | 1981-04-20 | Fujitsu Ltd | Semiconductor nonvolatile memory |
DE3067881D1 (en) * | 1980-02-25 | 1984-06-20 | Ibm | Dual electron injector structures |
-
1980
- 1980-06-18 US US06/160,530 patent/US4336603A/en not_active Expired - Lifetime
-
1981
- 1981-05-14 JP JP56071507A patent/JPS6016039B2/en not_active Expired
- 1981-05-19 EP EP81103816A patent/EP0042964B1/en not_active Expired
- 1981-05-19 DE DE8181103816T patent/DE3172114D1/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS5712488A (en) | 1982-01-22 |
JPS6016039B2 (en) | 1985-04-23 |
US4336603A (en) | 1982-06-22 |
EP0042964A1 (en) | 1982-01-06 |
EP0042964B1 (en) | 1985-09-04 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |