TW202420556A - 半導體元件的製造方法 - Google Patents

半導體元件的製造方法 Download PDF

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Publication number
TW202420556A
TW202420556A TW112141219A TW112141219A TW202420556A TW 202420556 A TW202420556 A TW 202420556A TW 112141219 A TW112141219 A TW 112141219A TW 112141219 A TW112141219 A TW 112141219A TW 202420556 A TW202420556 A TW 202420556A
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TW
Taiwan
Prior art keywords
carrier
manufacturing
adhesive layer
aforementioned
semiconductor
Prior art date
Application number
TW112141219A
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English (en)
Chinese (zh)
Inventor
鈴木克彥
Original Assignee
日商力森諾科股份有限公司
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Publication date
Application filed by 日商力森諾科股份有限公司 filed Critical 日商力森諾科股份有限公司
Publication of TW202420556A publication Critical patent/TW202420556A/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/014—Manufacture or treatment using batch processing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/019—Manufacture or treatment using temporary auxiliary substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7416—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H10P72/7418—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding of passive members, e.g. a chip mounting substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/08—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs
    • H10W70/09—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/10—Configurations of laterally-adjacent chips

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  • Mechanical Treatment Of Semiconductor (AREA)
TW112141219A 2022-11-04 2023-10-27 半導體元件的製造方法 TW202420556A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
PCT/JP2022/041199 WO2024095464A1 (ja) 2022-11-04 2022-11-04 半導体デバイスの製造方法
WOPCT/JP2022/041199 2022-11-04

Publications (1)

Publication Number Publication Date
TW202420556A true TW202420556A (zh) 2024-05-16

Family

ID=90929987

Family Applications (1)

Application Number Title Priority Date Filing Date
TW112141219A TW202420556A (zh) 2022-11-04 2023-10-27 半導體元件的製造方法

Country Status (5)

Country Link
US (1) US20250329549A1 (https=)
JP (1) JPWO2024095464A1 (https=)
CN (1) CN119137731A (https=)
TW (1) TW202420556A (https=)
WO (1) WO2024095464A1 (https=)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5837272B2 (ja) * 2008-05-21 2015-12-24 日立化成株式会社 半導体製造装置の製造方法
JP2015213201A (ja) * 2015-08-25 2015-11-26 日東電工株式会社 半導体装置の製造方法
JP2019033124A (ja) * 2017-08-04 2019-02-28 リンテック株式会社 半導体装置の製造方法、及び接着積層体

Also Published As

Publication number Publication date
US20250329549A1 (en) 2025-10-23
WO2024095464A1 (ja) 2024-05-10
CN119137731A (zh) 2024-12-13
JPWO2024095464A1 (https=) 2024-05-10

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