TW202401532A - 半導體裝置之製造方法 - Google Patents

半導體裝置之製造方法 Download PDF

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Publication number
TW202401532A
TW202401532A TW112119284A TW112119284A TW202401532A TW 202401532 A TW202401532 A TW 202401532A TW 112119284 A TW112119284 A TW 112119284A TW 112119284 A TW112119284 A TW 112119284A TW 202401532 A TW202401532 A TW 202401532A
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TW
Taiwan
Prior art keywords
insulating film
electrode
organic insulating
protrusion amount
semiconductor substrate
Prior art date
Application number
TW112119284A
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English (en)
Chinese (zh)
Inventor
白坂敏明
柴田智章
福住志津
奧田唯史
Original Assignee
日商力森諾科股份有限公司
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Application filed by 日商力森諾科股份有限公司 filed Critical 日商力森諾科股份有限公司
Publication of TW202401532A publication Critical patent/TW202401532A/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W80/00—Direct bonding of chips, wafers or substrates
    • H10W80/011—Manufacture or treatment of pads or other interconnections to be direct bonded
    • H10W80/031—Changing or setting shapes of the pads
    • H10W80/037—Changing or setting shapes of the pads by mechanical treatment, e.g. by cutting, pressing or stamping
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W80/00—Direct bonding of chips, wafers or substrates
    • H10W80/301—Bonding techniques, e.g. hybrid bonding
    • H10W80/312—Bonding techniques, e.g. hybrid bonding characterised by the direct bonding of electrically conductive pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W80/00—Direct bonding of chips, wafers or substrates
    • H10W80/301—Bonding techniques, e.g. hybrid bonding
    • H10W80/327—Bonding techniques, e.g. hybrid bonding characterised by the direct bonding of insulating parts, e.g. of silicon oxide layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W80/00—Direct bonding of chips, wafers or substrates
    • H10W80/301—Bonding techniques, e.g. hybrid bonding
    • H10W80/331—Bonding techniques, e.g. hybrid bonding characterised by the application of energy for connecting
    • H10W80/333—Compression bonding
    • H10W80/334—Thermocompression bonding

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
TW112119284A 2022-05-25 2023-05-24 半導體裝置之製造方法 TW202401532A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
WOPCT/JP2022/021410 2022-05-25
PCT/JP2022/021410 WO2023228321A1 (ja) 2022-05-25 2022-05-25 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
TW202401532A true TW202401532A (zh) 2024-01-01

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ID=88918697

Family Applications (1)

Application Number Title Priority Date Filing Date
TW112119284A TW202401532A (zh) 2022-05-25 2023-05-24 半導體裝置之製造方法

Country Status (5)

Country Link
US (1) US20250336881A1 (https=)
JP (1) JPWO2023228940A1 (https=)
CN (1) CN119110986A (https=)
TW (1) TW202401532A (https=)
WO (2) WO2023228321A1 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN121909226A (zh) * 2024-08-08 2026-04-21 株式会社力森诺科 混合键合用硬化性树脂组合物及制造电路连接体的方法
WO2026078823A1 (ja) * 2024-10-09 2026-04-16 株式会社レゾナック 半導体装置の製造方法
WO2026078824A1 (ja) * 2024-10-09 2026-04-16 株式会社レゾナック 半導体装置の製造方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021131080A1 (ja) * 2019-12-27 2021-07-01 ボンドテック株式会社 接合方法、被接合物および接合装置
JP7543712B2 (ja) * 2020-06-12 2024-09-03 株式会社レゾナック 半導体装置の製造方法
WO2022070362A1 (ja) * 2020-09-30 2022-04-07 昭和電工マテリアルズ株式会社 樹脂組成物、半導体装置の製造方法、硬化物及び半導体装置

Also Published As

Publication number Publication date
JPWO2023228940A1 (https=) 2023-11-30
CN119110986A (zh) 2024-12-10
WO2023228321A1 (ja) 2023-11-30
US20250336881A1 (en) 2025-10-30
WO2023228940A1 (ja) 2023-11-30

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