TW202230592A - 用於製造半導體封裝件的治具及半導體封裝件的製造方法 - Google Patents
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Abstract
一種用於製造半導體封裝件的治具包括底件及上件。底件包括基座、支撐板及至少一個彈性連接件。支撐板位於基座的中心區中。所述至少一個彈性連接件夾置於支撐板與基座之間。上件包括帽及外凸緣。當上件設置於底件上時,帽上覆於支撐板上。外凸緣設置於帽的邊緣處,與帽連接。當上件設置於底件上時,外凸緣接觸底件的基座。帽包括做為貫通孔的開口。當上件設置於底件上時,開口的垂直投影完全落在支撐板上。
Description
在各種電子裝置(例如行動電話及其他行動電子設備)中使用的半導體元件及積體電路通常被製造於單個半導體晶圓上。晶圓的晶粒可以晶圓級被處理並與其他半導體元件或晶粒封裝於一起,且已開發出用於晶圓級封裝的各種技術及應用。多個半導體元件的整合已成為此領域中的挑戰。為了對對於小型化、更高速度及更佳電性效能(例如,更低的傳輸損耗及插入損耗)的需求的增加作出回應,積極地研究更具創造性的封裝及組裝技術。
以下揭露內容提供用於實施所提供標的的不同特徵的許多不同實施例或實例。以下闡述組件及排列的具體實例以簡化本揭露。當然,該些僅為實例且不旨在進行限制。舉例而言,以下說明中將第一特徵形成於第二特徵「之上」或第二特徵「上」可包括其中第一特徵與第二特徵被形成為直接接觸的實施例,且亦可包括其中第一特徵與第二特徵之間可形成有附加特徵進而使得所述第一特徵與所述第二特徵可不直接接觸的實施例。另外,本揭露可能在各種實例中重複使用參考編號及/或字母。此種重複使用是出於簡潔及清晰的目的,而不是自身表示所論述的各種實施例及/或配置之間的關係。
此外,為易於說明,本文中可能使用例如「位於…之下(beneath)」、「位於…下方(below)」、「下部的(lower)」、「位於…上方(above)」、「上部的(upper)」等空間相對性用語來闡述圖中所示的一個元件或特徵與另一(其他)元件或特徵的關係。所述空間相對性用語旨在除圖中所繪示的定向外亦囊括元件在使用或操作中的不同定向。裝置可具有其他定向(旋轉90度或處於其他定向),且本文中所使用的空間相對性描述語可同樣相應地進行解釋。
本揭露亦可包括其他特徵及製程。例如,可包括測試結構,以幫助對三維(3D)封裝或3DIC元件進行驗證測試。所述測試結構可例如包括在重佈線層中或在基底上形成的測試墊(test pad),以便能夠對3D封裝或3DIC進行測試、對探針及/或探針卡(probe card)進行使用等。可對中間結構以及最終結構執行驗證測試。另外,可將本文中所揭露的結構及方法與包括對已知良好晶粒進行中間驗證的測試方法結合使用,以提高良率並降低成本。
圖1A至圖1M是示出根據本揭露一些實施例在半導體封裝件SP10的製造製程期間產生的結構的示意性剖視圖。參照圖1A,提供載體C。在一些實施例中,載體C是玻璃基底、金屬板、塑膠支撐板材等,但亦可使用其他合適的基底材料,只要所述材料能夠耐受製程的後續步驟即可。在一些實施例中,可在載體C之上形成剝離層(未示出)。在一些實施例中,剝離層包括光/熱轉換(light-to-heat conversion,LTHC)釋放層,當製造製程需要時,所述LTHC釋放層便利於將載體C自半導體封裝件剝除。
在一些實施例中,在載體C上形成外重佈線層100。在一些實施例中,外重佈線層100包括與一或多個金屬化疊層(metallization tier)120交替堆疊的介電層110。在一些實施例中,介電層110包括至少兩層介電層。金屬化疊層120包括夾置於成對相鄰的介電層110之間的佈線導電跡線。在一些實施例中,介電層110的材料包括聚醯亞胺、環氧樹脂、丙烯酸樹脂、酚醛樹脂、苯環丁烯(benzocyclobutene,BCB)、聚苯並噁唑(polybenzooxazole,PBO)、任何其他合適的聚合物系介電材料或其組合。介電層110可藉由例如旋轉塗佈、化學氣相沈積(chemical vapor deposition,CVD)等合適的製作技術形成。在一些實施例中,金屬化疊層120的材料包括銅、鋁等。在一些實施例中,金屬化疊層120的材料包括銅。在本說明通篇中,用語「銅」旨在包括實質上純的元素銅、包含不可避免的雜質的銅以及包含例如鉭、銦、錫、鋅、錳、鉻、鈦、鍺、鍶、鉑、鎂、鋁或鋯等元素的銅合金。可藉由例如電鍍、沈積及/或微影及蝕刻來形成金屬化疊層120。在一些替代實施例中,視生產要求而定,可形成比圖1A所示者更多的金屬化疊層120及更多的介電層110。在該些實施例中,每一金屬化疊層夾置於一對連續的介電層之間。在一些實施例中,較遠離載體C的介電層110被圖案化成包括開口130,其暴露出較遠離載體C的部分的金屬化疊層120。在一些實施例中,可以經重構晶圓級來執行所述製程,使得多個封裝單元PU以經重構晶圓的形式形成。在圖1A所示剖視圖中,為了簡單起見,示出了二個封裝單元PU,但當然,此僅僅是出於說明目的,且本揭露不受在經重構晶圓中產生的封裝單元PU的數目限制。
參照圖1B,在一些實施例中,在外重佈線層100上設置絕緣層穿孔(through insulation via,TIV)210及半導體橋220。在一些實施例中,TIV 210可藉由用導電材料填充經圖案化罩幕(未示出)的開口來形成。在一些實施例中,TIV 210的導電材料包括鈷(Co)、鎢(W)、銅(Cu)、鈦(Ti)、鉭(Ta)、鋁(Al)、鋯(Zr)、鉿(Hf)、其組合或其他合適的金屬材料。在一些實施例中,可藉由鍍覆製程形成導電材料。鍍覆製程可例如為電鍍、無電鍍覆、浸鍍等。在一些實施例中,導電材料可沈積在晶種層(未示出)上。在一些實施例中,可略過晶種層的形成,乃因金屬化疊層120可為導電材料的沈積提供晶種。然而,本揭露並非僅限於此。在一些替代實施例中,TIV 210可利用其他合適的方法來形成。例如,可將預先製作的TIV 210(例如,預先製作的導電柱)拾放並接合至外重佈線層100上。
在一些實施例中,半導體橋220設置於TIV 210之間的外重佈線層100上。半導體橋220接合至金屬化疊層120的一些佈線導電跡線。在一些實施例中,半導體橋220包括半導體基底221,半導體基底221具有穿過其而形成的半導體穿孔(through semiconductor via,TSV)222及內連導電圖案223。在半導體橋220的較靠近外重佈線層100的底表面220b處可設置有介電層224。半導體基底221可由合適的半導體材料(例如週期表第三族至第五族的半導體材料)形成。在一些實施例中,半導體基底221包含例如矽或鍺等元素半導體材料、例如碳化矽、砷化鎵、砷化銦或磷化銦等化合物半導體材料、或者例如矽鍺、碳化矽鍺、磷砷化鎵或磷化鎵銦等合金半導體材料。內連導電圖案223與在半導體橋220的底表面220b處的介電層224上形成的導電端子225電性接觸。導電端子225可為微凸塊。例如,導電端子225可包括導電柱及設置於所述導電柱上的焊料帽。在一些實施例中,導電柱可為銅柱。然而,本揭露並非僅限於此,且例如焊料凸塊或金屬凸塊(例如,金凸塊)等其他導電結構亦可用作導電端子225。在一些實施例中,半導體橋220被設置成使得底表面220b朝向外重佈線層100,以使得導電端子225可接合至金屬化疊層120。例如,導電端子225可藉由回焊製程被接合至金屬化疊層120。
在一些實施例中,在外重佈線層100上形成包封體230,進而包封TIV 210及半導體橋220。在一些實施例中,藉由包覆模製(over-molding)製程(例如藉由壓縮模製製程)來形成包封體230。包封體230最初可覆蓋TIV 210及半導體橋220的頂表面220t。在一些實施例中,包封體230的材料包括模製化合物、聚合材料,例如聚醯亞胺、環氧樹脂、丙烯酸樹脂、酚醛樹脂、苯環丁烯(BCB)、聚苯並噁唑(PBO)、其組合或其他合適的聚合物系介電材料。在一些實施例中,包封體230可藉由包覆模製製程形成,最初覆蓋TIV 210及半導體橋220,且可隨後被薄化至TIV 210及半導體橋220的頂表面220t暴露出來為止。例如,可執行平坦化製程,進而自頂表面220t、210t的側面移除部分的包封體230,且若有需要,可移除部分的半導體橋220及/或TIV 210。在一些實施例中,對包封體230的平坦化包括執行機械拋光製程及/或化學機械研磨(chemical mechanical polishing,CMP)製程。在平坦化之後,TIV 210的頂表面210t、半導體橋220的頂表面220t及包封體230的頂表面230t可相對於彼此實質上齊平(處於實質上相同的水平高度,相對於彼此共面)。在一些實施例中,TIV 210、半導體橋220及包封體230被認為是堆疊於外重佈線層100上的橋接層200的部分。亦即,半導體橋220及TIV 210嵌置於橋接層200中。
參照圖1C,在橋接層200上形成內重佈線層300。內重佈線層300包括介電層310、一或多個金屬化疊層320且視需要包括凸塊下金屬330。內重佈線層300可具有與前面針對外重佈線層100闡述的結構相似的結構,且可按照與前面針對外重佈線層100闡述的製程相似的製程來形成。在一些實施例中,(最上部)介電層310被圖案化成暴露出下伏的金屬化疊層320。凸塊下金屬330視需要共形地形成於(最上部)介電層310的暴露出金屬化疊層320的開口中,且可進一步在部分的(最上部)介電層310的被暴露出的表面之上延伸。在一些實施例中,凸塊下金屬330包括多個導電材料堆疊層。例如,凸塊下金屬330可包括堆疊於晶種層上的一或多個金屬層。在一些實施例中,外重佈線層100、橋接層200及內重佈線層300可被統稱為重佈線結構。
參照圖1D,在一些實施例中,利用拾放(pick-and-place)製程將半導體晶粒410、420並排設置於內重佈線層300之上。在一些實施例中,半導體晶粒410、420是包封晶片。例如,半導體晶粒410可包括上方接合有一或多個由晶片413而成的堆疊的基礎晶片411。晶片413可被垂直堆疊,且藉由微凸塊415在堆疊內內連。在基礎晶片411上可設置有包封體417,以包封由晶片413及微凸塊415而成的堆疊。在基礎晶片411上相對於晶片413相對的一側處可設置有連接件419。半導體晶粒420可具有與半導體晶粒410相似的結構,包括基礎晶片421、藉由微凸塊425內連的經堆疊晶片423、包封晶片423及微凸塊425的包封體427、以及連接件429。
在一些實施例中,半導體晶粒410、420被放置在內重佈線層300上使得基礎晶片411、421的上面形成有連接件419、429的側面朝向內重佈線層300。半導體晶粒410、420的後表面410r、420r可包括堆疊的最頂部晶片413、423的後表面及包封體417、427的頂表面。在一些實施例中,半導體封裝件中所包括的半導體晶粒410、420可具有不同的尺寸,可包括不同的組件,及/或可包括尺寸不同的組件。例如,半導體晶粒410、420可因所包括的晶片413、423的數目、所包括的經堆疊晶片413、423或基礎晶片411、421的類型等而不同。每一半導體晶粒410、420可以是獨立地是邏輯晶粒或包括邏輯晶粒,例如中央處理單元(central processing unit,CPU)晶粒、圖形處理單元(graphic processing unit,GPU)晶粒、微控制單元(micro control unit,MCU)晶粒、輸入-輸出(input-output,I/O)晶粒、基頻(baseband,BB)晶粒或應用處理器(application processor,AP)晶粒。在一些實施例中,半導體晶粒410、420中的一或二者可為記憶體晶粒。
在一些實施例中,半導體橋220的內連導電圖案223電性連接同一封裝單元PU的半導體晶粒410與420。亦即,藉由內重佈線層300及內連導電圖案223建立半導體晶粒410與420之間的電性連接。在一些實施例中,內重佈線層300不直接內連半導體晶粒410、420。在一些實施例中,半導體橋220將與半導體晶粒410電性連接的金屬化疊層320的至少一個導電跡線連接至與半導體晶粒420連接的金屬化疊層320的另一導電跡線。在一些實施例中,半導體橋220連接與半導體晶粒410重疊的一或多個導電跡線以及與半導體晶粒420重疊於的一或多個導電跡線。在相鄰的半導體晶粒410、420之間存在間隙的一些實施例中,半導體橋220在此間隙之上延伸。在一些實施例中,半導體橋220用作相鄰半導體晶粒410、420的內連結構,並在相鄰半導體晶粒410、420之間提供較短的電性連接路徑。
在一些實施例中,在內重佈線層300之上形成包封體500,以包封半導體晶粒410、420。包封體500橫向環繞半導體晶粒410、420,亦在半導體晶粒410、420之間的間隙中延伸。在一些實施例中,包封體500的材料可依照以上針對包封體230所述者來選擇。包封體500可藉由一系列包覆模製及平坦化步驟形成。例如,包封體500最初可藉由模製製程(例如壓縮模製製程)或旋轉塗佈製程來形成,以完全覆蓋半導體晶粒410、420。在一些實施例中,對包封體500的平坦化包括執行機械拋光製程及/或化學機械研磨(CMP)製程。在一些實施例中,執行平坦化製程,直至半導體晶粒410、420的後表面410r、420r暴露出來為止。在一些實施例中,在平坦化製程之後,半導體晶粒410、420的後表面410r、420r與包封體500的頂表面500t可沿著Z方向實質上處於相同的水平高度(實質上共面)。
參照圖1D及圖1E,在一些實施例中,可將第二載體C1接合於包封體的頂表面500t的側上,翻轉重構晶圓,並移除原始載體C,暴露出外重佈線層100,以進行進一步製程。當包含剝離層(例如,LTHC釋放層)時,可利用紫外線(ultraviolet,UV)雷射輻照剝離層,使得載體C及剝離層輕易地從重構晶圓剝除。然而,剝離製程並非僅限於此,在一些替代實施例中可使用其他合適的剝離方法。在外重佈線層100中,可在相對於TIV 210及半導體橋220相對的一側處形成開口,以暴露出金屬化疊層120。於在外重佈線層100上設置連接端子600之前,可視需要在開口中形成與金屬化疊層120接觸的凸塊下金屬140。可在凸塊下金屬140(若包括的話)或金屬化疊層120的暴露部分上形成連接端子600。在一些實施例中,連接端子600形成於凸塊下金屬140上,且經由外重佈線層100、半導體橋220(例如,藉由TSV 222)、TIV 210及內重佈線層300連接至半導體晶粒410、420。在一些實施例中,連接端子600藉由焊劑附著至凸塊下金屬140。在一些實施例中,連接端子600是受控塌陷晶片連接(controlled collapse chip connection,C4)凸塊。在一些實施例中,連接端子600包含具有低電阻率的導電材料,例如Sn、Pb、Ag、Cu、Ni、Bi或其合金。
在一些實施例中,參照圖1E及圖1F,執行單體化步驟,以將單獨的封裝單元PU分離成多個封裝晶粒10,例如,藉由沿著佈置於單獨的封裝單元PU之間的切割道SC進行切割。在一些實施例中,單體化製程通常涉及利用旋轉刀片及/或雷射束執行晶圓切分製程。在一些實施例中,在單體化後將載體C1自封裝晶粒10分離。
參照圖1G,在一些實施例中,可藉由連接端子600將封裝晶粒10連接至電路基底700。例如,可將封裝晶粒10設置於電路基底700上,並執行焊接步驟。在一些實施例中,電路基底700包括嵌置有導電跡線720的芯介電層710。在電路基底700的上側700a上(即設置有封裝晶粒10的同一側700a處)可設置有上部焊料罩幕730。焊料罩幕730可在芯介電層710上延伸,且可包括暴露出最外導電跡線720的開口。封裝晶粒10的連接端子600可設置於焊料罩幕730的開口中,以接觸導電跡線720。在一些實施例中,在封裝晶粒10與電路基底700之間可視需要設置有底部填料800。底部填料800可橫向包覆連接端子600,例如,以保護連接端子600免受機械應力。在一些實施例中,在電路基底700的底側700b處於芯介電層710上可設置另一焊料罩幕740。
在一些實施例中,在電路基底700的上側700a上封裝晶粒10旁邊設置有被動元件900。在一些實施例中,被動元件900藉由拾放方法放置於電路基底700上。在一些實施例中,被動元件900是具有積體被動元件的晶片,且用作電容器、電感器、電阻器等。在一些實施例中,每一被動元件900可獨立地用作具有不同電容值、共振頻率及/或不同尺寸的電容器、電感器等。在一些實施例中,被動元件900被設置成使得前表面朝向電路基底700,以便與電路基底700的導電跡線720連接。在一些實施例中,封裝晶粒10、電路基底700、底部填料800及被動元件900可被統稱為封裝模組PM1。半導體晶粒410、420的後表面410r、420r可為封裝模組PM1的頂表面的一部分。儘管圖1G中出於說明性目的而在封裝模組PM1內僅呈現了二個被動元件900,但本揭露不限於封裝模組PM1中所包括的被動元件900的數目。實際上,本揭露並不限制封裝模組PM1的可能結構。雖然在圖式中示出了封裝模組PM1以呈現本揭露的一些態樣,但在本揭露的範圍內預期具有與圖1A至圖1G所示之封裝模組PM1不同的結構或者利用不同製造製程製作的封裝模組。
圖2A是根據本揭露一些實施例用於製造半導體封裝件的治具1000A的示意性立體圖。圖3是根據本揭露一些實施例設置於載體C2上的治具1000A的示意性俯視圖。參照圖1H、圖2A及圖3,在一些實施例中,治具1000A的一或多個底件(bottom piece)1010可例如以陣列方式設置於載體C2上。將顯而易見,儘管圖3中示出了六個治具1000A,但本揭露不限於設置於載體C2上的治具1000A的數目。在一些實施例中,治具1000A包括底件1010、舟皿(boat)1030及上件(upper piece)1040。最初可將治具1000A的底件1010設置於載體C2上,且可將對應的舟皿1030設置於底件1010上。一或多個封裝模組PM1可設置於治具1000A的底件1010上,且可由舟皿1030保持在適當的位置。在一些實施例中,封裝模組PM1設置於治具1000A的底件1010上,電路基底700朝向治具1000A的底件1010。例如,當封裝模組PM1設置於治具1000A上時,電路基底700可延伸穿過舟皿1030以接觸治具1000A的底件1010。雖然在圖3中八個封裝模組PM1設置於治具1000A上,但每一治具1000A的封裝模組PM1的數目不受限制。在一些替代實施例中,於同一治具1000A上可設置更少或更多的封裝模組PM1。在一些實施例中,圖1H至圖1M所示剖視圖可被認為是在與圖3中的線I-I’對應的位置處截取。
在一些實施例中,治具1000A的底件1010包括基座(base)1012,且可包括形成於基座1012的中心區中的一或多個凸台(plateaus)1014。在一些實施例中,凸台1014相對於基座1012的頂表面凸起(沿著Z方向)。在一些實施例中,基座1012呈現環繞凸台1014的周邊區。在一些實施例中,基座1012的周邊區可被認為是鄰近治具1000A的外緣而環繞凸台1014的環形區。在一些實施例中,位於相鄰凸台1014之間的基座1012的平整區亦可被認為是基座1012的周邊區的一部分。在一些實施例中,每一凸台1014上可設置有彈簧1016,以支撐支撐板1018。在一些實施例中,設置於凸台1014上的彈簧1016的數目不受特別限制,且可例如介於0與200之間。在一些實施例中,封裝模組PM1設置於彈簧1016之上的支撐板1018上。在一些實施例中,具有對應支撐板1018的凸台1014可與欲設置於治具1000A上的封裝模組PM1的數目相同,使得每一封裝模組PM1可具有專用的凸台1014及支撐板1018。在一些實施例中,基座1012中可嵌置有磁體1020。例如,磁體1020可嵌入基座1012的環形周邊區中。在一些實施例中,磁體沿著基座1012的邊緣以彼此規則的間隔設置。在一些實施例中,磁體1020的一個表面對應於基座1012的頂表面而暴露出。然而,磁體1020可嵌置於基座1012中,使得基座1012的頂表面除了凸台1014之外可實質上平整,甚至在磁體1020暴露出的地方亦是如此。
在一些實施例中,在設置封裝模組PM1之前,將舟皿1030設置於底件1010上。舟皿1030包括形成有一或多個封裝件開口1034的本體1032。本體1032可為整體塊,例如具有矩形覆蓋區的平行六面體塊。封裝件開口1034是覆蓋區與封裝模組PM1的覆蓋區實質上匹配的貫通孔(through hole)。封裝件開口1034可略大於封裝模組PM1,使得封裝模組PM1可容置於封裝件開口1034內並保持就位於底件1010上。在一些實施例中,治具1000A的舟皿1030可包括與凸台1014及支撐板1018相同數量的封裝件開口1034。例如,圖式中所示的舟皿1030包括八個封裝件開口1034。在一些實施例中,底件1010與舟皿1030之間可設置有對齊機構。例如,在支撐板1018上於支撐板1018的一或多個轉角處可形成有對準銷1019。在本體1032的一位置處可形成有對準孔1036,所述位置被選擇成當將對準銷1019插入於對準孔1036中時,可使得底件1010與舟皿1030之間正確對齊。在圖2A中,對準孔1036形成於封裝件開口1034的四個轉角處,且對準銷1019形成於支撐板1018的四個轉角處。然而,本揭露並非僅限於此。在一些替代實施例中,可在支撐板1018上形成更少的對準銷1019(及對應的對準孔1036)。例如,對準銷1019可僅形成於支撐板1018的一些轉角處(例如,形成於一個、二個或三個轉角處)。舉例而言,在圖2B中示出了根據本揭露一些實施例的治具1000B的立體圖。治具1000B與圖2A所示治具1000A相似。治具1000B與圖2A所示治具1000A之間的差異可為在支撐板1018上形成有二個對準銷1019。如圖2B所示,對準銷1019可形成於支撐板1018的不同位置處。在一些實施例中,對準銷1019可按照對稱方案設置於支撐板1018上,使得舟皿1030B可根據多於一種定向定位於底件1010B上。例如,對準銷1019及對準孔1036的型樣可使得舟皿1030B可圍繞X方向、Y方向或Z方向中的每一者旋轉180度,且仍被正確地插入於底件1010B上。在一些實施例中,藉由採用對稱性較高的配置,可簡化治具1000B的自動化組裝。在一些替代實施例中,對準銷1019可並非形成於所有支撐板1018上,而是僅形成於其中的幾個上。例如,在圖2C所示治具1000C中,底件1010C包括其中形成有一或多個對準銷1019(例如,一個、二個、三個、四個等)的支撐板10181以及其中未形成對準銷的支撐板10182。在一些實施例中,對準銷1019可以形為不對稱的或對稱性較低的圖案。在一些替代實施例中,對準銷1019可不形成於支撐板1018上,而是直接形成於基座1012上。在又一些替代實施例中,對準銷可形成於舟皿1030D上,且可被容置於形成在底件1010D的基座1012D中的對準孔1017(或對齊套筒,未示出)中,如針對圖2D的治具1000D所示。如以上實例所示,本揭露並不限制對準銷及對應對準孔的位置及數目。
在一些實施例中,在將封裝模組PM1設置於治具1000A上之後,將治具1000A的上件1040放置於對應的底件1010上,例如圖1I中所示。參照圖1I及圖2A,治具1000A的上件1040的覆蓋區與對應基座1012的覆蓋區實質上匹配。上件1040被放置於底件1010上。在一些實施例中,在放置上件1040之前,將上件1040與底件1010垂直對齊,進而使上件1040的覆蓋區與底件1010的覆蓋區匹配。在一些實施例中,上件1040包括帽1042及外凸緣1044。外凸緣1044可設置於帽1042的周邊處。亦即,外凸緣1044可位於帽1042的邊緣處,且朝向基座1012突出。在一些實施例中,帽1042上覆於支撐板1018及設置於支撐板1018上的封裝模組PM1上。在一些實施例中,若外凸緣1044沿著垂直方向(例如,Z方向)自帽1042延伸至基座1012,則可認為帽1042沿著正交的X方向及Y方向延伸,以覆蓋基座1012的覆蓋區。在一些實施例中,外凸緣1044與帽1042是一體形成。亦即,外凸緣1044與帽1042可被形成為單件,其彼此接合且在二者之間沒有清晰的介面。
在一些實施例中,外凸緣1044到達基座1012的設置有磁體1020之處。在一些實施例中,外凸緣1044對應於基座1012的環形周邊區而接觸基座1012。在一些實施例中,在外凸緣1044中與磁體1020對應的位置中嵌置有磁體1050。在一些實施例中,磁體1020及磁體1050可被極化,以相互吸引。在一些實施例中,治具1000A的上件1040可藉由磁體1020、1050所產生的吸引力被固定至底件1010。在一些實施例中,磁體1020可相對於相鄰磁體1020具有不同的極化。例如,假定有三個磁體1020連續設置成一列,中心磁體1020可相對於另外二個磁體1020具有相反的極化。在上件1040中,對應的三個磁體1050亦可被極化成使得中心磁體1050被吸引至中心磁體1020,而另外二個磁體1050被吸引至另外二個磁體1020。在一些實施例中,磁體1020、1050的極化型樣可被採納成使得磁體1020、1050將治具1000A的上件1040與底件1010固持於一起,且亦確保上件1040與底件1010之間的正確對齊。然而,本揭露並非僅限於此。在一些替代實施例中,可省略磁體1020、1050,且可藉由其他緊固件(例如,機械緊固件,例如螺釘或夾具)將上件1040與底件1010固持於一起。例如,在圖2E所示的治具1000E中,底件1010E的基座1012E包括形成於環形周邊區中的螺紋孔1020E。螺釘1050E自帽1042E之上延伸穿過上件1040E的外凸緣1044E,以被容置於螺紋孔1020E中。治具1000E的其他態樣可與先前針對圖2A所示治具1000A所述的相似。
在一些實施例中,外凸緣1044朝向基座1012延伸,並環繞設置於基座1012上的凸台1014及封裝模組PM1。在一些實施例中,外凸緣1044、帽1042及基座1012界定容置封裝模組PM1的中空空間。亦即,封裝模組PM1可被容納於治具1000A內。在一些實施例中,穿過帽1042形成有開口1046,使得封裝模組PM1的頂表面至少部分地由治具1000A暴露出。例如,半導體晶粒410、420的後表面410r、420r被開口1046裸露出來。在一些實施例中,開口1046可形成於帽1042中,使得帽1042仍沿著開口1046的邊緣接觸封裝模組PM1。在一些實施例中,開口1046在XY平面中的面積小於下伏的封裝模組PM1及支撐板1018的跨度。在一些實施例中,開口1046的區域的垂直投影可完全落在下伏的支撐板1018上。在一些實施例中,開口1046的區域的垂直投影可完全落在下伏的支撐板1018的由封裝件開口1034露出的部分上。在一些實施例中,藉由彈簧1016的作用,封裝模組PM1可被推靠至帽1042上,使得封裝模組PM1密封開口1046的底部。例如,包封體500可在開口1046的邊緣處接觸帽1042並被推靠至帽1042上。然而,本揭露並非僅限於此。例如,在其中封裝模組的後表面與晶片的後表面實質上重合(例如,對應於半導體基底的後表面)的封裝模組(未示出)中,晶片的後表面的邊緣可圍繞開口1046接觸帽1042,且晶片的後表面的剩餘部分可由開口1046暴露出。在一些實施例中,可選擇外凸緣1044沿著Z方向的高度,使得封裝模組PM1密封開口1046。在一些實施例中,可省略彈簧1016,且封裝模組PM1上的壓縮力可由封裝模組PM1與外凸緣1044的相對高度產生。例如,在圖2F所示的治具1000F中,支撐板1018直接形成於基座1012F上,而沒有如圖2A所示治具1000A中的彈簧或凸台。可藉由選擇外凸緣1044F的高度來調節封裝模組上的壓縮力。在一些實施例中,可藉由容置於在基座1012F中形成的螺紋孔1020F中的螺釘1050F來接合上件1040F與底件1010F,以進一步細調由治具1000F產生的壓縮力。然而,本揭露並非僅限於此,且在一些替代實施例中,可採用其他緊固件(例如,如圖2A所示治具1000A中的磁體、夾具等)。在又一些替代實施例中,可包括除彈簧之外的其他彈性構件,以將封裝模組PM1推靠至上件1040上。例如,凸台1014與支撐板1018之間可設置有例如橡膠墊等彈性墊1016G,如針對圖2G的治具1000G的底件1010G所示。彈性墊1016G的彈性性質可被選擇成使得有足夠的推力作用於封裝模組PM1上。在一些實施例中,存在與圍封於治具1000A中的封裝模組PM1的數目一樣多的開口1046,每一封裝模組PM1一個開口1046。
在一些實施例中,治具1000A的底件1010、舟皿1030及上件1040可獨立地由任何合適的材料形成。例如,用於底件1010、舟皿1030及上件1040的材料可獨立地包括不銹鋼、鐵、銅、鈦、其他金屬、陶瓷材料或能夠耐受製造製程後續步驟的任何材料。在一些實施例中,治具1000A可經由陽極化或鈍化處理(例如,利用鎳),以增強其耐環境性並減少後續製造步驟中的干擾。
在一些實施例中,在封裝模組PM1的頂表面被開口1046暴露出的部分上形成背側金屬化層1110,如圖1J所示。在一些實施例中,背側金屬化層1110可包含導熱材料,例如鈷(Co)、鎢(W)、銅(Cu)、鈦(Ti)、鉭(Ta)、鋁(Al)、鋯(Zr)、鉿(Hf)、鎳(Ni)、銀(Ag)、金(Au)、鋅(Zn)、NiV、其組合或其他合適的金屬材料。在一些實施例中,藉由例如濺鍍或蒸鍍等合適的沈積製程來形成背側金屬化層1110。在一些實施例中,由於封裝模組PM1被壓靠至帽1042上以密封開口1046(例如,藉由彈簧1016的作用),因此背側金屬化層1110的材料可選擇性地形成於封裝模組PM1的頂表面上,而不會滲入並沈積於封裝模組PM1的其他區中(例如,電路基底700上)。亦即,包括開口1046的上件1040可在背側金屬化層1110的形成期間充當沈積罩幕,進而保護封裝模組PM1的其中不需要背側金屬化層1110的區。在一些實施例中,背側金屬化層1110的材料可最初沈積於治具1000A的上件1040上以及開口1046內。參照圖1J及圖1K,在一些實施例中,可自治具1000A收回封裝模組PM1。例如,可藉由移除上件1040來敞開治具1000A,且可自敞開的治具1000A拾取封裝模組PM1。在一些實施例中,封裝模組PM1可在沒有附加黏合劑的情況下被簡單地放置於治具1000A的底件1010上,由舟皿1030固持就位。在此類實施例中,可方便地自治具1000A收回上面形成有背側金屬化層1110的封裝模組PM1,而不需要附加製程來處理黏合材料、移除保護膠等。在一些實施例中,可在形成背側金屬化層1110之後自治具1000A收回封裝模組PM1。然後,可清潔治具1000A以移除形成於上件1040上的背側金屬化層1110的材料,進而重新用於製造其他封裝模組PM1。
參照圖1L,在一些實施例中,然後可在背側金屬化層1110上設置熱介面材料(thermal interface material,TIM)1120,例如圖1K中所示。在一些實施例中,TIM 1120是黏合材料。在一些實施例中,TIM 1120包含油脂系材料、相變材料、凝膠、黏合劑、聚合物、金屬材料或其組合。在一些實施例中,TIM 1120包含鉛-錫系焊料(PbSn)、無鉛焊料、銀膏(Ag)、金、錫、鎵、銦、碳複合材料、石墨、奈米碳管或其他合適的導熱材料。在一些實施例中,TIM 1120是凝膠型材料。根據所用材料的類型,可藉由沈積、層壓(lamination)、印刷、鍍覆或任何其他合適的技術來形成TIM 1120。例如,可在封裝模組PM1上施配凝膠型材料。在一些替代實施例中,TIM 1120可為膜型材料。例如,TIM 1120可為導電材料片材(例如,奈米碳管、石墨烯或石墨)、或在基礎材料中嵌置有例如填料(例如,粉末、片狀顆粒、奈米管、纖維等)等導電材料的複合膜。
在一些實施例中,在電路基底700的上側700a上鄰近電路基底700的外緣700e設置黏合劑1200。在一些實施例中,電路基底700的外緣700e是將上側700a連接至相對的底側700b的周邊表面。在一些實施例中,黏合劑1200遵循電路基底700的外緣700e的輪廓而形成框架。例如,若電路基底700具有矩形覆蓋區,則黏合劑1200可具有矩形框架的形狀。相似地,若電路基底700具有圓形覆蓋區,則黏合劑1200可具有圓形框架的形狀。在一些實施例中,在電路基底700上設置黏合劑1200的多個部分。亦即,由黏合劑1200形成的框架可為不連續的,呈現出其中使電路基底700在黏合劑1200的連續部分之間暴露出的間隙。封裝晶粒10及被動元件900設置於由黏合劑1200形成的框架內。在一些實施例中,黏合劑1200包括可熱固化黏合劑、可光固化黏合劑、導熱黏合劑、熱固性樹脂、防水黏合劑、層壓黏合劑或其組合。在一些實施例中,黏合劑1200包括導熱黏合劑。在一些實施例中,黏合劑1200包括上面沈積有焊料膏(未示出)的金屬層(未示出)。根據所用材料的類型,可藉由沈積、層壓、印刷、鍍覆或任何其他合適的技術形成黏合劑1200。
圖1M是根據本揭露一些實施例的半導體封裝件SP10的剖視圖。在一些實施例中,製造半導體封裝件SP10包括在電路基底700上(例如在圖1L所示的結構上)設置金屬蓋1300。在一些實施例中,金屬蓋1300可由導電材料製成。例如,金屬蓋1300可包含例如銅等金屬材料。在一些實施例中,金屬蓋1300可在其被安裝於電路基底700上之前經由陽極化或鈍化處理(例如,利用鎳),以增強其耐環境性。在一些實施例中,金屬蓋1300的覆蓋區與電路基底700的覆蓋區實質上匹配。在一些實施例中,金屬蓋1300包括蓋子(lid)1310及凸緣1320。金屬蓋1300被放置於電路基底700之上。在一些實施例中,在放置金屬蓋1300之前,將金屬蓋1300與電路基底700垂直對齊,且金屬蓋1300的覆蓋區與電路基底700的覆蓋區匹配。凸緣1320可設置於蓋子1310的周邊處。亦即,凸緣1320可位於蓋子1310的邊緣處,且朝向電路基底700突出。在一些實施例中,蓋子1310設置於電路基底700及半導體封裝件SP10之上。在一些實施例中,若凸緣1320沿著垂直方向(例如,Z方向)自蓋子1310延伸至電路基底700,則蓋子1310可被認為沿著X方向及Y方向延伸以覆蓋電路基底700的覆蓋區。在一些實施例中,凸緣1320與蓋子1310是一體形成。亦即,凸緣1320與蓋子1310可形成為單個件,其彼此接合且在二者之間沒有清晰的介面。在一些實施例中,凸緣1320朝向電路基底700延伸,並環繞封裝晶粒10及被動元件900。在一些實施例中,凸緣1320到達電路基底700的設置有黏合劑1200之處。黏合劑1200可將凸緣1320固定至電路基底700。在一些實施例中,黏合劑1200僅設置於電路基底700上的預期凸緣1320與電路基底700接觸之處。在一些實施例中,背側金屬化層1110、TIM 1120及金屬蓋1300可促進在半導體封裝件SP10的使用期間產生的熱量的耗散。
如以上揭露內容所說明,在一些實施例中,最初可以重構晶圓的形式處理封裝晶粒10,且可在封裝晶粒10自重構晶圓被單體化並連接至電路基底700以形成封裝模組PM1(例如圖1G所示)之後形成背側金屬化層1110。由於當封裝晶粒10被單體化或連接至電路基底700時尚未形成背側金屬化層1110,因此可在較少關注鋸切或回焊製程期間的材料行為的情況下選擇背側金屬化層1110的材料。因此,可自較寬範圍的候選項選擇背側金屬化層1110的材料,例如更多地考量材料的散熱性質。在一些實施例中,可將封裝模組PM1放置於用於半導體製造的治具1000A(例如圖2A所示)中,治具1000A可在背側金屬化層1110的形成期間用作沈積罩幕。如此一來,治具1000A可保護封裝模組PM1的上面不需要或不期望沈積背側金屬化層1110的表面。在一些實施例中,治具1000A的底件1010與上件1040可藉由成對的磁體1020、1050(或其他機械緊固件)的作用固持於一起,使得可在不進行附加的固化、處理或清洗步驟的情況下達成對治具1000A的組裝及拆卸。因此,可簡化半導體封裝件SP10的製造製程,進而增加製程良率並降低製造成本。
圖4是根據本揭露一些實施例用於製造半導體封裝件的治具1400的示意性立體圖。治具1400具有與圖2A所示治具1000A相似的結構。圖2A所示治具1000A與圖4所示治具1400之間的差異為,圖4所示治具1400適於製造更大的半導體封裝件(例如,具有更大覆蓋區的半導體封裝件)。因此,即使治具1400及1000A的底件1410、1010具有實質上相同的覆蓋區(在XY平面中佔據相同的空間),亦在治具1400的基座1412上形成更少(例如,四個而不是8個)但更大的凸台1414。相似地,舟皿1430在本體1432中形成有更少的封裝件開口1434,但封裝件開口1434的尺寸(例如,沿著X方向及Y方向的尺寸DX及DY)可大於圖2A所示封裝件開口1034的對應尺寸。相似地,上件1440包括形成於帽1442中的更少但更大的開口1446。治具1400與圖2A所示治具1000A之間的另一差異在於,對準銷1419形成於基座1412上,而不是支撐板1418上。例如,對準銷1419位於基座1412的環形周邊區的四個內轉角處。因此,在舟皿1430的本體1432中形成有四個對準孔1436。二個治具1000A、1400的其他態樣可相同,如前面所述。例如,在凸台1414與支撐板1418之間設置有由彈簧1416而成的陣列,且在基座1412中(例如在環形周邊區中)嵌置有磁體1420,以藉由與嵌置於上件1440的外凸緣1444中的磁體1450的相互作用將上件1440與底件1410固持於一起。
圖5是根據本揭露一些實施例用於製造半導體封裝件的治具1500的示意性立體圖。治具1500具有與圖2A所示治具1000A相似的結構。圖2A所示治具1000A與圖5所示治具1500之間的差異為,圖5所示治具1500適於製造一種更大的半導體封裝件(例如,大尺度半導體封裝件)。因此,即使治具1500及1000A的底件1510、1010具有實質上相同的覆蓋區(在XY平面中佔據相同的空間),治具1500亦包括單個支撐板1515。在一些實施例中,與以上關於圖2A所示支撐板1018所論述的相似,支撐板1515視需要設置於彈簧或其他彈性構件(未示出)上。在一些替代實施例中,支撐板1515直接設置於基座1512上,且甚至可與基座1512一體形成。在一些實施例中,治具1500的底件1510不包括凸台(例如圖2A所示凸台1014)。而是,基座1512在環形周邊區中較在對應於支撐板1515之處具有更大的厚度,進而形成其中定位有支撐板1515的凹槽1518。當包括彈性構件(未示出)時,所述彈性構件設置於凹槽1518的底部處以固持支撐板1515。在一些實施例中,治具1500不包括舟皿(例如圖2A所示舟皿1030)。在一些實施例中,由於支撐板1515位於凹槽1518內,因此當封裝模組(未示出)設置於治具1500內時,凹槽1518可將封裝模組保持就位。然而,本揭露並非僅限於此,且在一些替代實施例中,治具1500中亦可包括舟皿(未示出),例如以使治具1500適於製造不同尺寸的半導體封裝件及/或一起製造多個半導體封裝件。在一些實施例中,舟皿可容置於凹槽1518中,使得不需要包括再一些對齊機構。然而,本揭露並非僅限於此,且在一些替代實施例中,亦可包括對齊機構(例如,銷及對應的孔)。在一些實施例中,上件1540具有與上件1040相似的結構,但在帽1542中包括更少的(例如,單個)開口1546。在一些實施例中,治具1500可設置有其中開口1446的尺寸或數目不同的多個上件1440,使得不同尺寸的封裝模組可設置於治具1500內,且在形成背側金屬化層及/或TIM期間仍密封開口1446。治具1500的其他態樣可與前面針對圖2A所示治具1000A所述的相似。例如,在基座1512中(例如在環形周邊區中)嵌置有磁體1520,以藉由與嵌置於上件1540的外凸緣1544中的磁體1550的相互作用將上件1540與底件1510固持於一起。
在本揭露的一些實施例中,可以各種方式組合圖2A至圖2G、圖4及圖5所示治具1000A至1000G、1400、1500的特徵。例如,即使當如針對治具1000A至1000G或1400所論述在同一治具內製造多個封裝模組時,亦可將支撐板1018或1418設置於相應基座1012、1412的凹槽內,如針對治具1500所論述。相似地,即使當如同在圖5所示治具1500中將支撐板容置於基座的凹槽中時,亦可在支撐板上包括例如1019或1419等對準銷。做為再一實例,可對治具1400及1500使用替代緊固構件,如以上針對圖2E及圖2F所示治具1000E、1000F所述。此外,在治具1000A至1000E、1400或1500中的任何一者中,彈簧可由其他彈性構件(例如圖2G所示彈性墊1016G)替代。
圖6A至圖6C是根據本揭露一些實施例在半導體封裝件SP20的製造製程期間產生的結構的示意性剖視圖。圖7是在製造半導體封裝件SP20時採用的治具1600A的示意性立體圖。圖6A中示出根據本揭露一些實施例上面形成有TIM 1120的封裝模組PM2。封裝模組PM2可具有與前面關於圖1G所示封裝模組PM1所論述的相似的結構,且可按照與前面參照圖1A至圖1G所述的相似的製程來製造。在一些實施例中,可藉由在半導體晶粒410、420的後表面410r、420r上形成TIM 1120且藉由在電路基底700的上側700a上設置黏合劑1200而自圖1G所示結構獲得圖6A所示結構。
在一些實施例中,參照圖6A及圖6B,可藉由採用治具1600A將金屬蓋1300接合至電路基底700。例如,金屬蓋1300可在凸緣1320接觸黏合劑1200的情況下設置於電路基底700上。一旦金屬蓋1300與黏合劑接觸,便可例如在50℃至200℃之間的溫度下例如在10秒至900秒範圍內的時間內將黏合劑1200預固化。在一些實施例中,在預固化步驟期間,可確定TIM 1120的沿著Z方向的厚度。相似地,預固化步驟可確定所得半導體封裝件的翹曲。
圖7是治具1600A的示意性立體圖。參照圖6B及圖7,在一些實施例中,可將上面視需要預接合有金屬蓋1300的封裝模組PM2設置於治具1600A的底件1610上。在一些實施例中,治具1600A的底件1610包括基座1611且視需要包括凸台1613。當形成有凸台1613時,封裝模組PM2在基座1611的中心區中設置於凸台1613上。凸台1613可由基座1611的環形周邊區環繞。在一些實施例中,封裝模組PM2被設置成使得電路基底700接觸底件1610。然後,可以使得封裝模組PM2及金屬蓋1300藉由治具1600A的作用被壓縮的方式將治具1600A的上件1620放置並緊固於治具1600A的底件1610上。在一些實施例中,上件1620包括上覆於封裝模組PM2及金屬蓋1300上的帽1621以及設置於帽1621的周邊處的外凸緣1622。在一些實施例中,外凸緣1622上覆於基座1611的環形周邊區上。在一些實施例中,外凸緣1622的沿著Z方向的厚度可大於帽1621的沿著Z方向的厚度。亦即,上件1620可對應於帽1621而呈現凹槽。
在上件1620的凹槽中可設置有由彈簧1623而成的陣列。在一些實施例中,彈簧1623的一個端子附接至帽1621,且彈簧1623的另一端子附接至剛性板1624。在一些實施例中,每一剛性板1624有約0至200個彈簧1623。在一些實施例中,剛性板1624具有相對於彈簧1623依序堆疊於相對一側上的彈性墊1625及釋放層1626。在一些實施例中,彈性墊1625可包含熱塑性樹脂,例如聚醚醯亞胺(polyetherimide,PEI)或聚醚醚酮(polyether ether ketone,PEEK)、(甲基)丙烯酸樹脂、環氧樹脂、其組合等。在一些實施例中,如針對圖8所示治具1600B所示,彈性墊1625B可更包括分散於上述樹脂16252中的一或多種中的碳系填料16251。在一些實施例中,碳系填料16251可為金剛石、石墨、非晶碳或其組合中的任何一種。在一些替代實施例中,例如,彈性墊1625可由碳系材料(包括石墨、非晶碳或奈米碳管)形成。例如,圖9A中示意性地示出根據本揭露一些實施例的治具1600C的剛性板1624及彈性墊1625C。在治具1600C中,彈性墊1625C包括分散於樹脂16252中的奈米碳管16253,所述樹脂16252可選自例如以上列出的材料。在一些替代實施例中,彈性墊1625D可由附接至剛性板1624而不分散於樹脂中的奈米碳管16253形成,如針對圖9B中的治具1600D所示。奈米碳管16253可在一端處附接至剛性板1624,且在相對端處附接至釋放層1626。亦即,奈米碳管16253可被定向成垂直於剛性板1624及釋放層1626的主延伸平面。在一些替代實施例中,如針對圖9C的治具1600E所示,彈性墊1625可全部由奈米碳管16253形成。奈米碳管16253可被設置成彼此平行,位於剛性板1624的主延伸平面上,夾置於剛性板1624與釋放層1626之間。亦即,奈米碳管16253可被設置成使得壁沿著長度維度在一側處接觸剛性板1624且在相對一側處接觸釋放層1626。在一些實施例中,剛性板1624及彈性墊1625藉由彈簧1623的作用在金屬蓋1300上施加壓力。在一些替代實施例中,在剛性板1624與帽1621之間可設置有除彈簧之外的彈性構件。例如,在圖10A所示的治具1600F中,上件1620F包括設置於帽1621與剛性板1624之間的可壓縮墊1623F。在又一些替代實施例中,如針對圖10B的治具1600G所示,剛性板1624可直接連接至帽1621,且可藉由設定上件1620G與底件1610的距離來調節封裝模組PM2上的壓力。在一些實施例中,包括釋放層1626以防止或降低金屬蓋1300黏附至彈性墊1625的可能性。在一些實施例中,釋放層1626可包含聚合材料,例如聚醯亞胺、(甲基)丙烯酸酯或環氧樹脂。在一些實施例中,可藉由選擇具有適當彈簧(或彈性)常數的彈簧1623(或墊1623F)來控制夾緊力。在一些實施例中,剛性板1624、橡膠墊1625及釋放層1626在XY平面中具有與金屬蓋1300相似的覆蓋區,使得上件1620可施加實質上均勻的壓力。在一些實施例中,上件1620例如藉由螺紋螺釘1630被擰緊至底件1610。在一些實施例中,外凸緣1622中形成有貫通孔1628,螺釘1630穿過貫通孔1628被插入。螺釘1630的螺紋端被容置於在底件1610的環形周邊區中形成的螺紋盲孔1615中。螺釘1630的帽擱置於外凸緣1622上,視需要具有中間墊圈1640。在一些實施例中,墊圈1640可防止螺釘1630在被擰緊時咬住外凸緣1622。藉由調整螺釘1630的擰緊量,可設定上件1620在底件1610上施加的擠壓力。
在一些實施例中,在基座1611及外凸緣1622的環形周邊區上設置有對齊及高度調節機構。例如,可圍繞螺紋盲孔1615形成高度設定套筒1617,以容置螺釘1630。高度設定套筒1617可為中空通道,螺釘1630在被容置於螺紋盲孔1615中之前穿過所述中空通道。高度設定套筒1617可由剛性材料製成,當擰緊螺釘1630以設定治具1600A的上件1620與治具1600A的底件1610之間的距離時,所述剛性材料能夠耐受由上件1620施加的壓力。在一些實施例中,在底件1610上(例如在環形周邊區的轉角處)形成有對準銷1619。在一些實施例中,對準銷1619可被容置於在外凸緣1622上形成的對齊套筒1627中。在一些替代實施例中,對準銷1619可被容置於在外凸緣1622中形成的對準孔(未示出)中。在一些實施例中,對準孔是盲孔。在一些替代實施例中,對準孔是貫通孔。
在一些實施例中,治具1600A的底件1610及上件1620可獨立地由任何合適的材料形成。例如,用於底件1610及上件1620的材料可獨立地包括不銹鋼、鐵、銅、鈦、其他金屬、陶瓷材料或能夠耐受製造製程後續步驟的任何材料。在一些實施例中,治具1600A可經由陽極化或鈍化處理(例如,利用鎳)以增強其耐環境性並減少後續製造步驟中的干擾。
在一些實施例中,在黏合劑1200及TIM 1120固化期間,封裝模組PM2及金屬蓋1300可保持於治具1600A中。在一些實施例中,在固化步驟期間,根據上述機制,藉由治具1600A的作用,在金屬蓋1300及封裝模組PM2上施加壓力。在一些實施例中,可在125℃至150℃範圍內的溫度下利用約0.1千克力(kgf)至150千克力的夾緊力來執行固化。在一些實施例中,彈簧1623可增加在金屬蓋1300上施加的力的均勻性。在一些實施例中,高度設定套筒1617可增加所施加力的均勻性。在固化之後,可例如藉由鬆開螺釘1630並移除上件1620來敞開治具1600A,且可收回半導體封裝件SP20(例如,圖6C中所示)。在一些實施例中,藉由在固化步驟期間將半導體封裝件SP20保持於治具1600A中,TIM 1120與金屬蓋1300之間的接觸面積可增加。在一些實施例中,可藉由例如利用超音波掃描半導體封裝件SP20來量測接觸面積。在一些實施例中,接觸面積的增加可增強半導體封裝件SP20的熱效能。例如,相對於其中不使用治具1600A的情形,在接合金屬蓋1300之後藉由超音波掃描量測的TIM 1120的面積覆蓋率可增加約40%。在一些實施例中,在使用治具1600A接合金屬蓋1300後觀察到的TIM 1120的面積覆蓋率可接近100%,例如約99%。在一些實施例中,半導體封裝件SP20的穩定性亦可增加。例如,當在固化步驟期間使用治具1600A時,在對半導體封裝件SP20進行應力測試之後,可觀察到TIM 1120與金屬蓋1300的較少分層。例如,對於使用例如治具1600A等治具製造的半導體封裝件,可觀察到TIM 1120的面積覆蓋率降低了約3%。相較之下,對於不使用例如治具1600A等治具製造的封裝件,在執行相似的應力測試後,可觀察到面積覆蓋率降低了原始值的約30%。在一些實施例中,治具1600A的使用與自動化製程相容。亦即,治具1600A的組裝及拆卸可以自動化方式執行,例如,不需要人工干預。
應注意,儘管在圖7中將治具1600A示出為被設計用於單個封裝模組,但本揭露並非僅限於此。例如,由彈簧1623或可壓縮墊1623F而成的多個陣列可附接至帽1621,且每一陣列可連接至專用剛性板1624、彈性墊1625及釋放層1626。基座1611上可形成有對應的凸台1613。在一些實施例中,可適當地組合上述幾個實施例的特徵。例如,圖7至圖9B所示彈性墊1625及1625B至1625E中的任何一者可用作圖2G所示彈性墊1016G。做為另一實例,在圖7至圖10B所示治具1600A至1600G的底件1610上可視需要包括與圖2A至圖2G及圖4所示治具1000A至1000G、1400的舟皿1030、1030B、1030C、1030D、1430相似的舟皿(未示出),以將封裝模組保持就位。此外,儘管本揭露已呈現圖2A至圖2G所示治具1000A至1000G以及圖4及圖5所示治具1400、1500,但關於與圖7至圖10B所示治具1600A至1600G不同的半導體封裝件(例如,圖1M所示半導體封裝件SP10及圖6C所示半導體封裝件SP20)的製造,本揭露並非僅限於此。在一些實施例中,可使用第一治具(例如治具1000A至1000G、1400或1500中的一者)在封裝模組的頂表面上形成背側金屬化層1110,且可在金屬蓋的後續附接期間使用第二治具(例如治具1600A至1600G中的一者)。
圖11A至圖11F是根據本揭露一些實施例在半導體封裝件SP30的製造方法期間形成的結構的示意性剖視圖。半導體封裝件SP30的製造可與前面針對半導體封裝件SP10及SP20所論述的相似,且在下文中未明確提及的態樣可被認為是相似的。在圖11A中,提供封裝模組PM3。在一些實施例中,可在將封裝晶粒12接合至電路基底700後形成封裝模組PM3。在一些實施例中,封裝晶粒12是晶圓上晶片(Chip-on-Wafer)封裝件,其包括例如藉由微凸塊1740接合至中介層1730的半導體晶粒1710、1720。半導體晶粒1710、1720可具有與前面所述的半導體晶粒410、420(例如圖1D中所示)相似的結構且執行與半導體晶粒410、420相似的功能。在一些實施例中,半導體晶粒1710、1720在中介層1730上被設置成使得相應的接觸墊1713、1723及接觸柱1717、1727(若包括的話)朝向中介層1730。中介層1730可包括內連層1731,內連層1731包括介電層1732及延伸穿過介電層1732的導電圖案1733。微凸塊1740可將導電圖案1733連接至導電墊1713、1723或導電柱1717、1727。內連層1731可形成於半導體基底1735上,半導體穿孔(TSV)1737延伸穿過半導體基底1735。接觸墊1739可相對於半導體晶粒1710、1720設置於半導體基底1735的相對一側上。TSV 1737可在導電圖案1733與接觸墊1739之間建立電性連接。在半導體晶粒1710、1720與中介層1730之間可設置有底部填料1750的一或多個部分,以圍繞微凸塊1740。在中介層1730上可形成有包封體1760,以橫向包裹半導體晶粒1710、1720及底部填料1750。在一些實施例中,半導體晶粒1710、1720的後表面1710r、1720r及包封體1760的頂表面1760t沿著Z方向實質上處於相同的水平高度。在一些實施例中,上面接合有半導體晶粒1710、1720的中介層1730設置於電路基底700上,且例如藉由連接端子1800連接至電路基底700。在封裝晶粒12與電路基底700之間可設置有底部填料800,以圍繞連接端子1800。在一些實施例中,被動元件900相對於封裝晶粒12設置於電路基底700的同一側700a上。
在圖11B中,將一或多個封裝模組PM3設置於治具1000A內,與前面參照圖1H及圖1I所論述的相似。簡略而言,將封裝模組PM3設置於治具1000A的底件1010上,例如每一支撐板1018一個封裝模組PM3。封裝模組PM3在底件1010上被設置成使得電路基底700朝向底件1010。舟皿1030可幫助將封裝模組PM3保持就位於底件1010上。與前面所述的相似,將治具1000A的上件1040以可移除方式固定至底件1010,例如藉由分別嵌置於底件1010的基座1012及上件1040的外凸緣1044中的成對的磁體1020、1050。同樣對於封裝模組PM3,半導體晶粒1710、1720的後表面1710r、1720r由形成於上件1040的帽1042中的開口1046暴露出。在一些實施例中,封裝模組PM3被壓靠至上件1040上,使得帽1042可接觸封裝模組PM3的包封體1760以密封開口1046的底部。
在圖11C中,在開口1046中於半導體晶粒1710、1720的後表面1710r、1720r上且可能地在包封體1760上形成背側金屬化層1110。如前面所述,由於封裝模組PM3被壓靠至帽1042上以密封開口1046(例如,藉由彈簧1016的作用),因此背側金屬化層1110的材料可選擇性地形成於封裝模組PM3的頂表面上,而不會滲入並沈積於封裝模組PM3的其他區中(例如,電路基底700上)。參照圖11C及圖11D,在一些實施例中,自治具1000A收回封裝模組PM3,然後在背側金屬化層1110上設置TIM 1120。在一些實施例中,在電路基底700的上側700a上鄰近電路基底700的外緣700e設置黏合劑1200。
在圖11E中,在電路基底700上與黏合劑1200及TIM 1120接觸地設置金屬蓋1300。將具有金屬蓋1300(可能地,被預接合)的封裝模組PM3設置於例如治具1600A等治具的底件1610上。將治具1600A的上件1620設置於底件1610上,以夾緊封裝模組PM3,進而在使黏合劑1200固化的同時施加壓力,與前面參照圖6B及圖6C所述的相似。參照圖11F,在使黏合劑1200固化之後,可自治具1600A收回半導體封裝件SP30。
應注意,雖然在圖11A至圖11F所示製程中示出了治具1000A及1600A,但本揭露並非僅限於此,且視生產要求而定,可使用根據本揭露的任何其他治具。
根據本揭露的一些實施例,提供用於製造半導體封裝件的治具。治具包括上件及底件,所述上件及底件適於在其之間容置正製造的封裝件。當封裝件設置於治具的各件之間時,在封裝件上施加壓縮力。可藉由考量到封裝件的尺寸(例如,高度)設定治具的上件與底件之間的距離來產生壓縮力。在一些實施例中,可包括彈性構件以將封裝件壓靠至治具的上件上。在一些實施例中,封裝件上的壓縮作用可用於確保形成於上件中的開口被密封,僅暴露出封裝件底部處的所期望表面。如此一來,治具可在保護其他表面的同時於在封裝件的經暴露表面上沈積材料期間用作罩幕。在一些實施例中,可在固化期間在封裝件上施加壓縮作用,以確保設置於封裝件的後表面上的金屬蓋與熱介面材料之間的令人滿意的黏附性。
根據本揭露的一些實施例,一種用於製造半導體封裝件的治具包括底件及上件。底件包括基座、支撐板及至少一個彈性連接件。支撐板位於基座的中心區中。所述至少一個彈性連接件夾置於支撐板與基座之間。上件包括帽及外凸緣。當上件設置於底件上時,帽上覆於支撐板上。外凸緣設置於帽的邊緣處,與帽連接。當上件設置於底件上時,外凸緣接觸底件的基座。帽包括做為貫通孔的開口。當上件設置於底件上時,開口的垂直投影完全落在支撐板上。
根據本揭露的一些實施例,一種用於製造半導體封裝件的治具包括底件及上件以及螺釘。底件包括基座。基座具有中心區及環繞中心區的周邊區。基座的周邊區中形成有螺紋孔。上件包括帽、至少一個彈簧及外凸緣。當上件設置於底件之上時,帽在基座的中心區之上延伸。所述至少一個彈簧具有連接至帽的端子及連接至剛性板的另一端子。外凸緣設置於帽的邊緣處。外凸緣中形成有貫通孔。當上件安裝於底件之上時,螺釘經由貫通孔跨越外凸緣延伸,以被擰緊於底件的螺紋孔中。
根據本揭露的一些實施例,一種半導體封裝件的製造方法包括以下步驟。將半導體晶粒接合至電路基底。將接合有所述半導體晶粒的所述電路基底放置於治具的底件的支撐板上。將所述治具的上件放置於所述底件上以關閉所述治具,藉此使所述半導體晶粒壓靠至所述治具的所述上件上。所述治具的所述上件包括開口,且經包封的所述半導體晶粒的後表面由所述開口暴露出。在所述開口內於經包封的所述半導體晶粒的所述後表面上沈積導熱材料。移除所述上件以打開所述治具。
根據本揭露的一些實施例,一種半導體封裝件的製造方法包括以下步驟。在電路基底上於接合至所述電路基底的至少一個半導體晶粒旁邊設置黏合材料。將金屬蓋放置於所述黏合材料上。所述金屬蓋在所述半導體晶粒之上延伸。將所述電路基底設置於治具的底件上。將所述治具的上件設置於所述治具的所述底件之上。將所述治具的所述上件擰緊至所述治具的所述底件。如此一來,將所述金屬蓋壓靠至所述電路基底及所述半導體晶粒上。在所述治具將所述金屬蓋壓靠至所述電路基底及所述半導體晶粒上的同時,使所述黏合材料固化。
以上概述了若干實施例的特徵,以使熟習此項技術者可更佳地理解本揭露的各個態樣。熟習此項技術者應瞭解,他們可容易地使用本揭露做為設計或修改其他製程及結構的基礎來施行與本文中所介紹的實施例相同的目的及/或達成與本文中所介紹的實施例相同的優點。熟習此項技術者亦應認識到,該些等效構造並不背離本揭露的精神及範圍,而且他們可在不背離本揭露的精神及範圍的條件下對其作出各種改變、代替及變更。
10、12:封裝晶粒
100:外重佈線層
110、224、310、1732:介電層
120、320:金屬化疊層
130、1046、1446、1546:開口
140、330:凸塊下金屬
200:橋接層
210:絕緣層穿孔(TIV)
210t、220t、230t、500t、1760t:頂表面
220:半導體橋
220b:底表面
221、1735:半導體基底
222、1737:半導體穿孔(TSV)
223:內連導電圖案
225:導電端子
230、417、427、500、1760:包封體
300:內重佈線層
410、420、1710、1720:半導體晶粒
410r、420r、1710r、1720r:後表面
411、421:基礎晶片
413、423:晶片
415、425、1740:微凸塊
419、429:連接件
600、1800:連接端子
700:電路基底
700a:上側/側
700b:底側
700e:外緣
710:芯介電層
720:導電跡線
730:上部焊料罩幕/焊料罩幕
740:焊料罩幕
800、1750:底部填料
900:被動元件
1000A、1000B、1000C、1000D、1000E、1000F、1000G、1400、1500、1600A、1600B、1600C、1600D、1600E、1600F、1600G:治具
1010、1010B、1010C、1010D、1010E、1010F、1010G、1410、1510、1610:底件
1012、1012D、1012E、1012F、1412、1512、1611:基座
1014、1414、1613:凸台
1016、1416、1623:彈簧
1016G、1625B、1625C、1625D、1625E:彈性墊
1017、1036、1436:對準孔
1018、10181、10182、1418、1515:支撐板
1019、1419、1619:對準銷
1020、1050、1420、1450、1520、1550:磁體
1020E、1020F:螺紋孔
1030、1030B、1030C、1030D、1430:舟皿
1032、1032B、1032C、1032D、1432:本體
1034、1434:封裝件開口
1040、1040E、1040F、1440、1540、1620、1620F、1620G:上件
1042、1042E、1442、1542、1621:帽
1044、1044E、1044F、1444、1544、1622:外凸緣
1050、1050E、1050F、1630:螺釘
1110:背側金屬化層
1120:熱介面材料(TIM)
1200:黏合劑
1300:金屬蓋
1310:蓋子
1320:凸緣
1518:凹槽
1615:螺紋盲孔
1617:高度設定套筒
1623F:可壓縮墊/墊
1624:剛性板
1625:彈性墊/橡膠墊
16251:碳系填料
16252:樹脂
16253:奈米碳管
1626:釋放層
1627:對齊套筒
1628:貫通孔
1640:墊圈
1713、1723:接觸墊/導電墊
1717、1727:接觸柱/導電柱
1730:中介層
1731:內連層
1733:導電圖案
1739:接觸墊
C、C2:載體
C1:第二載體/載體
DX、DY:尺寸
I-I’:線
PM1、PM2、PM3:封裝模組
PU:封裝單元
SC:切割道
SP10、SP20、SP30:半導體封裝件
X、Y、Z:方向
結合附圖閱讀以下詳細說明,會最佳地理解本揭露的各個態樣。應注意,根據本行業中的標準慣例,各種特徵並非按比例繪製。事實上,為使論述清晰起見,可任意增大或減小各種特徵的尺寸。
圖1A至圖1M是示出根據本揭露一些實施例在半導體封裝件的製造製程期間產生的結構的示意性剖視圖。
圖2A至圖2G是根據本揭露一些實施例用於製造半導體封裝件的治具的示意性立體圖。
圖3是根據本揭露一些實施例設置於載體上的治具的示意性俯視圖。
圖4是根據本揭露一些實施例用於製造半導體封裝件的治具的示意性立體圖。
圖5是根據本揭露一些實施例用於製造半導體封裝件的治具的示意性立體圖。
圖6A至圖6C是示出根據本揭露一些實施例在半導體封裝件的製造製程期間產生的結構的示意性剖視圖。
圖7是根據本揭露一些實施例用於製造半導體封裝件的治具的示意性立體圖。
圖8是根據本揭露一些實施例用於製造半導體封裝件的治具的示意性剖視圖。
圖9A至圖9C是根據本揭露一些實施例用於製造半導體封裝件的治具的一些組件的示意性剖視圖。
圖10A及圖10B是根據本揭露一些實施例用於製造半導體封裝件的治具的示意性剖視圖。
圖11A至圖11F是根據本揭露一些實施例在半導體封裝件的製造方法期間形成的結構的示意性剖視圖。
1000A:治具
1010:底件
1012:基座
1014:凸台
1016:彈簧
1018:支撐板
1019:對準銷
1020、1050:磁體
1030:舟皿
1032:本體
1034:封裝件開口
1036:對準孔
1040:上件
1042:帽
1044:外凸緣
1046:開口
X、Y、Z:方向
Claims (20)
- 一種用於製造半導體封裝件的治具,包括: 底件,包括: 基座; 支撐板,位於所述基座的中心區中;以及 至少一個彈性連接件,夾置於所述支撐板與所述基座之間;以及 上件,包括: 帽,當所述上件設置於所述底件上時,所述帽上覆於所述支撐板上;以及 外凸緣,設置於所述帽的邊緣處,與所述帽連接,且當所述上件設置於所述底件上時接觸所述底件的所述基座, 其中所述帽包括為貫通孔的開口,且當所述上件設置於所述底件上時,所述開口的垂直投影完全落在所述支撐板上。
- 如請求項1所述用於製造半導體封裝件的治具, 其中所述底件更包括對準銷,且 用於半導體製造的所述治具更包括舟皿,所述舟皿中形成有封裝件開口及對準孔, 其中當所述舟皿設置於所述底件上時,所述對準銷被容置於所述對準孔中,且所述封裝件開口露出所述支撐板的至少一部分。
- 如請求項2所述用於製造半導體封裝件的治具,其中所述開口的所述垂直投影完全落在被所述封裝件開口露出的所述支撐板的所述一部分上。
- 如請求項1所述用於製造半導體封裝件的治具,其中所述至少一個彈性連接件是彈性連接件陣列中的一個彈性連接件,且所述彈性連接件是彈簧。
- 如請求項1所述用於製造半導體封裝件的治具,其中所述底件在所述基座的所述中心區中形成有凸台,且所述至少一個彈性連接件在一側處接觸所述凸台並在相對一側處接觸所述支撐板。
- 如請求項1所述用於製造半導體封裝件的治具,其中所述支撐板是位於所述基座的所述中心區中的多個支撐板之一,且所述帽的所述開口是形成於所述帽中的多個開口之一,並且當所述上件設置於所述底件上時,所述帽的所述開口的垂直投影完全落在所述支撐板中對應的下伏支撐板上。
- 如請求項1所述用於製造半導體封裝件的治具,更包括: 第一磁體,嵌入所述基座中,且具有在所述基座的頂表面處暴露出的一個表面;以及 第二磁體,嵌入所述外凸緣中,且具有在所述外凸緣的底表面處暴露出的一個表面, 其中當所述上件設置於所述底件上時,所述第二磁體與所述第一磁體交疊。
- 如請求項1所述用於製造半導體封裝件的治具,其中所述支撐板及所述至少一個彈性連接件設置於所述基座的凹槽中。
- 一種半導體封裝件的製造方法,包括: 將半導體晶粒接合至電路基底; 將接合有所述半導體晶粒的所述電路基底放置於治具的底件的支撐板上; 將所述治具的上件放置於所述底件上以關閉所述治具,藉此使所述治具的所述上件壓靠所述半導體晶粒,其中所述治具的所述上件包括開口,且所述半導體晶粒的後表面被所述開口暴露出; 在所述開口中的所述半導體晶粒的所述後表面上沈積導熱材料;以及 移除所述上件以打開所述治具。
- 如請求項9所述半導體封裝件的製造方法,其中所述導熱材料包括金屬材料。
- 如請求項9所述半導體封裝件的製造方法,其中所述導熱材料更沈積於所述治具的所述上件上。
- 如請求項9所述半導體封裝件的製造方法,更包括將金屬舟皿放置於所述治具的所述底件上, 其中所述金屬舟皿包括將所述底件的所述支撐板暴露出的開口,且其中所述接合有所述半導體晶粒的所述電路基底設置於在所述舟皿的所述開口內的所述支撐板上。
- 如請求項9所述半導體封裝件的製造方法,更包括: 在所述導熱材料上設置熱介面材料;以及 將金屬蓋接合至所述電路基底,其中所述金屬蓋接觸所述熱介面材料。
- 如請求項13所述半導體封裝件的製造方法,其中將所述金屬蓋接合至所述電路基底包括: 在所述電路基底上設置黏合劑; 將所述金屬蓋放置於所述黏合劑上; 將接合有所述半導體晶粒、所述金屬蓋及所述黏合劑的所述電路基底設置於第二治具中; 擰緊所述第二治具以沿所述金屬蓋及所述電路基底的堆疊方向在所述金屬蓋上施加壓力;以及 執行加熱步驟以使所述黏合劑固化。
- 一種半導體封裝件的製造方法,包括: 將黏合材料設置在至少一半導體晶粒旁邊的電路基底上,所述至少一個半導體晶粒接合至所述電路基底上; 將金屬蓋放置於所述黏合材料上,使得所述金屬蓋在所述半導體晶粒之上延伸; 將所述電路基底設置於治具的底件上; 將所述治具的上件設置於所述治具的所述底件之上; 將所述治具的所述上件擰緊至所述治具的所述底件,因此將所述金屬蓋壓靠至所述電路基底及所述半導體晶粒上;以及 在所述治具將所述金屬蓋壓靠至所述電路基底及所述半導體晶粒上的同時,使所述黏合材料固化。
- 如請求項15所述半導體封裝件的製造方法,更包括在將所述電路基底設置於所述治具中之前使所述黏合材料預固化。
- 如請求項15所述半導體封裝件的製造方法,其中所述治具的所述上件包括依序堆疊於帽之上的剛性墊、彈性墊及釋放層,其中當所述治具的所述上件設置於所述治具的所述底件上時,所述釋放層接觸所述金屬蓋。
- 如請求項17所述半導體封裝件的製造方法,其中所述治具的所述上件更包括設置於所述帽與所述剛性墊之間的彈性連接件。
- 如請求項17所述半導體封裝件的製造方法,其中所述彈性墊包括奈米碳管,在相對二側處接觸所述剛性墊及所述釋放層。
- 如請求項15所述半導體封裝件的製造方法,更包括: 在將所述金屬蓋放置於所述電路基底上之前,在所述半導體晶粒的後表面上形成導熱材料,其中所述金屬蓋接觸所述導熱材料。
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