US9343310B1 - Methods of forming conductors and semiconductors on a substrate - Google Patents
Methods of forming conductors and semiconductors on a substrate Download PDFInfo
- Publication number
- US9343310B1 US9343310B1 US13/928,341 US201313928341A US9343310B1 US 9343310 B1 US9343310 B1 US 9343310B1 US 201313928341 A US201313928341 A US 201313928341A US 9343310 B1 US9343310 B1 US 9343310B1
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- United States
- Prior art keywords
- glass substrate
- semiconductor
- forming
- substrate
- electrical conductor
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- Expired - Fee Related, expires
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Images
Classifications
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- H01L21/2026—
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
- H01B13/00—Apparatus or processes specially adapted for manufacturing conductors or cables
- H01B13/003—Apparatus or processes specially adapted for manufacturing conductors or cables using irradiation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02266—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02697—Forming conducting materials on a substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/228—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a liquid phase, e.g. alloy diffusion processes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/36—Structural form of radiating elements, e.g. cone, spiral, umbrella; Particular materials used therewith
- H01Q1/38—Structural form of radiating elements, e.g. cone, spiral, umbrella; Particular materials used therewith formed by a conductive layer on an insulating support
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/102—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by bonding of conductive powder, i.e. metallic powder
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0054—Processes for devices with an active region comprising only group IV elements
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0104—Properties and characteristics in general
- H05K2201/0108—Transparent
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0502—Patterning and lithography
- H05K2203/0528—Patterning during transfer, i.e. without preformed pattern, e.g. by using a die, a programmed tool or a laser
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
- H05K2203/105—Using an electrical field; Special methods of applying an electric potential
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
- H05K2203/107—Using laser light
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1581—Treating the backside of the PCB, e.g. for heating during soldering or providing a liquid coating on the backside
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
Definitions
- This invention relates to electrical conductors and semiconductors and more particularly to an apparatus and a method for forming an electrical conductor and/or a semiconductor device on a substrate.
- the electrical conductor and/or a semiconductor device may be formed on a glass substrate or a semiconductor substrate.
- the prior art is abundant in prior art for forming an electrical conductor on a substrate. Many electrical conductors are used to interconnect electrical components to form an operating circuit. Some in the prior art have electrical conductors mounted on surfaces to provide an antenna for radio frequency communication. Cellular phone, portable computers, tablets and the like incorporate antennas mounted on surfaces for radio frequency communication. The following is patent represent advancement in the antenna art.
- U.S. Pat. No. 4,318,109 to Weathers discloses a broad-band antenna system capable of receiving VHF, FM, and UHF bands, having highly desirable directional properties, providing sharp nulls for the rejection of unwanted reflections, and with broad directional properties, usually obtainable only with large tunable dipoles or loops, many times the dimensions of this very compact antenna unit. This is strictly a receiving antenna, since it has no radiation capabilities, and consequently minimal loss of received signal due to re-radiation.
- U.S. Pat. No. 4,358,769 to Tada et al discloses a loop antenna apparatus which includes a main conductive loop arranged on a first surface, a plurality of supplemental conductive loops connected to the main conductive loop and arranged on different surfaces from the first surface, respectively, a plurality of signal feeding points provided in different loops of the main and supplemental conductive loops, an output terminal and change-over switches for selectively connecting one of the plurality of signal feeding points to the output terminal.
- U.S. Pat. No. 4,381,566 to Kane discloses at the feed side of each antenna element having transmitting conductor paths formed in continuous meandering shapes and having distributed constant impedances are electrically connected a variable tuning unit including a voltage variable reactance circuit and an impedance adjusting reactance element, thereby constituting an antenna circuit.
- a voltage variable capacitor is connected within the voltage variable reactance circuit.
- Antenna feed terminals are connected through a coaxial cable to input terminals of a remote-set radio receiver.
- a tuning control signal generated within the radio receiver is fed to a voltage variable capacitor within the voltage variable reactance circuit of the antenna circuit through the coaxial cable. The tuning control signal allows the antenna circuit to resonate with a particular frequency within a frequency band, the frequency being variable.
- the antenna element having the distributed constant inductance functions so as to have the best possible antenna radiation efficiency at resonant frequency signal by being in combination with the variable tuning unit and the antenna element is considerably reduced in size.
- the characteristic impedance at the feed terminals of the antenna circuit becomes equal to that impedance at the receiving input terminals at the radio receiver connected to the antenna circuit, whereby an RF signal at the resonant frequency is selected and fed most efficiency to the radio receiver through the coaxial cable.
- U.S. Pat. No. 5,164,738 to Walter, et al discloses an antenna includes at least one element whose physical shape is at least partially defined as a second or higher iteration deterministic fractal.
- the resultant fractal antenna does not rely upon an opening angle for performance, and may be fabricated as a dipole, a vertical, or a quad, among other configurations.
- the number of resonant frequencies for the fractal antenna increases with iteration number N and more such frequencies are present than in a prior art Euclidean antenna. Further, the resonant frequencies can include non-harmonically related frequencies.
- a second or third iteration, preferably Minkowski fractal antenna is implemented on a printed circuit board that is small enough to fit within the telephone housing.
- a fractal antenna according to the present invention is substantially smaller than its Euclidean counterpart, yet exhibits at least similar gain, efficiency, SWR, and provides a 50 OMEGA termination impedance without requiring impedance matching.
- U.S. Pat. No. 6,452,553 to Cohen discloses an antenna includes at least one element whose physical shape is at least partially defined as a second or higher iteration deterministic fractal.
- the resultant fractal antenna does not rely upon an opening angle for performance, and may be fabricated as a dipole, a vertical, or a quad, among other configurations.
- the number of resonant frequencies for the fractal antenna increases with iteration number N and more such frequencies are present than in a prior art Euclidean antenna. Further, the resonant frequencies can include non-harmonically related frequencies.
- a second or third iteration, preferably Minkowski fractal antenna is implemented on a printed circuit board that is small enough to fit within the telephone housing.
- a fractal antenna according to the present invention is substantially smaller than its Euclidean counterpart, yet exhibits at least similar gain, efficiency, SWR, and provides a 50 OMEGA termination impedance without requiring impedance matching.
- U.S. Pat. No. 6,538,606 to Quinn et al discloses a computer system that provides for an antenna port with a bay or door that receives a module containing an antenna.
- the antenna module contains an antenna or a set of antennas that support wireless communication technologies contained in the computer system.
- the antenna module is “standardized” and can be used for various computer systems employing the standard port with the bay or door.
- the antenna module may be developed and certified separate from the notebook system.
- a diversity switch may be added the diversity switch is used to choose the proper antenna for communication.
- a high gain amplifier and filters to compensate for RF signals may also be added to the module.
- a receiver, transmitter, or transceiver device may be added to the module or may be placed in the computer system. Placing the device on the module allows the transmission of digital signals, providing decreased signal loss along transmission lines. Power is provided to the module by a separate power line from the computer system.
- U.S. Pat. No. 6,677,906 to Quinn discloses a portable computer includes a base and a top movably mounted on the base.
- a non-conductive transparent display layer is mounted in the top and includes a channel formed therein that contains layers of transparent conductive and transparent non-conductive materials.
- a cable is connected to the base.
- a cable extension is coupled to and extends from the cable. The cable extension is imbedded in the channel.
- An antenna is coupled to the cable extension and is imbedded in the channel.
- U.S. Pat. No. 7,608,308 to Liu, et al. discloses a p-type semiconductor zinc oxide (ZnO) film and a process for preparing the film are disclosed.
- the film is co-doped with phosphorous (P) and lithium (Li).
- a pulsed laser deposition scheme is described for use in growing the film. Further described is a process of pulsed laser deposition using transparent substrates which includes a pulsed laser source, a substrate that is transparent at the wavelength of the pulsed laser, and a multi-target system.
- the optical path of the pulsed laser is arranged in such a way that the pulsed laser is incident from the back of the substrate, passes through the substrate, and then focuses on the target.
- this geometric arrangement enables deposition of small features utilizing the root of the ablation plume, which can exist in a one-dimensional transition stage along the target surface normal, before the angular width of the plume is broadened by three-dimensional adiabatic expansion.
- This can provide small deposition feature sizes, which can be similar in size to the laser focal spot, and provides a novel method for direct deposition of patterned materials.
- U.S. Pat. No. 7,666,511 to Ellison, et al. discloses an alkali aluminosilicate glass that is chemically strengthened and has a down-drawable composition.
- the glass has a melting temperature less than about 1650 degree C. and a liquidus viscosity of at least 130 kpoise and, in one embodiment, greater than 250 kpoise.
- the glass undergoes ion exchange at relatively low temperatures to a depth of at least 30.mu.m.
- the present invention is an improvement to prior inventions related to forming electrical conductors and processing wide bandgap materials using thermal energy beams or laser beams. Discussion of wide bandgap materials and the processing thereof are discussed in the following U.S. Patents issued to the instant inventor Nathaniel R. Quick PhD. The following U.S. Patents are hereby incorporated by reference into the present application as if fully set forth herein: U.S. Pat. No. 5,145,741; U.S. Pat. No. 5,391,841; U.S. Pat. No. 5,793,042; U.S. Pat. No. 6,732,562; U.S. Pat. No. 5,837,607; U.S. Pat. No. 6,271,576; U.S. Pat.
- Another objective of this invention is to provide an apparatus and a method for forming electrical conductors on a semiconductor substrate.
- Another objective of this invention is to provide an apparatus and a method for forming a semiconductor device on a substrate to produce various semiconductor devices.
- Another objective of this invention is to provide an apparatus and a method for forming and electrical conductors and/or a semiconductor device on a substrate through laser processing.
- Another objective of this invention is to provide an apparatus and a method for forming and electrical conductors and/or a semiconductor device on a substrate through a plasma arc lamp processing.
- Another objective of this invention is to provide an apparatus and a method for forming a conductive electrical antenna on a glass substrate or a semiconductor substrate.
- the invention relates to an improved method for forming an electrical conductor on a glass substrate.
- the method comprises the steps of applying a conducting material onto a surface of the glass substrate.
- a laser beam is focused through the glass substrate onto an interface of the conducting material and the surface of the glass substrate to form an electrical conductor bonded to the glass substrate.
- the step of applying a conducting material onto a surface of the glass substrate includes applying a powder or solid precursor onto a surface of the glass substrate.
- the step of applying a conducting material onto a surface of the glass substrate includes applying a metal organic gas or metal vapor precursor onto a surface of the glass substrate.
- the step of forming an electrical conductor bonded to the glass substrate includes forming a transparent electrical conductor bonded to the glass substrate.
- the method includes the step of applying an electric field across the interface of the conducting material and the surface of the glass substrate to enhance the forming of the electrical conductor bonded to the glass substrate. The method is suitable for forming a conductive antenna bonded to the glass substrate.
- the invention is incorporated into a method for forming an electrical conductor on a semiconductor substrate comprising the steps of applying a conducting material onto a surface of the semiconductor substrate.
- a laser beam is focused onto an interface of the conducting material and the surface of the semiconductor substrate to form an electrical conductor bonded to the semiconductor substrate.
- the method is suitable for forming a conductive antenna bonded to the semiconductor substrate.
- the invention is incorporated into a method for forming a semiconductor device on a glass substrate comprising the steps of forming a first electrical conductor on a surface of the glass substrate.
- a semiconductor material is applied onto the first electrical conductor.
- a laser beam is focused onto an interface of the semiconductor material and the first electrical conductor to form a semiconductor bond to the first electrical conductor.
- a doping material is applied onto the semiconductor.
- a laser beam is focused onto an interface of the semiconductor and the doping material to convert a portion of the semiconductor into a doped semiconductor.
- a second electrical conductor is bonded to the doped semiconductor.
- the step of forming a first electrical conductor on a surface of the glass substrate includes applying a first conducting material onto a surface of the glass substrate and a laser beam is focused onto an interface of the conducting material and the surface of the glass substrate to form a first electrical conductor bonded to the glass substrate.
- the invention is incorporated into a conductor or a semiconductor device formed on a glass substrate.
- the semiconductor device comprises a first electrical conductor bonded to the glass substrate.
- a semiconductor material is bonded to the first electrical conductor.
- a doped semiconductor material is formed in a portion of the semiconductor material.
- a second electrical conductor is bonded to the doped semiconductor material.
- the semiconductor device includes a light emitting device formed on the glass substrate.
- the light emitting device comprises a thermally fused layer formed from a mixture of powdered silicon carbide and powdered tungsten.
- a first and a second electrical connector are connected to the thermally fused layer.
- FIG. 1 is a top view of a first apparatus for forming electrical conductors and/or semiconductors on a substrate in accordance with the present invention
- FIG. 2 is a side sectional view along line 2 - 2 in FIG. 1 ;
- FIG. 3 is a top view of an electrical conductor bonded to a substrate
- FIG. 4 is a side view of a second apparatus for forming electrical conductors and/or semiconductors on a substrate in accordance with the present invention
- FIG. 5 is an enlarged side view of the glass substrate of FIG. 2 with a first conductor bonded to the glass substrate;
- FIG. 6 is a side sectional view similar to FIG. 5 with a semiconductor bonded to the first electrical conductor
- FIG. 7 is a side sectional view similar to FIG. 6 with a doped semiconductor formed in a portion of the semiconductor material.
- FIG. 8 is a side sectional view similar to FIG. 7 with a second electrical conductor is bonded to the doped semiconductor material.
- FIG. 9 is a top view of a third apparatus for forming electrical conductors and/or semiconductors on a substrate with the assistance of an electric field;
- FIG. 10 is a side sectional view along line 10 - 10 in FIG. 9 ;
- FIG. 11 is an enlarged view of a portion of FIG. 10 ;
- FIG. 12 is a top view an electrical conductor bonded to a substrate.
- FIGS. 1 and 2 are top and side views of an apparatus 5 for forming an electrical conductors and/or semiconductors on a substrate 10 in accordance with the present invention.
- the substrate 10 defines a first and a second side 11 and 12 and a peripheral edge 13 .
- the substrate 10 is shown as a rectangle, the present invention is not limited by the physical configuration of the substrate 10 as shown herein.
- the substrate 10 may be an insulating substrate such as a glass substrate (SiO) or a semiconductor substrate such as silicon carbide (SiC).
- the substrate 10 is shown located in a chamber 20 .
- the air-tight chamber 20 comprises a plurality of wall 21 - 24 interconnected by a bottom wall 25 defining an interior space 26 .
- An inlet port 31 and an outlet port 32 are located in the side wall 21 and 22 of the chamber 20 for injecting and removing gases into and out of the chamber 20 , respectively.
- a support 34 is moveably mounted within the interior space 26 of the chamber 20 .
- the support 34 is biased in a direction away from the bottom wall 25 .
- plural springs 35 urge the support 34 in a direction away from the bottom wall 25 .
- various means may be used to bias the support 34 in a direction away from the bottom wall 25 including a resilient bias, a pneumatic bias, a magnetic bias and the like.
- a heat absorbing material 36 is disposed upon the support 34 .
- Plural studs 38 extend from opposed ends of the chamber 20 .
- the chamber 20 and the support 34 are formed of an aluminum material but it should be understood that various material may be used for the chamber 20 and the support 34 .
- the heat absorbing material 36 is a graphite material.
- a closure 40 is adapted to mate with the chamber 20 to form an airtight seal.
- the closure 40 includes a light transmitting window 42 .
- the closure 40 includes plural apertures 44 for receiving the plural studs 38 extending from the chamber 20 .
- Fastening nuts 46 secure the closure 42 the chamber 20 .
- a first seal 51 is disposed between the walls 21 - 24 and the first side 11 of the substrate 10 .
- a second seal 52 is disposed between the closure 40 and the second side 12 of the substrate 10 .
- the first and second seals 51 and 52 seal the substrate 10 within the chamber 20 and closure 44 .
- the first and second seals 51 and 52 are formed of a resilient material such as fluoropolymer elastomer or the like. The first and second seals 51 and 52 enable the substrate 10 to be processing in a selected atmosphere.
- a laser 60 is directed into a scanner 62 for creating a focused laser beam 64 to pass through the substrate 10 and to impinge upon the first side 11 of the substrate 10 .
- the scanner 62 enables the focused laser beam 64 to be positioned at various locations on the first side of the substrate 10 .
- the laser 60 and the scanner 62 are controlled by a computer 66 .
- FIG. 2 illustrates the method for forming an electrical conductor 70 on the substrate 10 .
- a conducting material 72 is applied to the first side 11 of the glass substrate 10 .
- a nickel powder 72 is bonded to a glass substrate 10 .
- the nickel powder 72 is deposited onto the heat absorbing material 36 of the support 34 .
- Plural springs 35 urge the nickel powder 72 into contact with the first side 1 of the substrate 10 .
- the laser beam 64 is focused onto an interface of the conducting material 72 and the first side 11 of the glass substrate 10 to form the electrical conductor 70 .
- the concentrated laser beam 64 forms the electrical conductor 70 from the conducting material 72 and bonds the electrical conductor 70 to the glass substrate 10 .
- the laser beam 64 is focused onto the interface of the conducting material 72 and the first side 11 of the glass substrate 10 processes selected areas of the glass substrate 10 within the chamber 20 .
- the plural springs 35 urging the nickel powder 72 into contact with the first side 11 of the glass substrate. Furthermore, the plural springs 35 urging the nickel powder 72 into contact with the first side 11 of the glass substrate 10 during the irradiation by the laser beam 64 to insure continuous contact of the nickel powder 72 with the glass substrate 10 assist in the sintering and fusion of the nickel powder 72 with the glass substrate 10 .
- FIG. 3 is a top view of the electrical conductor 70 bonded to the glass substrate 10 .
- the electrical conductor 70 is formed in the shape of a fractal antenna. It should be understood that the electrical conductor 70 may be formed in any shape for various intended uses.
- the apparatus 5 may be used to form an electrical conductor on a semiconductors substrate 10 .
- An aluminum conductor antenna circuit can be deposited on an n-type SiC wide bandgap semiconductor from an argon+trimethyl aluminum solution (10 psi) metal-organic aluminum precursor that is flowed into the inlet port 31 .
- FIG. 4 is a side view of a second apparatus 6 for forming electrical conductors and/or semiconductors on a substrate 10 .
- the chamber 20 is identical to the chamber shown in FIGS. 1 and 2 .
- the apparatus 6 comprises a high density plasma arc lamp 70 for irradiating the substrate 10 within the chamber 20 .
- the plasma lamp 70 is powered by a power supply 72 to provide a plasma beam 74 .
- the plasma lamp 70 is controlled by a computer 76 .
- the computer 76 controls the intensity, pulse duration and the pulse frequency of the plasma lamp 70 .
- the electromagnetic radiation emanating from the plasma lamp 70 is transmitted through the light transmitting top window 42 of the closure 40 to irradiate the substrate 10 in accordance with a computer program stored in the computer.
- a suitable plasma lamp 70 is described in U.S. Pat. No. 4,937,490 and U.S. Pat. No. 7,220,936 that are incorporated by reference into the present specification as if fully set forth herein.
- the plasma lamp 70 can supply large power densities, (up to 20,000 Watts/centimeter 2 ) over large areas (4 meter 2 ) in short time frames (0.5 microseconds to 10.0 seconds).
- the plasma lamp 70 is capable of quickly delivering large amounts of heat over large surface areas with little or no deleterious influence upon subsurface compositions.
- the computer 76 controls the pulse energy from the plasma lamp 70 in both duration and/or periodicity to allow precise control various process parameters. In the process of the present invention, the plasma lamp 70 is used for processing large areas or the entirety of the substrate 10 .
- the electromagnetic radiation emanating from the plasma lamp 70 is transmitted through the light transmitting top window 42 of the chamber 20 to irradiate the substrate 10 in accordance with a computer program stored in the computer.
- the interior space 26 of the chamber 20 may be a vacuum, a liquid substance, a fluid substance or a gas or vapor substance.
- a powdered substance may be introduced into the interior space 26 of the chamber 20 .
- FIG. 5 is an enlarged side view of a second example of a substrate 10 with a semiconductor 90 bonded thereto.
- the substrate 10 is a glass substrate 10 and the semiconductor material is silicon carbide (SiC).
- the first conductor 80 may be formed in a specific pattern by the apparatus 5 shown in FIGS. 1-2 or may be formed across the entire surface of the exposed glass substrate 10 by the apparatus 6 shown in FIG. 4 .
- the apparatus 5 creates a specific pattern of the first conductor 80 is controlled by the characteristics of the laser beam 64 as well as the pattern of the scan of the laser beam 64 across the glass substrate 10 .
- the apparatus 6 creates the first conductor 80 across the entire surface of the exposed glass substrate 10 by the plasma beam 74 .
- FIG. 6 is a side sectional view similar to FIG. 5 with a semiconductor 90 bonded to the first electrical conductor 80 .
- the semiconductor 90 is formed by applying a semiconductors material 92 onto the first electrical conductor 80 on the glass substrate 10 within the chamber 20 .
- the laser beam 64 or the plasma bean impinges onto an interface of the semiconductors material 92 and the first electrical conductor 80 disposed on the first side 11 of the substrate 10 .
- the laser beam 64 or the plasma beam 74 forms the semiconductor 90 from the semiconductor material 92 and bonds the semiconductor 90 to the electrical conductor 80 bonded to the substrate 10 .
- FIG. 7 is a side sectional view similar to FIG. 4 with a doped semiconductor 100 formed in a portion of the semiconductor 90 .
- the doped semiconductor 100 is formed by applying a doping material 102 is applied onto the semiconductor 100 .
- a laser beam is focused for a onto an interface of the semiconductor 90 and the doping material 102 to convert a portion of the semiconductor 90 into a doped semiconductor 100 .
- the process of forming the doped semiconductor 100 is undertaken within the chamber 20 shown in FIGS. 1 and 2 .
- FIG. 8 is a side sectional view similar to FIG. 5 with a second electrical conductor 110 bonded to the doped semiconductor 100 .
- the second electrical conductor 110 is formed by applying a second conducting material 112 onto the doped semiconductor 100 .
- a laser beam 64 is focused onto an interface of the second conducting material 112 and the doped semiconductor 100 to form the second electrical conductor 110 bonded to the doped semiconductor 100 .
- the second electrical conductor 110 may be bonded to the doped semiconductor 100 in a conventional manner as should be well known to those skilled in the art.
- FIG. 8 illustrates a semiconductor device 130 formed on a glass substrate 10 comprising the first electrical conductor 80 bonded to the glass substrate 10 .
- a semiconductor 90 is bonded to the first electrical conductor 80 .
- a doped semiconductor 100 is formed in a portion of the semiconductor 90 .
- a second electrical conductor 110 is bonded to the doped semiconductor 100 .
- FIGS. 9-11 are views of a third apparatus 7 for forming electrical conductors and/or semiconductors on a substrate 10 with the assistance of an electric field.
- the third apparatus 7 is substantially identical to the apparatus 5 shown in FIG. 1 and with similar part labeled with similar numerals increased by 100.
- the third apparatus 7 includes a power supply 167 for providing a Direct Current voltage on conductors 168 and 169 .
- the conductors 168 and 169 are connected to the conductive chamber 120 and the conductive closure 140 , respectively.
- the conductive chamber 120 is in electrical contact with a conductive heat absorbing material 136 whereas the conductive closure 140 is in electrical contact with a transparent electrode 180 .
- an electric filed is established between the conductive heat absorbing material 136 and the transparent electrode 180 .
- the electric field extends across the interface of the interface of the conducting material 172 and the first side 11 of the glass substrate 10 .
- the transparent electrode 180 may be a separate component as shown or may be incorporated into the light transmitting window 143 .
- An electric field is applied vertically across the substrate 10 and powder precursor to assist in fusion with the substrate 10 and diffusion into the conductive material powder 172 and substrate 10 .
- the laser beam 164 produces a heat source during the process of anodic bonding.
- a modified version of this would be to coat a substrate 10 with a metal and then subject this to the process in order to diffuse the metal into the substrate 10 . This results in conductive paths within the substrate 10 allowing for connection of embedded components
- the process comprises sandwiching the glass substrate 10 between two planar electrodes 136 and 180 allowing for irradiation of the substrate 10 with the laser beam 64 .
- indium tin oxide or doped zinc oxide which are transparent, either as solid substrates or deposited as a film on glass, can be used for the top planar electrode 180 .
- a voltage 400-100V D.C. is then applied with the positive being one plate and the negative the other.
- the substrate 10 is then irradiated with the laser bean 164 in order to provide heat which will facilitate diffusion of the metal precursor, solid, coating or powder.
- Polarity of the power supply 172 is determined by the material used in the process.
- the process can also be used to bond glass to semiconductors, such as silicon and silicon carbide wafers as it is conventionally performed with a large heat source.
- the large heat source used in conventional semiconductor to glass bonding will be replaced with the laser which will allow for selective heating and increased localized energy to provide improve bonding by thermal diffusion of the materials.
- FIG. 12 is a top view an electrical conductor 200 bonded to a glass substrate 10 .
- the electrical conductor 200 is shown as antenna suitable for use in a cellular phone, laptop computer, tablet, television or the like.
- the electrical conductor 200 on the glass substrate is virtually invisible, making the antenna suitable for installation on the screen of the cellular phone, laptop computer, tablet or television.
- Silicon oxide base glass is used as the substrate.
- the precursor of the material to be synthesized on the glass is placed in intimate contact with the glass substrate by methods including:
- the glass precursor interface is positioned at the bottom in a fixture and behaves as a top seal.
- the chamber is evacuated and backfilled with forming gas (4% hydrogen+96% argon) to remove residual oxides on the precursor during laser processing.
- forming gas 4% hydrogen+96% argon
- the laser beam is transmitted through the top of the glass to the bottom glass precursor interface.
- the beam diameter is 20 micron or larger and can be Gaussian, top hat or pitchfork or other custom profiles. These parameters prevent glass cracking or damage and ensured metal and/or semiconductor path continuity.
- An appropriate first conductor is nickel which bonds to glass either as a metal or as a nickel (II) oxide (NiO) layer and accommodates thermal expansion matching.
- a preferred particle size is 1 micron or less which effectively reduces the required energy for bonding/adhesion given the increasing surface energy with decreasing particle diameter.
- Laser bonding of nickel is preferred for fabrication of a silicon carbide semiconductor device on glass since it bonds to silicon carbide and serves as a metal contact for the n-type semiconductor material.
- a metal having a high conductivity and low permeability such as aluminum, silver and copper are typically used.
- Aluminum shows similar bonding to glass as does nickel by forming an intermediate aluminum oxide layer and is preferred in our process. For example, processing at 18 W or greater, 10 psi, 4% Hydrogen+96% Argon (forming gas), 532 nm Nd:YAG bonds aluminum to the glass substrate.
- silicon carbide (Washington Mills green 1200) is laser doped with nitrogen.
- Nano lines can be formed by apparatus disclosed by the instant inventor Nathaniel R. Quick PhD. in U.S. Pat. No. 8,393,289.
- a mixture of powdered silicon carbide (a wide bandgap semiconductor) and powdered tungsten (filament metal) was placed on a graphite block in the spring loaded chamber 40 .
- the chamber 40 was then evacuated and filled with forming gas (4% H 2 Bal. Argon).
- Laser radiation (532 nm Nd:YAG 80 watts, 0.070 inch aperture, 10 kHz pulse repetition, scan speed 2 mm/ms) was then applied and the mixture deposited on the glass in the pattern of the beam generated by a scanner.
- the glass with the deposited powder mix was then placed in a vacuum chamber which was evacuated and power applied to the ends of the deposited pattern.
- the pattern was in the form of a line. When direct current (DC) power was applied, the line pattern began to glow with intensity increasing with amperage and corresponding voltage.
- DC direct current
- Percentage mixtures of wide bandgap semiconductor powders, metal powders, dopant powders and dopant gases can be varied. Different percentage mixtures of wide bandgap semiconductor powders, metal powders, dopant powders and dopant gases will be explored in future experiments.
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Abstract
Description
-
- 1. laser deposition from a metal organic simultaneous with bonding;
- 2. Pressure compaction of a precursor powder against the glass substrate;
- 3. Deposition of a thin film by CVD and sputtering techniques;
- 4. Polymer thick film deposition of a composition of precursor particles and a binder.
Claims (16)
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US20170053801A1 (en) * | 2014-05-16 | 2017-02-23 | Nagoya Institute Of Technology | Method for manufacturing p-type zinc oxide film |
US9601641B1 (en) | 2013-12-10 | 2017-03-21 | AppliCote Associates, LLC | Ultra-high pressure doping of materials |
US9620667B1 (en) | 2013-12-10 | 2017-04-11 | AppliCote Associates LLC | Thermal doping of materials |
TWI779512B (en) * | 2021-01-15 | 2022-10-01 | 台灣積體電路製造股份有限公司 | Jig for manufacturing semicondcutor package and manufacturing method of semiconductor package |
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