TW202225505A - 在基材上沉積矽鍺層的方法 - Google Patents
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- 229910000577 Silicon-germanium Inorganic materials 0.000 title claims abstract description 94
- 239000000758 substrate Substances 0.000 title claims abstract description 69
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 title claims abstract description 34
- 238000000034 method Methods 0.000 title claims abstract description 22
- 238000000151 deposition Methods 0.000 title claims abstract description 19
- 239000000463 material Substances 0.000 claims description 6
- 239000000203 mixture Substances 0.000 claims description 5
- 229910052732 germanium Inorganic materials 0.000 claims description 4
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 4
- 235000012431 wafers Nutrition 0.000 description 22
- 238000004519 manufacturing process Methods 0.000 description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- 230000008021 deposition Effects 0.000 description 5
- 230000006911 nucleation Effects 0.000 description 5
- 238000010899 nucleation Methods 0.000 description 5
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 239000013078 crystal Substances 0.000 description 4
- 230000008569 process Effects 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000004913 activation Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000001534 heteroepitaxy Methods 0.000 description 2
- DDFHBQSCUXNBSA-UHFFFAOYSA-N 5-(5-carboxythiophen-2-yl)thiophene-2-carboxylic acid Chemical compound S1C(C(=O)O)=CC=C1C1=CC=C(C(O)=O)S1 DDFHBQSCUXNBSA-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 239000003517 fume Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 239000000779 smoke Substances 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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Abstract
一種用於在基材(1)上以異質磊晶的方式沉積矽鍺層(3)的方法,包括:
在基材(1)的上面提供遮罩層(4);
移除遮罩層(4)的外部部分,以在基材的圍繞遮罩層(4)的剩餘部分(5)的邊緣區域中提供到基材的環形自由表面(6)的通路;
在基材的環形自由表面(6)的上面沉積圓柱形矽鍺層(2);
移除遮罩層的剩餘部分;以及
在基材(1)的上面及圓柱形矽鍺層(2)的上面沉積矽鍺層(3),矽鍺層(3)接觸圓柱形矽鍺層(2)的內部側表面。
Description
本發明涉及一種在基材上沉積矽鍺(silicon germanium,SiGe)層的方法。
使用SiGe通道(channel)的半導體裝置代表了僅基於矽的相應裝置的令人感興趣的替代方案(interesting alternative)。為了提供用於SiGe通道之集成(integration)的SiGe層,SiGe層通常必須以異質磊晶的方式(heteroepitaxially)沉積在基材(例如矽單晶晶圓)的上面。眾所周知,由於基材與異質磊晶的SiGe層的晶格不匹配(lattice-mismatch),在沉積製程過程中形成錯合差排(misfit dislocation,MD)、線差排(threading dislocation,TD)及線差排的差排堆積(dislocation pile-up,DP)。
人們已經進行了許多嘗試來減少與MD、TD及DP的存在相關的問題,以及與交叉影線(cross-hatch)相關的問題,該交叉影線使得異質磊晶的SiGe層的表面變得粗糙。
US 2010 0 291 761 A1提出在基材的背面沉積應力補償SiGe層(stress compensating SiGe layer)。
US 2010 0 317 177 A1揭露了一種方法,包括在基材上沉積第一SiGe層以及在第一SiGe層的上面沉積第二SiGe層。
根據US 2004 0 075 105 A1,可藉由一種方法來減少DP的形成,該方法包括在第一半導體層上形成基本上鬆弛的蓋層(substantially relaxed cap layer),該第一半導體層具有多個在其整個表面上基本上均勻分佈的TD。
最近,一篇論文(Fabrizio Rovaris, Continuum modeling of heteroepitaxy at the mesoscale: tackling elastic and plastic relaxation, University of Milano-Bicocca DEPARTMENT OF MATERIALS SCIENCE, Academic year 2019/2020(法布里奇奧‧羅瓦里斯,在介觀尺度的異質磊晶的連續建模:阻截彈性及塑性鬆弛,米蘭比科卡大學材料科學系,學年2019/2020))被發表,其報導了在基材的邊緣存在有高缺陷區域(high-defective region),該高缺陷區域提供了一個線臂(threading arms)的儲備(reservoir),一旦生長的膜達到臨界厚度,該儲備就準備好鬆弛,並且其結果,藉由消除鬆弛的第一階段的隨機成核的循環(random nucleation of loops),可以觀察到TD密度的顯著降低。該論文的作者與本發明的發明人合作,並未發表:藉由在基材的背面上沉積應力補償SiGe層,已經獲得了在基材邊緣處的高缺陷區域。
本發明的目的是進一步降低以異質磊晶的方式沉積在基材上的SiGe層的TD密度。
該目的藉由一種在基材上以異質磊晶的方式沉積矽鍺層的方法來實現,該方法包括:
在基材的上面提供遮罩層;
移除遮罩層的外部部分(outer section),以在基材的圍繞遮罩層的剩餘部分(remainder)的邊緣區域(edge region)中提供到基材的環形自由表面(annular-shaped free surface)的通路(access);
在基材的環形自由表面的上面沉積圓柱形矽鍺層;
移除遮罩層的剩餘部分;以及
在基材的上面及圓柱形矽鍺層的上面沉積矽鍺層,該矽鍺層係與圓柱形矽鍺層的內部側表面(inner lateral surface)接觸。
由於在基材中沒有預先存在的差排,所以矽單晶基材上的SiGe緩衝層係藉由在優先成核位置(preferential nucleation site)處的異質相成核(heterogeneous nucleation)而鬆弛。眾所周知,矽晶圓的邊緣顯現出機械缺陷,其用作優先成核位置。在生長期間,應變能係在磊晶層中累積(building up),並且一旦達到用於該過程的活化能,差排就在這些位置處迅速成核,形成厚的差排束(thick dislocation bundle)。這些錯合差排束係導致形成線差排堆積,因為它們在阻擋其他差排的滑移中是有效的。由於差排被阻擋,需要使更多的差排成核以完全鬆弛該層,這導致更高的線差排密度(threading dislocation density,TDD)。為了更受控的鬆弛過程以及防止錯合差排束,需要均勻分佈的差排來源,其具有低的活化能。
本發明提出一種在SiGe層的邊緣區域中實現這種來源的方法。此邊緣儲備係由在SiGe層之前所沉積的鬆弛或部分鬆弛的SiGe層(下文中稱為圓柱形SiGe層)組成。SiGe層具有與圓柱形SiGe層的垂直接觸(vertical contact),或者具有與圓柱形SiGe層的垂直接觸及水平接觸(horizontal contact)。在達到臨界厚度時,藉由朝向晶圓中心自由地滑動,包含在此邊緣儲備中的預先存在的差排係被用於在鬆弛的初始階段來鬆弛SiGe層,留下極長的錯合差排段而不被阻擋。該方法防止了在晶圓邊緣藉由異質相成核所形成的厚的差排束,從而防止了DP的形成並降低了總的TDD。
雖然下面的描述涉及SiGe層在矽單晶基材上的沉積,但是也可以使用其他基材,如絕緣體上矽(silicon-on-insulator,SOI)晶圓。根據本發明的較佳實施態樣,基材是直徑為200毫米或300毫米的矽單晶晶圓。
為了在基材的邊緣提供圓柱形SiGe層,採用遮罩方法。原則上,可以使用任何遮罩機制(mask mechanism),以暫時地將基材的表面區域排除在SiGe層的沉積之外。根據本發明的較佳實施態樣,使用氧化材料(如SiO
2)作為遮罩材料,例如低溫氧化物(low temperature oxide,LTO)。LTO可經由化學氣相沉積(chemical vapor deposition,CVD),在含有矽烷(SiH
4)與氧(O
2)的氣氛中,在300℃與500℃之間的溫度下沉積在基材的上面。或者,可以使用其他已知的用於沉積氧化層的方法,或者可以在850℃與1200℃之間的溫度下,在快速熱退火(rapid thermal anneal,RTP)爐中藉由乾氧化(dry oxidation)而生長氧化層。
接著,移除在基材的邊緣區域中的遮罩層,以提供從基材的邊緣朝向基材的中心延伸的基材的環形自由表面。例如,可藉由使用氫氟酸或使用氟化銨與氫氟酸的濕法蝕刻(wet etching),或藉由使用例如CF
4等的電漿蝕刻來移除邊緣區域中的遮罩層。根據本發明的實施態樣,可如下移除基材的邊緣區域中的遮罩層:將基材面朝下放置在支座上並藉由將HF煙霧(fume)引入處理室中,在支座與遮罩之間擴散的HF煙霧係蝕刻掉具有高達1.5毫米的寬度的遮罩部分。
根據本發明的實施態樣,基材的環形自由表面係從邊緣朝向基材的中心而徑向地延伸一段距離,該距離係較佳不小於200微米且不大於1.5毫米。基材的環形自由表面的寬度甚至可以與基材邊緣部分的長度一樣小,在該處基材的厚度減小,或者甚至可以更小。
接著,在基材的環形自由表面上磊晶沉積圓柱形SiGe層。根據本發明的實施態樣,在大氣壓力下進行CVD以沉積圓柱形SiGe層。沉積製程的細節是習知的,且例如在US 2010 0 317 177 A1中討論的那樣。或者,沉積可在減壓下及較低溫度下進行。根據本發明的一個實施態樣,圓柱形SiGe層的組成為Si
1-xGe
x,其中0.01≤x≤1。根據本發明的另一較佳實施態樣,圓柱形SiGe層具有不小於10奈米且不大於10微米的厚度,並且圓柱形SiGe層係部分地或完全地鬆弛。圓柱形SiGe層的上述特性係允許適當地控制圓柱形SiGe層的TDD,這對於滿足本發明的目的而言是至關重要的。圓柱形SiGe層的TDD較佳至少為1.0×10
3cm
-2(/平方公分)。
在基材的邊緣區域中提供圓柱形SiGe層之後,移除被圓柱形SiGe層圍繞的剩餘的遮罩層,並且基材的之前覆蓋有遮罩層的表面係變得可用於沉積一SiGe層,該SiGe層與基材的表面以及圓柱形SiGe層的內表面與上表面接觸。根據本發明的較佳實施態樣,在大氣壓力下經由CVD以磊晶的方式沉積SiGe層。根據本發明的另一較佳實施態樣,SiGe層的組成是Si
1-xGe
x,其中0.01≤x≤1。根據本發明的實施態樣,SiGe層是漸變緩衝層(graded buffer layer)或恆定組成層(constant composition layer)。SiGe層係部分地或完全地鬆弛,並與基材及圓柱形SiGe層的內表面接觸,或者與基材及圓柱形SiGe層的內表面與上表面都接觸。圓柱形SiGe層的鍺含量可以低於、等於或高於SiGe層的鍺含量。SiGe層的厚度係較佳不小於0.01微米且不大於10微米。
圓柱形SiGe層中所包含的線差排係藉由在達到臨界厚度時朝向中心滑動而使SiGe層鬆弛。其結果是與先前技術方法相比,堆積密度及線差排密度降低,以及表面粗糙度與整體均勻性改善。
以下參照附圖揭露本發明。
在生產的最終狀態,根據本發明生產的晶圓可以具有圖1中所顯示的結構。此結構包括基材1、圓柱形矽鍺層2以及接觸圓柱形矽鍺層2的內表面與上表面的矽鍺層3。在圖2中,示出了該晶圓的邊緣區域,其係在箭頭的方向上從晶圓的邊緣朝向晶圓的中心延伸。
在沉積矽鍺層3之前,晶圓係處於圖3中所示的中間狀態。中間狀態的結構包括基材1以及具有徑向寬度w與厚度t的圓柱形矽鍺層2。圖4表示處於中間狀態的晶圓的俯視圖。
為了實現中間狀態,如圖5所示,在基材1的上表面的上面提供遮罩層4。然後,移除遮罩層4的外部部分,以提供到基材1的邊緣區域中的基材1的環形自由表面6的通路。接著,圓柱形矽鍺層2係被沉積到環形自由表面6上,並圍繞遮罩層4的剩餘部分5。隨後,遮罩層4的剩餘部分5也被移除,以提供用於隨後在基材1與圓柱形矽鍺層2上沉積矽鍺層3的中間狀態。
圖6示出了從生產的中間狀態開始直到生產的最終狀態的TD的演變。一旦達到臨界厚度,包含在圓柱形矽鍺層2中的線差排係藉由朝向中心滑動而促進矽鍺層3的鬆弛。
在生產的最終狀態,根據本發明生產的晶圓也可以具有圖7或圖8中所顯示的結構。根據圖7所示的實施態樣,矽鍺層3係接觸基材1的表面與圓柱形矽鍺層2的內表面直到一定的高度。根據圖8中所示的實施態樣,矽鍺層3與圓柱形矽鍺層2具有相同的厚度。
如圖9所示,基材的環形自由表面的寬度甚至可以與基材1的邊緣部分7的長度l一樣小,在該處基材的厚度減小,或者甚至可以小於長度l。
以上對說明性實施態樣的描述應當被理解為是示例性的。
1:基材
2:圓柱形矽鍺層
3:矽鍺層
4:遮罩層
5:遮罩層的剩餘部分
6:基材的環形自由表面
7:邊緣部分
l:邊緣部分的長度
w:寬度
t:厚度
TD:線差排
圖1表示處於其最終生產狀態的晶圓的實施態樣的截面圖。
圖2是表示顯示了圖1所示晶圓的邊緣區域的截面圖。
圖3與圖2的不同之處僅在於,晶圓的邊緣區域被示出為處於晶圓生產的中間狀態。
圖4是表示根據圖3的晶圓的俯視圖。
圖5以俯視圖示出了在所要求保護的製程過程中的晶圓狀態,該製程從基材開始並以根據圖3與圖4的晶圓生產的中間狀態結束。
圖6示出了TD的演變,其開始於根據圖3的晶圓生產的中間狀態,結束於根據圖2的生產的最終狀態。
圖7表示處於其最終生產狀態的晶圓的另一實施態樣的截面圖。
圖8表示處於其最終生產狀態的晶圓的又一實施態樣的截面圖。
圖9表示基材的邊緣區域的截面圖。
1:基材
2:圓柱形矽鍺層
3:矽鍺層
Claims (7)
- 一種用於在基材(1)上異質磊晶沉積(heteroepitaxially depositing)矽鍺層(silicon germanium layer)(3)的方法,其包括: 在該基材(1)的上面提供遮罩層(mask layer)(4); 移除該遮罩層(4)的外部部分(outer section),以在該基材的圍繞遮罩層(4)的剩餘部分(remainder)(5)的邊緣區域(edge region)中提供到該基材的環形自由表面(annular-shaped free surface)(6)的通路(access); 在該基材的環形自由表面 (6)的上面沉積圓柱形矽鍺層(2); 移除該遮罩層的剩餘部分;以及 在該基材(1)的上面及該圓柱形矽鍺層(2)的上面沉積矽鍺層(3),該矽鍺層(3)接觸該圓柱形矽鍺層(2)的內部側表面(inner lateral surface)。
- 如請求項1所述的方法,其包括: 提供低溫氧化物材料(low temperature oxide material)作為遮罩層(4)。
- 如請求項1或2所述的方法,其包括: 在該基材的環形自由表面(6)的上面沉積該圓柱形矽鍺層(2),使得其具有不大於1.5毫米的寬度以及不小於10奈米且不大於10微米的厚度。
- 如請求項1或2所述的方法,其包括: 在該基材(1)的上面及該圓柱形矽鍺層(2)的上面沉積該矽鍺層(3),使得其具有不小於0.01微米且不大於10微米的厚度。
- 如請求項1或2所述的方法,其中 該矽鍺層(3)是恆定組成層(constant composition layer)。
- 如請求項1或2所述的方法,其中 該矽鍺層(3)是漸變組成層(graded composition layer)。
- 如請求項1或2所述的方法,其中 該圓柱形矽鍺層(2)的鍺的含量係低於、等於或高於該矽鍺層(3)的鍺的含量。
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US6946373B2 (en) * | 2002-11-20 | 2005-09-20 | International Business Machines Corporation | Relaxed, low-defect SGOI for strained Si CMOS applications |
US8501594B2 (en) | 2003-10-10 | 2013-08-06 | Applied Materials, Inc. | Methods for forming silicon germanium layers |
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