TW202147285A - Pixel driving circuit - Google Patents

Pixel driving circuit Download PDF

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TW202147285A
TW202147285A TW109145078A TW109145078A TW202147285A TW 202147285 A TW202147285 A TW 202147285A TW 109145078 A TW109145078 A TW 109145078A TW 109145078 A TW109145078 A TW 109145078A TW 202147285 A TW202147285 A TW 202147285A
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switch
terminal
control
control signal
period
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TW109145078A
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TWI742968B (en
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林志隆
林捷安
吳佳恩
蔡佳凌
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友達光電股份有限公司
國立成功大學
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Priority to CN202110386028.3A priority Critical patent/CN113077752B/en
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
    • Y02B20/40—Control techniques providing energy savings, e.g. smart controller or presence detection

Abstract

A pixel driving circuit includes a light emitting unit, ten switches and two capacitors. A driving circuit of the light emitting unit passes only one of the switches to reduce power consumption. In addition, threshold voltages and operation voltages are compensated in the pixel driving circuit so that the light emitting unit can provide consistent brightness.

Description

畫素驅動電路pixel drive circuit

本揭露是有關於發光二極體的畫素驅動電路。The present disclosure relates to a pixel driving circuit of a light emitting diode.

目前發光二極體已經廣泛地應用於各類型的顯示器當中。發光二極體發光時的亮度與其驅動電流的大小有關，而其驅動電流的大小係由驅動電晶體來控制。然而，因為製程的變異會造成顯示器中的每個畫素的驅動電晶體的臨界電壓(threshold voltage,Vth)不盡相同，如此一來將會使得不同畫素之中的發光二極體具有不同的驅動電流而使每個發光二極體的亮度不一，進而造成顯示器在顯示畫面的時候會有亮度不均勻的問題。此外，驅動電流示由操作電壓所提供，而操作電壓容易因為傳遞路徑中的線阻產生壓降，使得每個畫素的操作電壓不同，使驅動電流產生誤差。At present, light-emitting diodes have been widely used in various types of displays. The brightness of the light-emitting diode when it emits light is related to the size of its driving current, and the size of the driving current is controlled by the driving transistor. However, due to process variation, the threshold voltage (Vth) of the driving transistor of each pixel in the display will be different, which will make the light-emitting diodes in different pixels have different values. The brightness of each light-emitting diode is different due to the driving current of the display device, which causes the problem of uneven brightness when the display displays a picture. In addition, the driving current is provided by the operating voltage, and the operating voltage is prone to voltage drop due to the line resistance in the transmission path, so that the operating voltage of each pixel is different, resulting in an error in the driving current.

因此，如何針對顯示器畫素之驅動電晶體的臨界電壓做補償，並也對操作電壓做補償，是本領域的技術人員所致力研究的目標。Therefore, how to compensate for the threshold voltage of the driving transistor of the display pixel, and how to compensate the operating voltage, is the goal of those skilled in the art.

本發明的實施例提出一種畫素驅動電路，包括以下元件。發光單元具有第一端及第二端，發光單元的第一端連接至第一操作電壓。第一開關具有第一端、第二端及控制端，第一開關的第一端連接置發光單元的第二端，第一開關的第二端連接至第二操作電壓。第二開關具有第一端、第二端及控制端，第二開關的第一端連接至第一開關的控制端，第二開關的第二端連接至參考電壓。第一電容具有第一端及第二端，第一電容的第一端連接至第一開關的控制端及第二開關的第一端。第三開關具有第一端、第二端及控制端，第三開關的第一端連接至第二操作電壓，第三開關的控制端連接至第二開關的控制端。第四開關具有第一端、第二端及控制端，第四開關的第一端連接至第一電容的第二端及第三開關的第二端，第四開關的第二端連接至第一控制訊號，第四開關的控制端連接至第一電壓。第五開關具有第一端、第二端及控制端，第五開關的第一端連接至第二電壓，第五開關的第二端連接至第二開關的控制端及第三開關的控制端，第五開關的控制端連接至第二控制訊號。第六開關具有第一端、第二端及控制端，第六開關的第一端連接至第二開關的控制端、第三開關的控制端及第五開關的第二端，第六開關的控制端連接至第三控制訊號。第七開關具有第一端、第二端及控制端，第七開關的第一端連接至第六開關的第二端，第七開關的控制端連接至第四控制訊號。第八開關具有第一端、第二端及控制端，第八開關的第一端連接至第七開關的第二端，第八開關的第二端連接至第一控制訊號，第八開關的控制端連接至參考電壓。第二電容具有第一端及第二端，第二電容的第一端連接置第六開關的第二端及第七開關的第一端。第九開關，具有第一端、第二端及控制端，第九開關的第一端連接至第二電容的第二端，第九開關的第二端連接至一資料電壓，第九開關的控制端連接至第四控制訊號。第十開關具有第一端、第二端及控制端，第十開關的第一端連接至第二電容的第二端及第九開關的第一端，第十開關的第二端連接至第一電壓，第十開關的控制端連接至第二控制訊號。An embodiment of the present invention provides a pixel driving circuit, which includes the following elements. The light-emitting unit has a first end and a second end, and the first end of the light-emitting unit is connected to the first operating voltage. The first switch has a first terminal, a second terminal and a control terminal, the first terminal of the first switch is connected to the second terminal of the light emitting unit, and the second terminal of the first switch is connected to the second operating voltage. The second switch has a first terminal, a second terminal and a control terminal, the first terminal of the second switch is connected to the control terminal of the first switch, and the second terminal of the second switch is connected to the reference voltage. The first capacitor has a first end and a second end, and the first end of the first capacitor is connected to the control end of the first switch and the first end of the second switch. The third switch has a first terminal, a second terminal and a control terminal, the first terminal of the third switch is connected to the second operating voltage, and the control terminal of the third switch is connected to the control terminal of the second switch. The fourth switch has a first terminal, a second terminal and a control terminal, the first terminal of the fourth switch is connected to the second terminal of the first capacitor and the second terminal of the third switch, and the second terminal of the fourth switch is connected to the second terminal of the third switch. A control signal, the control terminal of the fourth switch is connected to the first voltage. The fifth switch has a first end, a second end and a control end, the first end of the fifth switch is connected to the second voltage, and the second end of the fifth switch is connected to the control end of the second switch and the control end of the third switch , the control terminal of the fifth switch is connected to the second control signal. The sixth switch has a first end, a second end and a control end. The first end of the sixth switch is connected to the control end of the second switch, the control end of the third switch and the second end of the fifth switch. The control terminal is connected to the third control signal. The seventh switch has a first terminal, a second terminal and a control terminal, the first terminal of the seventh switch is connected to the second terminal of the sixth switch, and the control terminal of the seventh switch is connected to the fourth control signal. The eighth switch has a first terminal, a second terminal and a control terminal, the first terminal of the eighth switch is connected to the second terminal of the seventh switch, the second terminal of the eighth switch is connected to the first control signal, and the The control terminal is connected to the reference voltage. The second capacitor has a first end and a second end, and the first end of the second capacitor is connected to the second end of the sixth switch and the first end of the seventh switch. The ninth switch has a first terminal, a second terminal and a control terminal, the first terminal of the ninth switch is connected to the second terminal of the second capacitor, the second terminal of the ninth switch is connected to a data voltage, and the The control end is connected to the fourth control signal. The tenth switch has a first end, a second end and a control end, the first end of the tenth switch is connected to the second end of the second capacitor and the first end of the ninth switch, and the second end of the tenth switch is connected to the first end of the ninth switch. A voltage, and the control terminal of the tenth switch is connected to the second control signal.

在一些實施例中，畫素驅動電路依序操作於第一期間、第二期間、第三期間及第四期間。在第一期間內，第一開關、第三開關、第六開關及第十開關處於截止狀態，第二開關、第四開關、第五開關、第七開關、第八開關及第九開關處於導通狀態。在第二期間內，第一開關、第三開關、第六開關及第十開關處於截止狀態，第二開關、第四開關、第五開關、第七開關、第八開關、第九開關處於導通狀態。在第三期間的第一子期間內，第一開關、第三開關、第五開關、第六開關、第七開關及第九開關處於截止狀態，第二開關、第四開關、第八開關及第十開關處於導通狀態。在第三期間的第二子期間內，第二開關、第四開關、第五開關、第七開關及第九開關處於截止狀態，第一開關、第三開關、第六開關、第八開關及第十開關處於導通狀態。在第四期間內，第一開關、第三開關、第四開關、第六開關、第七開關、第九開關及第十開關處於截止狀態，第二開關、第五開關及第八開關處於導通狀態。In some embodiments, the pixel driving circuit operates in the first period, the second period, the third period and the fourth period in sequence. During the first period, the first switch, the third switch, the sixth switch, and the tenth switch are turned off, and the second switch, the fourth switch, the fifth switch, the seventh switch, the eighth switch, and the ninth switch are turned on. state. During the second period, the first switch, the third switch, the sixth switch and the tenth switch are in the off state, and the second switch, the fourth switch, the fifth switch, the seventh switch, the eighth switch and the ninth switch are in the on state state. In the first sub-period of the third period, the first switch, the third switch, the fifth switch, the sixth switch, the seventh switch and the ninth switch are in the off state, the second switch, the fourth switch, the eighth switch and the The tenth switch is in an on state. In the second sub-period of the third period, the second switch, the fourth switch, the fifth switch, the seventh switch and the ninth switch are in the off state, the first switch, the third switch, the sixth switch, the eighth switch and the The tenth switch is in an on state. During the fourth period, the first switch, the third switch, the fourth switch, the sixth switch, the seventh switch, the ninth switch and the tenth switch are turned off, and the second switch, the fifth switch and the eighth switch are turned on state.

在一些實施例中，第三開關、第五開關、第七開關及第九開關為P型電晶體，第一開關、第二開關、第四開關、第六開關、第八開關及第十開關為N型電晶體。In some embodiments, the third switch, the fifth switch, the seventh switch and the ninth switch are P-type transistors, and the first switch, the second switch, the fourth switch, the sixth switch, the eighth switch and the tenth switch It is an N-type transistor.

在一些實施例中，第一開關的臨界電壓匹配至第四開關的臨界電壓，第六開關的臨界電壓匹配至第八開關的臨界電壓。In some embodiments, the threshold voltage of the first switch is matched to the threshold voltage of the fourth switch, and the threshold voltage of the sixth switch is matched to the threshold voltage of the eighth switch.

在一些實施例中，在第一期間內，第一控制訊號、第二控制訊號及第四控制訊號為第一低準位，第三控制訊號為第二低準位。在第二期間內，第一控制訊號為第一高準位，第二控制訊號及第四控制訊號為第一低準位，第三控制訊號為第二低準位。在第三期間內，第一控制訊號、第二控制訊號及第四控制訊號為第一高準位，第三控制訊號由第二低準位逐漸地增加至第二高準位。在第四期間內，第一控制訊號及第四控制訊號為第一高準位，第二控制訊號為第一低準位，第三控制訊號為第二低準位。In some embodiments, during the first period, the first control signal, the second control signal and the fourth control signal are at the first low level, and the third control signal is at the second low level. During the second period, the first control signal is at the first high level, the second control signal and the fourth control signal are at the first low level, and the third control signal is at the second low level. During the third period, the first control signal, the second control signal and the fourth control signal are at the first high level, and the third control signal gradually increases from the second low level to the second high level. During the fourth period, the first control signal and the fourth control signal are at the first high level, the second control signal is at the first low level, and the third control signal is at the second low level.

在一些實施例中，第一操作電壓大於第二操作電壓，第一電壓小於第二電壓。In some embodiments, the first operating voltage is greater than the second operating voltage, and the first voltage is less than the second voltage.

在一些實施例中，上述的發光單元為發光二極體。In some embodiments, the above-mentioned light-emitting units are light-emitting diodes.

在一些實施例中，上述發光二極體的尺寸為次毫米。In some embodiments, the size of the above-mentioned light emitting diodes is sub-millimeter.

在一些實施例中，上述的畫素驅動電路設置於顯示面板內。In some embodiments, the above-mentioned pixel driving circuit is disposed in the display panel.

在一些實施例中，上述的畫素驅動電路設置於背光模組內。In some embodiments, the above-mentioned pixel driving circuit is disposed in the backlight module.

在上述的畫素驅動電路中，可以補償臨界電壓與操作電壓，並且具有節省功率消耗的功效。In the above pixel driving circuit, the threshold voltage and the operating voltage can be compensated, and the power consumption can be saved.

關於本文中所使用之「第一」、「第二」等，並非特別指次序或順位的意思，其僅為了區別以相同技術用語描述的元件或操作。The terms "first", "second", etc. used in this document do not mean a particular order or order, but are only used to distinguish elements or operations described in the same technical terms.

圖1是根據一實施例繪示畫素驅動電路的電路架構圖。畫素驅動電路100可以設置在顯示裝置的背光模組上以提供背光源，或者設置在顯示面板中做為一像素，本揭露並不在此限。畫素驅動電路100包括了發光單元110、開關T1~T10、第一電容C1與第二電容C2。發光單元110例如為發光二極體，此發光二極體的尺寸可以是次毫米等級或其他合適的大小，本揭露並不在此限。FIG. 1 is a circuit structure diagram illustrating a pixel driving circuit according to an embodiment. The pixel driving circuit 100 may be disposed on the backlight module of the display device to provide a backlight source, or may be disposed in the display panel as a pixel, which is not limited in the present disclosure. The pixel driving circuit 100 includes a light emitting unit 110, switches T1-T10, a first capacitor C1 and a second capacitor C2. The light-emitting unit 110 is, for example, a light-emitting diode, and the size of the light-emitting diode may be sub-millimeter or other suitable size, which is not limited in the present disclosure.

發光單元110具有第一端110-1及第二端110-2，發光單元110的第一端110-1連接至操作電壓VDD。開關T1具有第一端T1-1、第二端T1-2及控制端T1-3，開關T1的第一端T1-1連接置發光單元110的第二端110-2，開關T1的第二端T1-2連接至操作電壓VSS。開關T2具有第一端T2-1、第二端T2-2及控制端T2-3，開關T2的第一端T2-1連接至開關T1的控制端T1-3，開關T2的第二端T2-2連接至參考電壓Vref 。第一電容C1具有第一端C1-1及第二端C1-2，第一電容C1的第一端C1-1連接至開關T1的控制端T1-3及開關T2的第一端T2-1。開關T3具有第一端T3-1、第二端T3-2及控制端T3-3，開關T3的第一端T3-1連接至操作電壓VSS，開關T3的控制端T3-3連接至開關T2的控制端T2-3。開關T4具有第一端T4-1、第二端T4-2及控制端T4-3，開關T4的第一端T4-1連接至第一電容C1的第二端C1-2及開關T3的第二端T3-2，開關T4的第二端T4-2連接至控制訊號S1，開關T4的控制端T4-3連接至電壓VL 。開關T5具有第一端T5-1、第二端T5-2及控制端T5-3，開關T5的第一端T5-1連接至電壓VH ，開關T5的第二端T5-2連接至開關T2的控制端T2-3及開關T3的控制端T3-3，開關T5的控制端T5-3連接至控制訊號S2。The light emitting unit 110 has a first terminal 110-1 and a second terminal 110-2, and the first terminal 110-1 of the light emitting unit 110 is connected to the operating voltage VDD. The switch T1 has a first terminal T1-1, a second terminal T1-2 and a control terminal T1-3, the first terminal T1-1 of the switch T1 is connected to the second terminal 110-2 of the light-emitting unit 110, and the second terminal T1-1 of the switch T1 is connected to the second terminal 110-2 of the light-emitting unit 110. The terminal T1-2 is connected to the operating voltage VSS. The switch T2 has a first terminal T2-1, a second terminal T2-2 and a control terminal T2-3, the first terminal T2-1 of the switch T2 is connected to the control terminal T1-3 of the switch T1, and the second terminal T2 of the switch T2 -2 is connected to the reference voltage V ref . The first capacitor C1 has a first terminal C1-1 and a second terminal C1-2, and the first terminal C1-1 of the first capacitor C1 is connected to the control terminal T1-3 of the switch T1 and the first terminal T2-1 of the switch T2 . The switch T3 has a first terminal T3-1, a second terminal T3-2 and a control terminal T3-3, the first terminal T3-1 of the switch T3 is connected to the operating voltage VSS, and the control terminal T3-3 of the switch T3 is connected to the switch T2 The control terminal T2-3. The switch T4 has a first terminal T4-1, a second terminal T4-2 and a control terminal T4-3. The first terminal T4-1 of the switch T4 is connected to the second terminal C1-2 of the first capacitor C1 and the first terminal C1-2 of the switch T3. two-terminal T3-2, T4-2 second terminal of the switch T4 is connected to the control signal S1, the switching control terminal T4-3 T4 is connected to the voltage V L. The switch T5 has a first terminal T5-1, a second terminal T5-2 and a control terminal T5-3, the first terminal T5-1 of the switch T5 is connected to the voltage VH , and the second terminal T5-2 of the switch T5 is connected to the switch The control terminal T2-3 of the T2, the control terminal T3-3 of the switch T3, and the control terminal T5-3 of the switch T5 are connected to the control signal S2.

開關T6具有第一端T6-1、第二端T6-2及控制端T6-3，開關T6的第一端T6-1連接至開關T2的控制端T2-3、開關T3的控制端T3-3及開關T5的第二端T5-2，開關T6的控制端T6-3連接至控制訊號Vsweep 。開關T7具有第一端T7-1、第二端T7-2及控制端T7-3，開關T7的第一端T7-1連接至開關T6的第二端T6-2，開關T7的控制端T7-3連接至控制訊號S3。開關T8具有第一端T8-1、第二端T8-2及控制端T8-3，開關T8的第一端T8-1連接至開關T7的第二端T7-2，開關T8的第二端T8-2連接至控制訊號S1，開關T8的控制端T3-3連接至參考電壓Vref . 。第二電容C2具有第一端C2-1及第二端C2-2，第二電容C2的第一端C2-1連接置開關T6的第二端T6-2及開關T7的第一端T7-1。開關T9具有第一端T9-1、第二端T9-2及控制端T9-3，開關T9的第一端T9-1連接至第二電容C2的第二端C2-2，開關T9的第二端T9-2連接至資料電壓VDATA ，開關T9的控制端T9-3連接至控制訊號S3。開關T10具有第一端T10-1、第二端T10-2及控制端T10-3，開關T10的第一端T10-1連接至第二電容C2的第二端C2-2及開關T9的第一端T9-1，開關T10的第二端T10-2連接至電壓VL ，開關T10的控制端T10-3連接至控制訊號S2。The switch T6 has a first terminal T6-1, a second terminal T6-2 and a control terminal T6-3. The first terminal T6-1 of the switch T6 is connected to the control terminal T2-3 of the switch T2 and the control terminal T3- of the switch T3. 3 and the second terminal T5-2 of the switch T5 and the control terminal T6-3 of the switch T6 are connected to the control signal V sweep . The switch T7 has a first terminal T7-1, a second terminal T7-2 and a control terminal T7-3, the first terminal T7-1 of the switch T7 is connected to the second terminal T6-2 of the switch T6, and the control terminal T7 of the switch T7 -3 is connected to control signal S3. The switch T8 has a first terminal T8-1, a second terminal T8-2 and a control terminal T8-3, the first terminal T8-1 of the switch T8 is connected to the second terminal T7-2 of the switch T7, and the second terminal of the switch T8 T8-2 connected to a control signal S1, the switching control terminal T3-3 T8 is connected to the reference voltage V ref.. The second capacitor C2 has a first terminal C2-1 and a second terminal C2-2. The first terminal C2-1 of the second capacitor C2 is connected to the second terminal T6-2 of the switch T6 and the first terminal T7- of the switch T7. 1. The switch T9 has a first terminal T9-1, a second terminal T9-2 and a control terminal T9-3, the first terminal T9-1 of the switch T9 is connected to the second terminal C2-2 of the second capacitor C2, and the first terminal T9-1 of the switch T9 is connected to the second terminal C2-2 of the second capacitor C2. The two terminals T9-2 are connected to the data voltage V DATA , and the control terminal T9-3 of the switch T9 is connected to the control signal S3. The switch T10 has a first terminal T10-1, a second terminal T10-2 and a control terminal T10-3. The first terminal T10-1 of the switch T10 is connected to the second terminal C2-2 of the second capacitor C2 and the first terminal of the switch T9. One end of T9-1, T10-2 T10 switch of the second end is connected to the voltage V L, the control terminal of the switch T10 is T10-3 is connected to the control signal S2.

在此實施例中，開關T1~T10例如為薄膜電晶體(thin film transistor)，其中開關T3、T5、T7、T9為P型電晶體，開關T1、T2、T4、T6、T8、T10為N型電晶體。此外，開關T1的臨界電壓匹配至開關T4的臨界電壓，開關T6的臨界電壓匹配至開關T8的臨界電壓，以下會再詳細說明臨界電壓匹配的功效。In this embodiment, the switches T1 to T10 are, for example, thin film transistors, wherein the switches T3, T5, T7, and T9 are P-type transistors, and the switches T1, T2, T4, T6, T8, and T10 are N. type transistor. In addition, the threshold voltage of switch T1 is matched to the threshold voltage of switch T4, the threshold voltage of switch T6 is matched to the threshold voltage of switch T8, and the effect of threshold voltage matching will be described in detail below.

圖2是根據一實施例繪示畫素驅動電路中各個控制訊號的時序圖。請參照圖2，畫素驅動電路依序操作於第一期間210、第二期間220、第三期間230及第四期間240，而第四期間240結束後又回到第一期間210。FIG. 2 is a timing diagram illustrating various control signals in a pixel driving circuit according to an embodiment. Referring to FIG. 2 , the pixel driving circuit operates in the first period 210 , the second period 220 , the third period 230 and the fourth period 240 in sequence, and returns to the first period 210 after the fourth period 240 ends.

在此實施例中，操作電壓VDD大於操作電壓VSS，電壓VL 小於電壓VH ，參考電壓Vref 大於電壓VL 。此外，電壓VL 大於低準位VGL ，而高準位VGH 大於電壓VH 。In this embodiment, the operating voltage VDD is greater than an operating voltage of the VSS, a voltage less than the voltage V L V H, reference voltage V ref is greater than the voltage V L. Further, the voltage V L greater than the low level V GL, and the high level V GH greater than the voltage V H.

圖3是根據一實施例繪示在第一期間內畫素驅動電路的開關示意圖。請參照圖2與圖3，第一期間210是用以重置畫素驅動電路100。在第一期間210內，控制訊號S1、控制訊號S2及控制訊號S3為低準位VGL ，控制訊號Vsweep 為低準位Vsweep_L ，其中低準位VGL 可相同或不同於低準位Vsweep_L ，本揭露並不在此限。因此，在第一期間210，開關T1、T3、T6、T10處於截止狀態，而開關T2、T4、T5、T7、T8、T9處於導通狀態。具體來說，節點A的電位相同於參考電壓Vref ，但參考電壓Vref 小於開關T1的臨界電壓。電壓VL 大於開關T4的臨界電壓，因此開關T4處於導通狀態，節點B的電位相同於低準位VGL 。節點C的電位相同於電壓VH 。參考電壓Vref 大於開關T8的臨界電壓，因此開關T8處於導通狀態，節點D的電位相同於低準位VGL 。節點E的電位相同於資料電壓VDATA 。FIG. 3 is a schematic diagram illustrating a switch of a pixel driving circuit in a first period according to an embodiment. Referring to FIG. 2 and FIG. 3 , the first period 210 is used to reset the pixel driving circuit 100 . During the first period 210 , the control signal S1 , the control signal S2 and the control signal S3 are at the low level V GL , and the control signal V sweep is at the low level V sweep_L , wherein the low level V GL may be the same or different from the low level V sweep_L , the disclosure is not limited to this. Therefore, in the first period 210 , the switches T1 , T3 , T6 , and T10 are turned off, and the switches T2 , T4 , T5 , T7 , T8 , and T9 are turned on. Specifically, the potential of the node A is the same as the reference voltage V ref , but the reference voltage V ref is smaller than the threshold voltage of the switch T1 . Voltage V L is greater than the threshold voltage of the switch T4, T4 so that the switch in the ON state, the potential of the node B is the same as the low level V GL. The potential of the node C is the same as the voltage V H . The reference voltage V ref is greater than the threshold voltage of the switch T8 , so the switch T8 is turned on, and the potential of the node D is the same as the low level V GL . The potential of the node E is the same as the data voltage V DATA .

圖4是根據一實施例繪示在第二期間內畫素驅動電路的開關示意圖。請參照圖2與圖4，第二期間220是用以做電壓補償。在第二期間220內，控制訊號S1為高準位VGH ，控制訊號S2及控制訊號S3為低準位VGL ，控制訊號Vsweep 為低準位Vsweep_L 。因此在第二期間220內，開關T1、T3、T6、T10處於截止狀態，開關T2、T4、T5、T7、T8、T9處於導通狀態。具體來說，節點A的電位相同於參考電壓Vref 。節點B的電位會因為對第一電容C1充電而不斷上升，一直到節點B的電位相同於VL -VTH_T4 時開關T4會切換為截止狀態，其中VTH_T4 為開關T4的臨界電壓。節點C的電位相同於電壓VH 。類似地，節點D的電位會不斷上升，一直到節點D的電位相同於Vref -VTH_T8 時開關T8會切換為截止狀態，其中VTH_T8 為開關T8的臨界電壓。節點E的電位相同於資料電壓VDATA 。FIG. 4 is a schematic diagram illustrating a switch of a pixel driving circuit in a second period according to an embodiment. Please refer to FIG. 2 and FIG. 4 , the second period 220 is used for voltage compensation. During the second period 220 , the control signal S1 is at a high level V GH , the control signals S2 and S3 are at a low level V GL , and the control signal V sweep is at a low level V sweep_L . Therefore, in the second period 220 , the switches T1 , T3 , T6 , and T10 are in an off state, and the switches T2 , T4 , T5 , T7 , T8 , and T9 are in an on state. Specifically, the potential of the node A is the same as the reference voltage V ref . The potential of the node B will continue to rise due to the charging of the first capacitor C1 until the potential of the node B is equal to V L −V TH_T4 , and the switch T4 will switch to the off state, where V TH_T4 is the threshold voltage of the switch T4 . The potential of the node C is the same as the voltage V H . Similarly, the potential of the node D will continue to rise until the potential of the node D is equal to V ref −V TH_T8 , and the switch T8 will be switched to the off state, where V TH_T8 is the threshold voltage of the switch T8 . The potential of the node E is the same as the data voltage V DATA .

圖5是根據一實施例繪示在第三期間內第一子期間的畫素驅動電路的開關示意圖。請參照圖2與圖5，第三期間230分為第一子期間230-1及第二子期間230-2，在第一子期間230-1內發光單元110為截止，而在第二子期間230-2內發光單元110為導通並發光。第一子期間230-1及第二子期間230-2的長度是由資料電壓VDATA 所決定。換言之，在此實施例中是以脈寬調變(pulse width modulation，PWM)的方式來驅動發光單元110，藉此決定像素的亮度。具體來說，在第三期間230內，控制訊號S1、控制訊號S2及控制訊號S3為高準位VGH ，控制訊號Vsweep 由低準位Vsweep_L 逐漸地增加至高準位Vsweep_H ，其中高準位Vsweep_H 可相同於或不同於高準位VGH ，本揭露並不在此限。FIG. 5 is a schematic diagram illustrating the switching of the pixel driving circuit in the first sub-period in the third period according to an embodiment. Referring to FIGS. 2 and 5 , the third period 230 is divided into a first sub-period 230-1 and a second sub-period 230-2. In the first sub-period 230-1, the light-emitting unit 110 is turned off, and in the second sub-period 230-1 During the period 230-2, the light emitting unit 110 is turned on and emits light. The lengths of the first sub-period 230-1 and the second sub-period 230-2 are determined by the data voltage V DATA . In other words, in this embodiment, the light-emitting unit 110 is driven by means of pulse width modulation (PWM), thereby determining the brightness of the pixels. Specifically, in the third period 230 , the control signal S1 , the control signal S2 and the control signal S3 are at the high level V GH , and the control signal V sweep gradually increases from the low level V sweep_L to the high level V sweep_H , where the high level V GH . The level V sweep_H may be the same as or different from the high level V GH , which is not limited in the present disclosure.

在第一子期間230-1內，開關T1、T3、T5、T6、T7、T9處於截止狀態，開關T2、T4、T8、T10處於導通狀態。節點A的電位相同於參考電壓Vref 。節點B的電位相同於VL -VTH_T4 。節點C的電位保持不變，維持在電壓VH 。特別的是，節點E的電位從第二期間220的資料電壓VDATA 改變為第三期間230的電壓VL ，其變化量表示為VL -VDATA ，因此節點D的電位會由第二期間220的Vref -VTH_T8 改變為Vref -VTH_T8 +VL -VDATA 。此時控制訊號Vsweep 的電位小於節點D的電位，因此開關T6處於截止狀態。In the first sub-period 230-1, the switches T1, T3, T5, T6, T7, and T9 are in an off state, and the switches T2, T4, T8, and T10 are in an on state. The potential of the node A is the same as the reference voltage V ref . The potential of node B is the same as V L -V TH_T4 . The potential of node C remains unchanged at voltage V H . In particular, the potential of the node E changes from the second data voltage V DATA 220 during a voltage V L of the third period 230, the amount of change is expressed as V L -V DATA, the potential of the node D will be the second period V ref - V TH_T8 of 220 changes to V ref - V TH_T8 +V L -V DATA . At this time , the potential of the control signal V sweep is smaller than the potential of the node D, so the switch T6 is turned off.

由於控制訊號Vsweep 的電位不斷上升，當以下數學式1成立時開關T6切換為導通狀態，接著會進入第二子期間230-2。 [數學式1]

Figure 02_image001
Figure 02_image003
Figure 02_image005
Since the potential of the control signal V sweep keeps rising, the switch T6 is switched to the conducting state when the following equation 1 is established, and then the second sub-period 230-2 is entered. [Mathematical formula 1]
Figure 02_image001
Figure 02_image003
Figure 02_image005

其中VD 為節點D的電位，

Figure 02_image007
為開關T6的臨界電壓。由於開關T6的臨界電壓匹配於開關T8的臨界電壓，因此在數學式1中兩個臨界電壓
Figure 02_image007
、
Figure 02_image009
相互抵消，也就是說刪除了開關T6的臨界電壓的影響。當資料電壓VDATA 越大時，數學式1越早成立，也就越早進入第二子期間230-2。where V D is the potential of node D,
Figure 02_image007
is the threshold voltage of switch T6. Since the threshold voltage of switch T6 matches the threshold voltage of switch T8, the two threshold voltages in Equation 1
Figure 02_image007
,
Figure 02_image009
They cancel each other out, that is to say, the influence of the threshold voltage of the switch T6 is removed. When the data voltage V DATA is larger, the earlier the mathematical formula 1 is established, the earlier the second sub-period 230 - 2 is entered.

圖6是根據一實施例繪示在第三期間內第二子期間的畫素驅動電路的開關示意圖。請參照圖2與圖6，在第二子期間230-2內，開關T2、T4、T5、T7、T9處於截止狀態，開關T1、T3、T6、T8、T10處於導通狀態。具體來說，由於開關T6處於導通狀態，節點D及節點C的電位都相同於Vref -VTH_T8 +VL -VDATA ，此電位會截止開關T2並導通開關T3。節點B的電位從第一子期間230-1的VL -VTH_T4 改變為操作電壓VSS，改變量為VSS-VL +VTH_T4 ，因此節點A的電位會從第一子期間230-1的參考電壓Vref 改變為Vref +VSS-VL +VTH_T4 ，此電位會導通開關T1產生電流ILED ，此電流ILED 流經發光單元110與開關T1，電流ILED 的大小如以下數學式2所示。 [數學式2]

Figure 02_image011
Figure 02_image013
Figure 02_image015
FIG. 6 is a schematic diagram illustrating the switching of the pixel driving circuit in the second sub-period in the third period according to an embodiment. Referring to FIG. 2 and FIG. 6 , in the second sub-period 230 - 2 , the switches T2 , T4 , T5 , T7 , and T9 are turned off, and the switches T1 , T3 , T6 , T8 , and T10 are turned on. Specifically, since the switch T6 is in an on state, the potentials of the nodes D and C are the same as V ref -V TH_T8 +V L -V DATA , which will turn off the switch T2 and turn on the switch T3 . The potential of node B is changed from V L -V TH_T4 in the first sub-period 230-1 to the operating voltage VSS by the amount of VSS-V L +V TH_T4 , so the potential of node A will change from the first sub-period 230-1 to the operating voltage VSS. The reference voltage V ref is changed to V ref +VSS-V L +V TH_T4 , this potential will turn on the switch T1 to generate the current I LED , the current I LED flows through the light-emitting unit 110 and the switch T1 , and the magnitude of the current I LED is shown in the following mathematical formula 2 shown. [Mathematical formula 2]
Figure 02_image011
Figure 02_image013
Figure 02_image015

其中K為常數，VA 為節點A的電位，VTH_T1 為開關T1的臨界電壓。值得注意的是，由於開關T1的臨界電壓匹配至開關T4的臨界電壓，因此電流ILED 的大小已經不受臨界電壓VTH_T1 的影響。此外，由於在數學式2補償了操作電壓VSS，因此電流ILED 的大小也不受操作電壓VSS的影響。在習知技術中驅動電流經過了兩個以上的開關，當電流較大時會產生壓降使得開關可能進入線性區，增加操作電壓VDD、VSS之間的跨壓可以解決此問題，但卻提高了功率消耗。相較之下，電流ILED 只會流經一個開關T1，因此具有減少功率消耗的功效。Wherein K is a constant, V A is the potential of the node A, V TH_T1 switching threshold voltage of T1. It is worth noting that since the threshold voltage of the switch T1 matches the threshold voltage of the switch T4, the magnitude of the current I LED is not affected by the threshold voltage V TH_T1 . In addition, since the operation voltage VSS is compensated in Equation 2, the magnitude of the current I LED is also not affected by the operation voltage VSS. In the prior art, the driving current passes through more than two switches. When the current is large, a voltage drop will occur, so that the switches may enter the linear region. Increasing the cross-voltage between the operating voltages VDD and VSS can solve this problem, but it increases the power consumption. In contrast, the current I LED only flows through one switch T1, so it has the effect of reducing power consumption.

圖7是根據一實施例繪示在第四期間內畫素驅動電路的開關示意圖。請參照圖2與圖7，第四期間240是用以關閉發光單元110。在第四期間240內，控制訊號S1及控制訊號S3為高準位VGH ，控制訊號S2為低準位VGL ，控制訊號Vsweep 為低準位Vsweep_L 。因此，開關T1、T3、T4、T6、T7、T9、T10處於截止狀態，開關T2、T5、T8處於導通狀態。節點A的電位為參考電壓Vref ，藉此截止開關T1。節點C的電位為電壓VH 。FIG. 7 is a schematic diagram illustrating a switch of a pixel driving circuit in a fourth period according to an embodiment. Referring to FIG. 2 and FIG. 7 , the fourth period 240 is used to turn off the light-emitting unit 110 . During the fourth period 240 , the control signal S1 and the control signal S3 are at the high level VGH , the control signal S2 is at the low level V GL , and the control signal V sweep is at the low level V sweep_L . Therefore, the switches T1 , T3 , T4 , T6 , T7 , T9 , and T10 are turned off, and the switches T2 , T5 , and T8 are turned on. The potential of the node A is the reference voltage V ref , thereby turning off the switch T1 . The potential of the node C is the voltage V H .

在上述實施例中，“連接”可以是直接連接。In the above-described embodiments, "connection" may be a direct connection.

雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，故本發明的保護範圍當視後附的申請專利範圍所界定者為準。Although the present invention has been disclosed as above with examples, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. The protection scope of the present invention shall be determined by the scope of the appended patent application.

100:畫素驅動電路 110:發光單元 C1:第一電容 C2:第二電容 T1~T10:開關 ILED :電流 110-1,C1-1,C2-1,T1-1,T2-1,T3-1,T4-1,T5-1,T6-1,T7-1,T8-1,T9-1,T10-1:第一端 110-2,C1-2,C2-2,T1-2,T2-2,T3-2,T4-2,T5-2,T6-2,T7-2,T8-2,T9-2,T10-2:第二端 T1-3,T2-3,T3-3,T4-3,T5-3,T6-3,T7-3,T8-3,T9-3,T10-3:控制端 A,B,C,D,E:節點 VDD,VSS:操作電壓 S1,S2,S3,Vsweep :控制訊號 VH ,VL :電壓 VDATA :資料電壓 Vref :參考電壓 210:第一期間 220:第二期間 230:第三期間 230-1:第一子期間 230-2:第二子期間 240:第四期間 VGH ,Vsweep_H :高準位 VGL ,Vsweep_L :低準位100: pixel drive circuit 110: light-emitting unit C1: first capacitor C2: second capacitor T1~T10: switch I LED : current 110-1, C1-1, C2-1, T1-1, T2-1, T3 -1, T4-1, T5-1, T6-1, T7-1, T8-1, T9-1, T10-1: first end 110-2, C1-2, C2-2, T1-2, T2-2, T3-2, T4-2, T5-2, T6-2, T7-2, T8-2, T9-2, T10-2: second end T1-3, T2-3, T3-3 , T4-3, T5-3, T6-3, T7-3, T8-3, T9-3, T10-3: control terminals A, B, C, D, E: node VDD, VSS: operating voltage S1, S2, S3, V sweep: the control signal V H, V L: 230 second period:: 230-1 third period: voltage V dATA: a data voltage V ref: reference voltage 210: a first sub-period of the first period 220 230 -2: Second sub-period 240: Fourth period V GH , V sweep_H : high level V GL , V sweep_L : low level

為讓本發明的上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。 圖1是根據一實施例繪示畫素驅動電路的電路架構圖。 圖2是根據一實施例繪示畫素驅動電路中各個控制訊號的時序圖。 圖3是根據一實施例繪示在第一期間內畫素驅動電路的開關示意圖。 圖4是根據一實施例繪示在第二期間內畫素驅動電路的開關示意圖。 圖5是根據一實施例繪示在第三期間內第一子期間的畫素驅動電路的開關示意圖。 圖6是根據一實施例繪示在第三期間內第二子期間的畫素驅動電路的開關示意圖。 圖7是根據一實施例繪示在第四期間內畫素驅動電路的開關示意圖。In order to make the above-mentioned features and advantages of the present invention more obvious and easy to understand, the following embodiments are given and described in detail with the accompanying drawings as follows. FIG. 1 is a circuit structure diagram illustrating a pixel driving circuit according to an embodiment. FIG. 2 is a timing diagram illustrating various control signals in a pixel driving circuit according to an embodiment. FIG. 3 is a schematic diagram illustrating a switch of a pixel driving circuit in a first period according to an embodiment. FIG. 4 is a schematic diagram illustrating a switch of a pixel driving circuit in a second period according to an embodiment. FIG. 5 is a schematic diagram illustrating the switching of the pixel driving circuit in the first sub-period in the third period according to an embodiment. FIG. 6 is a schematic diagram illustrating the switching of the pixel driving circuit in the second sub-period in the third period according to an embodiment. FIG. 7 is a schematic diagram illustrating a switch of a pixel driving circuit in a fourth period according to an embodiment.

100:畫素驅動電路100: Pixel drive circuit

110:發光單元110: Lighting unit

C1:第一電容C1: first capacitor

C2:第二電容C2: second capacitor

T1~T10:開關T1~T10: switch

110-1,C1-1,C2-1,T1-1,T2-1,T3-1,T4-1,T5-1,T6-1,T7-1,T8-1,T9-1,T10-1:第一端110-1,C1-1,C2-1,T1-1,T2-1,T3-1,T4-1,T5-1,T6-1,T7-1,T8-1,T9-1,T10- 1: The first end

110-2,C1-2,C2-2,T1-2,T2-2,T3-2,T4-2,T5-2,T6-2,T7-2,T8-2,T9-2,T10-2:第二端110-2,C1-2,C2-2,T1-2,T2-2,T3-2,T4-2,T5-2,T6-2,T7-2,T8-2,T9-2,T10- 2: second end

T1-3,T2-3,T3-3,T4-3,T5-3,T6-3,T7-3,T8-3,T9-3,T10-3:控制端T1-3, T2-3, T3-3, T4-3, T5-3, T6-3, T7-3, T8-3, T9-3, T10-3: Control terminal

A,B,C,D,E:節點A,B,C,D,E: Node

VDD,VSS:操作電壓VDD, VSS: operating voltage

S1,S2,S3,Vsweep :控制訊號S1,S2,S3,V sweep : Control signal

VH ,VL :電壓V H, V L: Voltage

VDATA :資料電壓V DATA : data voltage

Vref :參考電壓V ref : reference voltage

Claims (10)

一種畫素驅動電路，包括： 一發光單元，具有一第一端及一第二端，該發光單元的該第一端連接至第一操作電壓； 一第一開關，具有一第一端、一第二端及一控制端，該第一開關的該第一端連接置該發光單元的該第二端，該第一開關的該第二端連接至第二操作電壓； 一第二開關，具有一第一端、一第二端及一控制端，該第二開關的該第一端連接至該第一開關的該控制端，該第二開關的該第二端連接至一參考電壓； 一第一電容，具有一第一端及一第二端，該第一電容的該第一端連接至該第一開關的該控制端及該第二開關的該第一端； 一第三開關，具有一第一端、一第二端及一控制端，該第三開關的該第一端連接至該第二操作電壓，該第三開關的該控制端連接至該第二開關的該控制端； 一第四開關，具有一第一端、一第二端及一控制端，該第四開關的該第一端連接至該第一電容的該第二端及該第三開關的該第二端，該第四開關的該第二端連接至第一控制訊號，該第四開關的該控制端連接至一第一電壓； 一第五開關，具有一第一端、一第二端及一控制端，該第五開關的該第一端連接至第二電壓，該第五開關的該第二端連接至該第二開關的該控制端及該第三開關的該控制端，該第五開關的該控制端連接至一第二控制訊號； 一第六開關，具有一第一端、一第二端及一控制端，該第六開關的該第一端連接至該第二開關的該控制端、該第三開關的該控制端及該第五開關的該第二端，該第六開關的該控制端連接至一第三控制訊號； 一第七開關，具有一第一端、一第二端及一控制端，該第七開關的該第一端連接至該第六開關的該第二端，該第七開關的該控制端連接至一第四控制訊號； 一第八開關，具有一第一端、一第二端及一控制端，該第八開關的該第一端連接至該第七開關的該第二端，該第八開關的該第二端連接至該第一控制訊號，該第八開關的該控制端連接至該參考電壓； 一第二電容，具有一第一端及一第二端，該第二電容的該第一端連接置該第六開關的該第二端及該第七開關的該第一端； 一第九開關，具有一第一端、一第二端及一控制端，該第九開關的該第一端連接至該第二電容的該第二端，該第九開關的該第二端連接至一資料電壓，該第九開關的該控制端連接至該第四控制訊號；以及 一第十開關，具有一第一端、一第二端及一控制端，該第十開關的該第一端連接至該第二電容的該第二端及該第九開關的該第一端，該第十開關的該第二端連接至該第一電壓，該第十開關的該控制端連接至該第二控制訊號。A pixel driving circuit, comprising: a light-emitting unit having a first end and a second end, the first end of the light-emitting unit is connected to a first operating voltage; A first switch has a first end, a second end and a control end, the first end of the first switch is connected to the second end of the light-emitting unit, and the second end of the first switch is connected to to the second operating voltage; A second switch has a first end, a second end and a control end, the first end of the second switch is connected to the control end of the first switch, and the second end of the second switch is connected to to a reference voltage; a first capacitor having a first end and a second end, the first end of the first capacitor is connected to the control end of the first switch and the first end of the second switch; A third switch has a first end, a second end and a control end, the first end of the third switch is connected to the second operating voltage, and the control end of the third switch is connected to the second the control terminal of the switch; A fourth switch has a first end, a second end and a control end, the first end of the fourth switch is connected to the second end of the first capacitor and the second end of the third switch , the second terminal of the fourth switch is connected to the first control signal, and the control terminal of the fourth switch is connected to a first voltage; A fifth switch has a first terminal, a second terminal and a control terminal, the first terminal of the fifth switch is connected to the second voltage, and the second terminal of the fifth switch is connected to the second switch the control terminal of the third switch and the control terminal of the third switch, the control terminal of the fifth switch is connected to a second control signal; A sixth switch has a first end, a second end and a control end, the first end of the sixth switch is connected to the control end of the second switch, the control end of the third switch and the control end the second end of the fifth switch, the control end of the sixth switch is connected to a third control signal; A seventh switch has a first end, a second end and a control end, the first end of the seventh switch is connected to the second end of the sixth switch, and the control end of the seventh switch is connected to a fourth control signal; An eighth switch has a first end, a second end and a control end, the first end of the eighth switch is connected to the second end of the seventh switch, the second end of the eighth switch connected to the first control signal, the control terminal of the eighth switch is connected to the reference voltage; a second capacitor having a first end and a second end, the first end of the second capacitor is connected to the second end of the sixth switch and the first end of the seventh switch; A ninth switch has a first end, a second end and a control end, the first end of the ninth switch is connected to the second end of the second capacitor, the second end of the ninth switch connected to a data voltage, the control terminal of the ninth switch is connected to the fourth control signal; and A tenth switch has a first end, a second end and a control end, the first end of the tenth switch is connected to the second end of the second capacitor and the first end of the ninth switch , the second terminal of the tenth switch is connected to the first voltage, and the control terminal of the tenth switch is connected to the second control signal. 如請求項1所述之畫素驅動電路，其中該畫素驅動電路依序操作於一第一期間、一第二期間、一第三期間及一第四期間， 其中在該第一期間內，該第一開關、該第三開關、該第六開關及該第十開關處於一截止狀態，該第二開關、該第四開關、該第五開關、該第七開關、該第八開關及該第九開關處於一導通狀態， 其中在該第二期間內，該第一開關、該第三開關、該第六開關及該第十開關處於該截止狀態，該第二開關、該第四開關、該第五開關、該第七開關、該第八開關、該第九開關處於該導通狀態， 其中在該第三期間的一第一子期間內，該第一開關、該第三開關、該第五開關、該第六開關、該第七開關及該第九開關處於該截止狀態，該第二開關、該第四開關、該第八開關及該第十開關處於該導通狀態， 其中在該第三期間的一第二子期間，該第二開關、該第四開關、該第五開關、該第七開關及該第九開關處於該截止狀態，該第一開關、該第三開關、該第六開關、該第八開關及該第十開關處於該導通狀態， 其中在該第四期間，該第一開關、該第三開關、該第四開關、該第六開關、該第七開關、該第九開關及該第十開關處於該截止狀態，該第二開關、該第五開關及該第八開關處於該導通狀態。The pixel driving circuit of claim 1, wherein the pixel driving circuit operates in a first period, a second period, a third period and a fourth period in sequence, During the first period, the first switch, the third switch, the sixth switch and the tenth switch are in an off state, the second switch, the fourth switch, the fifth switch, the seventh switch The switch, the eighth switch and the ninth switch are in a conducting state, During the second period, the first switch, the third switch, the sixth switch and the tenth switch are in the off state, the second switch, the fourth switch, the fifth switch, the seventh switch The switch, the eighth switch, and the ninth switch are in the on state, In a first sub-period of the third period, the first switch, the third switch, the fifth switch, the sixth switch, the seventh switch and the ninth switch are in the off state, the first switch The second switch, the fourth switch, the eighth switch and the tenth switch are in the on state, Wherein in a second sub-period of the third period, the second switch, the fourth switch, the fifth switch, the seventh switch and the ninth switch are in the off state, the first switch, the third switch The switch, the sixth switch, the eighth switch and the tenth switch are in the on state, Wherein in the fourth period, the first switch, the third switch, the fourth switch, the sixth switch, the seventh switch, the ninth switch and the tenth switch are in the off state, the second switch , the fifth switch and the eighth switch are in the conducting state. 如請求項2所述之畫素驅動電路，其中該第三開關、該第五開關、該第七開關及該第九開關為P型電晶體，該第一開關、該第二開關、該第四開關、該第六開關、該第八開關及該第十開關為N型電晶體。The pixel driving circuit of claim 2, wherein the third switch, the fifth switch, the seventh switch and the ninth switch are P-type transistors, the first switch, the second switch, the first switch The fourth switch, the sixth switch, the eighth switch and the tenth switch are N-type transistors. 如請求項3所述之畫素驅動電路，其中該第一開關的臨界電壓匹配至該第四開關的臨界電壓，該第六開關的臨界電壓匹配至該第八開關的臨界電壓。The pixel driving circuit of claim 3, wherein the threshold voltage of the first switch matches the threshold voltage of the fourth switch, and the threshold voltage of the sixth switch matches the threshold voltage of the eighth switch. 如請求項3所述之畫素驅動電路，其中在該第一期間，該第一控制訊號、該第二控制訊號及該第四控制訊號為一第一低準位，該第三控制訊號為一第二低準位， 其中在該第二期間內，該第一控制訊號為一第一高準位，該第二控制訊號及該第四控制訊號為該第一低準位，該第三控制訊號為該第二低準位， 其中在該第三期間內，該第一控制訊號、該第二控制訊號及該第四控制訊號為該第一高準位，該第三控制訊號由該第二低準位逐漸地增加至一第二高準位， 其中在該第四期間內，該第一控制訊號及該第四控制訊號為該第一高準位，該第二控制訊號為該第一低準位，該第三控制訊號為該第二低準位。The pixel driving circuit of claim 3, wherein during the first period, the first control signal, the second control signal and the fourth control signal are at a first low level, and the third control signal is A second low level, During the second period, the first control signal is at a first high level, the second control signal and the fourth control signal are at the first low level, and the third control signal is at the second low level level, During the third period, the first control signal, the second control signal and the fourth control signal are at the first high level, and the third control signal gradually increases from the second low level to a The second highest level, During the fourth period, the first control signal and the fourth control signal are at the first high level, the second control signal is at the first low level, and the third control signal is at the second low level level. 如請求項5所述之畫素驅動電路，其中該第一操作電壓大於該第二操作電壓，該第一電壓小於該第二電壓。The pixel driving circuit of claim 5, wherein the first operating voltage is greater than the second operating voltage, and the first voltage is less than the second voltage. 如請求項1所述之畫素驅動電路，其中該發光單元為發光二極體。The pixel driving circuit according to claim 1, wherein the light-emitting unit is a light-emitting diode. 如請求項7所述之畫素驅動電路，其中該發光二極體的尺寸為次毫米。The pixel driving circuit of claim 7, wherein the size of the light-emitting diode is sub-millimeter. 如請求項1所述之畫素驅動電路，其中該畫素驅動電路設置於一顯示面板內。The pixel driving circuit according to claim 1, wherein the pixel driving circuit is arranged in a display panel. 如請求項1所述之畫素驅動電路，其中該畫素驅動電路設置於一背光模組內。The pixel driving circuit according to claim 1, wherein the pixel driving circuit is arranged in a backlight module.
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