TW202144874A - Display device - Google Patents
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- TW202144874A TW202144874A TW109116866A TW109116866A TW202144874A TW 202144874 A TW202144874 A TW 202144874A TW 109116866 A TW109116866 A TW 109116866A TW 109116866 A TW109116866 A TW 109116866A TW 202144874 A TW202144874 A TW 202144874A
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/302—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements characterised by the form or geometrical disposition of the individual elements
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Abstract
Description
本發明是有關於一種裝置,且特別是有關於一種顯示裝置。The present invention relates to a device, and more particularly, to a display device.
近年來,為了螢幕尺寸的最大化,窄邊框的顯示面板越來越廣泛的應用於各種裝置上。為了實現大尺寸顯示裝置,拼接多片顯示面板的概念與應用也逐漸浮現。然而,多片顯示面板拼接成一個大型顯示裝置時,顯示面板的邊框寬度往往導致顯示畫面在相鄰顯示面板之間的交界處出現不連續性。In recent years, in order to maximize the screen size, display panels with narrow bezels are more and more widely used in various devices. In order to realize large-size display devices, the concept and application of splicing multiple display panels are gradually emerging. However, when a plurality of display panels are spliced into a large-scale display device, the frame width of the display panels often causes discontinuities in the display images at the junctions between adjacent display panels.
陣列上閘極驅動(Gate-Driver-on-Array, GOA)電路是實現窄邊框的技術之一。但是,採用此技術時,與其搭配的訊號線不論是線寬或線距都無法縮減至太小,否則會有過熱與電阻電容延遲(RC delay)的問題。Gate-Driver-on-Array (GOA) circuit is one of the technologies to realize narrow border. However, when this technology is used, the line width or line spacing of the matched signal lines cannot be reduced to too small, otherwise there will be problems of overheating and RC delay.
本發明提供一種顯示裝置,可改善過熱與電阻電容延遲的問題而提升窄邊框的效果。The present invention provides a display device which can improve the effect of narrow frame by improving the problems of overheating and resistance-capacitance delay.
本發明的顯示裝置包括一基板、一畫素陣列、一第一驅動電路、一第二驅動電路、多條第一連接線、多條第二連接線以及多條訊號線。基板具有一正面、一背面與一側面。側面連接正面與背面。畫素陣列配置於基板的正面。第一驅動電路在基板的正面電性連接畫素陣列。第二驅動電路配置於基板的正面且電性連接畫素陣列。第一連接線配置於基板的側面且電性連接第一驅動電路。第二連接線配置於基板的側面且電性連接第二驅動電路。訊號線配置於基板的背面。各訊號線的兩端分別連接第一連接線中對應的一條以及第二連接線中對應的一條。The display device of the present invention includes a substrate, a pixel array, a first driving circuit, a second driving circuit, a plurality of first connection lines, a plurality of second connection lines and a plurality of signal lines. The substrate has a front surface, a back surface and a side surface. The sides connect the front and the back. The pixel array is arranged on the front surface of the substrate. The first driving circuit is electrically connected to the pixel array on the front surface of the substrate. The second driving circuit is disposed on the front surface of the substrate and is electrically connected to the pixel array. The first connecting line is disposed on the side surface of the substrate and is electrically connected to the first driving circuit. The second connecting line is disposed on the side surface of the substrate and is electrically connected to the second driving circuit. The signal lines are arranged on the backside of the substrate. Two ends of each signal line are respectively connected to a corresponding one of the first connecting lines and a corresponding one of the second connecting lines.
在本發明的一實施例中,第二驅動電路是閘極驅動電路。In an embodiment of the present invention, the second driving circuit is a gate driving circuit.
在本發明的一實施例中,第二驅動電路包括多個閘極驅動子電路。每一個閘極驅動子電路用以產生一閘極驅動訊號。每一個閘極驅動子電路包含一上拉控制電路、一上拉電路、一下拉控制電路以及一下拉電路。上拉控制電路用以接收一起始訊號。上拉電路耦接上拉控制電路的輸出端,用以產生閘極驅動訊號。下拉控制電路耦接上拉控制電路的輸出端。下拉電路耦接下拉控制電路的輸出端,並耦接上拉電路的輸入端。In an embodiment of the present invention, the second driving circuit includes a plurality of gate driving sub-circuits. Each gate driving sub-circuit is used for generating a gate driving signal. Each gate driver sub-circuit includes a pull-up control circuit, a pull-up circuit, a pull-down control circuit and a pull-down circuit. The pull-up control circuit is used for receiving a start signal. The pull-up circuit is coupled to the output end of the pull-up control circuit for generating a gate driving signal. The pull-down control circuit is coupled to the output end of the pull-up control circuit. The pull-down circuit is coupled to the output end of the pull-down control circuit, and is coupled to the input end of the pull-up circuit.
在本發明的一實施例中,下拉控制電路更用以接收一低頻訊號,上拉電路更用以接收一高頻訊號。In an embodiment of the present invention, the pull-down control circuit is further used for receiving a low frequency signal, and the pull-up circuit is further used for receiving a high frequency signal.
在本發明的一實施例中,第一驅動電路包括一源極驅動電路與一時序控制電路。In an embodiment of the present invention, the first driving circuit includes a source driving circuit and a timing control circuit.
在本發明的一實施例中,源極驅動電路是薄膜上晶片。In one embodiment of the present invention, the source driver circuit is a chip-on-film.
在本發明的一實施例中,第一驅動電路包括多個第一接墊,配置於基板的正面的邊緣。第一連接線連接第一接墊。In an embodiment of the present invention, the first driving circuit includes a plurality of first pads disposed on the edge of the front surface of the substrate. The first connection line is connected to the first pad.
在本發明的一實施例中,第二驅動電路包括多個第二接墊,配置於基板的正面的邊緣。第二連接線連接第二接墊。In an embodiment of the present invention, the second driving circuit includes a plurality of second pads disposed on the edge of the front surface of the substrate. The second connection line is connected to the second pad.
在本發明的一實施例中,訊號線包括高頻訊號線、低頻訊號線與接地線。In an embodiment of the present invention, the signal line includes a high-frequency signal line, a low-frequency signal line, and a ground line.
在本發明的一實施例中,訊號線更包括共用訊號線。In an embodiment of the present invention, the signal line further includes a common signal line.
在本發明的一實施例中,顯示裝置更包括一黑矩陣,配置於基板的正面。黑矩陣在正面的正投影覆蓋訊號線在正面的正投影。In an embodiment of the present invention, the display device further includes a black matrix disposed on the front surface of the substrate. The orthographic projection of the black matrix on the front covers the orthographic projection of the signal lines on the front.
在本發明的一實施例中,畫素陣列在正面的正投影與訊號線在正面的正投影至少部分重疊。In an embodiment of the present invention, the orthographic projection of the pixel array on the front side and the front side projection of the signal line at least partially overlap.
基於上述,在本發明的顯示裝置中,因為訊號線配置於基板的背面,可進一步提升窄邊框的效果之外,還可提升顯示效能。Based on the above, in the display device of the present invention, since the signal lines are arranged on the backside of the substrate, the effect of the narrow frame can be further improved, and the display performance can also be improved.
圖1是依照本發明的一實施例的顯示裝置的示意圖。圖2是圖1的顯示裝置的後視示意圖。請參照圖1與圖2,本實施例的顯示裝置100包括一基板110、一畫素陣列120、一第一驅動電路130、一第二驅動電路140、多條第一連接線150、多條第二連接線160以及多條訊號線170。基板110具有一正面112、一背面114與一側面116。換言之,正面112與背面114是基板110的相對的兩個主表面,此外,環繞整個基板的外圍的表面在此統稱為側面116,因此側面116可以是一個曲面或是由多個平面及/或曲面構成。畫素陣列120配置於基板110的正面112。第一驅動電路130在基板110的正面112電性連接畫素陣列120。換言之,第一驅動電路130與畫素陣列120的連接點是位於基板110的正面112上。第二驅動電路130配置於基板110的正面112且電性連接畫素陣列120。訊號線170配置於基板110的背面114。FIG. 1 is a schematic diagram of a display device according to an embodiment of the present invention. FIG. 2 is a schematic rear view of the display device of FIG. 1 . 1 and FIG. 2 , the
圖3是圖1的顯示裝置在第一連接線的位置的剖面示意圖。請參照圖1與圖3,側面116連接正面112與背面114。第一連接線150配置於基板110的側面116且電性連接第一驅動電路130。第二連接線160配置於基板110的側面116且電性連接第二驅動電路140。如圖3所示,在本實施例中,第一驅動電路130例如延伸至基板110的正面112的邊緣,而第一連接線150配置於基板110的側面116且延伸至第一驅動電路130處並與其接觸。在其他實施例中,第一連接線150也可從基板110的側面116延伸至基板110的正面112,進而覆蓋第一驅動電路130延伸至基板110的正面112的邊緣的部分。本發明並不對第一連接線150與第一驅動電路130的接觸方式作限制,只要位於基板110的正面112的第一驅動電路130與位於基板110的側面116的第一連接線150可互相接觸即可。雖然在此並未以圖示說明第二連接線160與第二驅動電路140的接觸方式,但其接觸方式可比照第一連接線150與第一驅動電路130的接觸方式。FIG. 3 is a schematic cross-sectional view of the display device of FIG. 1 at the position of the first connection line. Please refer to FIG. 1 and FIG. 3 , the
請參照圖2與圖3,各訊號線170的兩端分別連接一條對應的第一連接線150以及一條對應的第二連接線160。在此所述的訊號線170並不侷限為只有兩端的單條線,也可以是具有至少兩端的任何其他型態的訊號線170。如圖3所示,在本實施例中,訊號線170例如延伸至基板110的背面114的邊緣,而第一連接線150配置於基板110的側面116且延伸至訊號線170處並與其接觸。在其他實施例中,第一連接線150也可從基板110的側面116延伸至基板110的背面114,進而覆蓋訊號線170延伸至基板110的背面114的邊緣的部分。本發明並不對第一連接線150與訊號線170的接觸方式作限制,只要位於基板110的背面114的訊號線170與位於基板110的側面116的第一連接線150可互相接觸即可。雖然在此並未以圖示說明第二連接線160與訊號線170的接觸方式,但其接觸方式可比照第一連接線150與訊號線170的接觸方式。Referring to FIG. 2 and FIG. 3 , two ends of each
在本實施例的顯示裝置100中,訊號線170被配置於基板110的背面114,並利用位於基板110的側面116的第一連接線150與第二連接線160來連接第一驅動電路130與第二驅動電路140。因此,在基板110的正面112不需要保留用於布置訊號線170的面積,可達到更佳的窄邊框的效果。並且,在基板110的背面114有更大的面積可以供訊號線170佈線,訊號線170的線寬與線距都可以加大,因此可大幅改善熱集中與電阻電容延遲的現象。In the
此外,在本實施例中,基板110的背面114可僅形成訊號線170所需的介電層與導體層,製程相對簡單。另一方面,製程較為複雜的第二驅動電路140雖然形成在基板110的正面112,但基板110的正面112上原本就需要形成製程複雜的畫素陣列120,所以整體而言也不會增加製程的複雜度。In addition, in this embodiment, only the dielectric layer and the conductor layer required for the
請再參照圖1,在本實施例中,第一驅動電路130包括一源極驅動電路132與一時序控制電路134。源極驅動電路132電性連接畫素陣列120,用以提供畫素陣列120顯示所需的影像訊號。此外,時序控制電路134電性連接源極驅動電路132,以控制源極驅動電路132的驅動時序。在本實施例中,源極驅動電路132是薄膜上晶片(Chip on Film, COF),而時序控制電路134例如是設置在一印刷電路板136上,但本發明不侷限於此。源極驅動電路132例如是通過軟性電路板132A而在基板110的正面112電性連接畫素陣列120,且源極驅動電路132也通過軟性電路板132A與印刷電路板136而電性連接時序控制電路134。另外,第一驅動電路130例如還包括第三連接線138,配置於基板110的正面112。第一連接線150依序通過第三連接線138、軟性電路板132A與印刷電路板136而電性連接時序控制電路134。Referring to FIG. 1 again, in this embodiment, the
在未繪示的實施例中,源極驅動電路也可以是玻璃上晶片(Chip on Film, COF),但本發明不侷限於此。此時,晶片形式的源極驅動電路在基板的正面電性連接畫素陣列與軟性電路板,並通過軟性電路板而電性連接時序控制電路。In the embodiment not shown, the source driver circuit may also be a chip on film (COF), but the present invention is not limited thereto. At this time, the source driver circuit in the form of a chip is electrically connected to the pixel array and the flexible circuit board on the front surface of the substrate, and is electrically connected to the timing control circuit through the flexible circuit board.
請再參照圖1,本實施例的第一驅動電路130可包括多個第一接墊P10,配置於基板110的正面112的邊緣。第一連接線150連接第一接墊P10。本實施例的第二驅動電路140包括多個第二接墊P20,配置於基板110的正面112的邊緣。第二連接線160連接第二接墊P20。舉例來說,第一接墊P10是位於圖1中的基板110的正面112的上側的邊緣,而第二接墊P20是位於圖1中的基板110的正面112的左右兩側的邊緣,但本發明不侷限於此。雖然在此是以接墊命名第一驅動電路130與第二驅動電路140用於連接第一連接線150與第二連接線160的部分,但並不表示第一接墊P10與第二接墊P20在結構、尺寸、形狀或其他方面必須與鄰近部分有差異,也可僅是指用於連接第一連接線150與第二連接線160的區域。Referring to FIG. 1 again, the
請再參照圖2,本實施例的訊號線170可包括高頻訊號線172、低頻訊號線174與接地線176,但本發明不侷限於此。Referring to FIG. 2 again, the
圖4是圖1的顯示裝置的第二驅動電路的方塊圖。請參照圖1與圖4,本實施例的第二驅動電路140例如是閘極驅動電路。本實施例的第二驅動電路140例如包括多個閘極驅動子電路140A。每一個閘極驅動子電路140A用以產生一閘極驅動訊號S12。每一個閘極驅動子電路140A包含一上拉控制電路142、一上拉電路144、一下拉控制電路146以及一下拉電路148,但本發明不侷限於此。上拉控制電路142用以接收一起始訊號ST。上拉電路144耦接上拉控制電路142的輸出端,用以產生閘極驅動訊號S12。下拉控制電路146耦接上拉控制電路142的輸出端。下拉電路148耦接下拉控制電路146的輸出端,並耦接上拉電路144的輸入端。FIG. 4 is a block diagram of a second driving circuit of the display device of FIG. 1 . Referring to FIG. 1 and FIG. 4 , the
圖5是依照本發明的另一實施例的顯示裝置的第二驅動電路的方塊圖。請參照圖5,本實施例與圖4的實施例相似,在此僅說明兩者的差異處,其餘相似處在此不再贅述。在本實施例中,下拉控制電路146更用以接收一低頻訊號LC,上拉電路144更用以接收一高頻訊號HC。5 is a block diagram of a second driving circuit of a display device according to another embodiment of the present invention. Please refer to FIG. 5 , this embodiment is similar to the embodiment of FIG. 4 , only the differences between the two are described here, and the remaining similarities are not repeated here. In this embodiment, the pull-
圖6是依照本發明的再一實施例的顯示裝置的後視示意圖。請參照圖6,本實施例與圖2的實施例相似,在此僅說明兩者的差異處,其餘相似處在此不再贅述。在本實施例中,訊號線270更包括共用訊號線272。因此,在基板110的正面112不需要保留用於布置共用訊號線272的面積,可達到更佳的窄邊框的效果。FIG. 6 is a schematic rear view of a display device according to still another embodiment of the present invention. Please refer to FIG. 6 , this embodiment is similar to the embodiment of FIG. 2 , only the differences between the two are described here, and the other similarities are not repeated here. In this embodiment, the
圖7是依照本發明的又一實施例的顯示裝置的局部前視示意圖。在此說明的技術方案可應用於前面各實施例及其他符合本發明的實施例中,以下以應用於圖1的實施例做說明。請參照圖1與圖7,顯示裝置100更包括一黑矩陣180,配置於基板110的正面112。在圖1中為了能清楚顯示本實施例的其餘元件,故未繪示黑矩陣180。圖7中也省略繪示部分元件,而圖7中雖然繪示了訊號線170,但僅用於表示訊號線170的相對位置,並非訊號線170位於基板110的正面112上。黑矩陣180在正面112的正投影覆蓋訊號線170在正面112的正投影。換言之,從基板110的正面112觀看時,基本上並不會看到訊號線170,因為被黑矩陣180遮蔽了。以此設計,可避免訊號線170造成顯示裝置100的開口率的下降。在本實施例中,顯示裝置100可以是液晶顯示裝置,但本發明的顯示裝置也可以是發光二極體陣列顯示裝置或其他顯示裝置。此外,在本實施例中,畫素陣列120在正面112的正投影與訊號線170在正面112的正投影至少部分重疊。在部分型態的顯示裝置中,可能未設置或不需要設置黑矩陣180,但畫素陣列120在正面112的正投影與訊號線170在正面112的正投影至少部分重疊,因此訊號線170具有較大的佈線空間,有助於改善熱集中與電阻電容延遲的現象。FIG. 7 is a schematic partial front view of a display device according to still another embodiment of the present invention. The technical solutions described here can be applied to the foregoing embodiments and other embodiments consistent with the present invention, and the following description is made by applying to the embodiment of FIG. 1 . Referring to FIG. 1 and FIG. 7 , the
綜上所述,在本發明的顯示裝置中,將訊號線移至基板的背面而有助於更進一步地達成窄邊框的目的。同時,因為訊號線在基板的背面有較大的佈線空間,所以有助於改善熱集中與電阻電容延遲的現象而可提升顯示效能。To sum up, in the display device of the present invention, moving the signal lines to the back of the substrate helps to further achieve the goal of narrowing the frame. At the same time, because the signal line has a larger wiring space on the back side of the substrate, it is helpful to improve the phenomenon of heat concentration and resistance-capacitance delay, thereby improving the display performance.
100:顯示裝置
110:基板
112:正面
114:背面
116:側面
120:畫素陣列
130:第一驅動電路
132:源極驅動電路
132A:軟性電路板
134:時序控制電路
136:印刷電路板
138:第三連接線
140:第二驅動電路
140A:閘極驅動子電路
142:上拉控制電路
144:上拉電路
146:下拉控制電路
148:下拉電路
150:第一連接線
160:第二連接線
170、270:訊號線
172:高頻訊號線
174:低頻訊號線
176:接地線
180:黑矩陣
272:共用訊號線
P10:第一接墊
P20:第二接墊
S12:閘極驅動訊號
ST:起始訊號
LC:低頻訊號
HC:高頻訊號100: Display device
110: Substrate
112: front
114: Back
116: Side
120: pixel array
130: The first drive circuit
132: source drive
圖1是依照本發明的一實施例的顯示裝置的前視示意圖。 圖2是圖1的顯示裝置的後視示意圖。 圖3是圖1的顯示裝置在第一連接線的位置的剖面示意圖。 圖4是圖1的顯示裝置的第二驅動電路的方塊圖。 圖5是依照本發明的另一實施例的顯示裝置的第二驅動電路的方塊圖。 圖6是依照本發明的再一實施例的顯示裝置的後視示意圖。 圖7是依照本發明的又一實施例的顯示裝置的局部前視示意圖。FIG. 1 is a schematic front view of a display device according to an embodiment of the present invention. FIG. 2 is a schematic rear view of the display device of FIG. 1 . FIG. 3 is a schematic cross-sectional view of the display device of FIG. 1 at the position of the first connection line. FIG. 4 is a block diagram of a second driving circuit of the display device of FIG. 1 . 5 is a block diagram of a second driving circuit of a display device according to another embodiment of the present invention. FIG. 6 is a schematic rear view of a display device according to still another embodiment of the present invention. FIG. 7 is a schematic partial front view of a display device according to still another embodiment of the present invention.
100:顯示裝置100: Display device
110:基板110: Substrate
112:正面112: front
116:側面116: Side
120:畫素陣列120: pixel array
130:第一驅動電路130: The first drive circuit
132:源極驅動電路132: source drive circuit
132A:軟性電路板132A: Flexible circuit board
134:時序控制電路134: Timing Control Circuit
136:印刷電路板136: Printed Circuit Board
138:第三連接線138: The third connecting line
140:第二驅動電路140: The second drive circuit
140A:閘極驅動子電路140A: Gate driver sub-circuit
150:第一連接線150: The first connecting line
160:第二連接線160: The second connecting line
P10:第一接墊P10: The first pad
P20:第二接墊P20: Second pad
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JPH10104651A (en) * | 1996-09-27 | 1998-04-24 | Toshiba Corp | Display device |
JP2000098417A (en) * | 1998-09-28 | 2000-04-07 | Sony Corp | Liquid crystal display device |
US7639226B2 (en) * | 2004-05-31 | 2009-12-29 | Lg Display Co., Ltd. | Liquid crystal display panel with built-in driving circuit |
CN103217845B (en) * | 2013-04-22 | 2015-07-15 | 京东方科技集团股份有限公司 | Lower substrate, manufacturing method thereof, liquid crystal display panel and liquid crystal displayer |
TWI527019B (en) * | 2014-06-25 | 2016-03-21 | 友達光電股份有限公司 | Timing signal generation circuit and precharging/discharging method thereof |
CN104992956B (en) * | 2015-05-15 | 2018-11-09 | 深圳市华星光电技术有限公司 | Frame-free displaying device and preparation method thereof |
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