TWI742681B - Display device - Google Patents

Abstract

A display device including a substrate, a pixel array, a first driving circuit, a second driving circuit, first connecting lines, second connecting lines, and signal lines is provided. The substrate has a front surface, a back surface and a side surface connected between the front surface and the back surface. The pixel array is disposed on the front surface of the substrate. The first driving circuit is electrically connected to the pixel array on the front surface of the substrate. The second driving circuit is disposed on the front surface of the substrate and electrically connected to the pixel array. The first connecting lines are disposed on the side surface of the substrate and electrically connected to the first driving circuit. The second connecting lines are disposed on the side surface of the substrate and electrically connected to the second driving circuit. Two ends of the signal lines are connected to a corresponding one of the first connecting lines and a corresponding one of the second connecting lines.

Description

Display device

The present invention relates to a device, and particularly relates to a display device.

In recent years, in order to maximize the screen size, display panels with narrow bezels have become more and more widely used in various devices. In order to realize large-size display devices, the concept and application of splicing multiple display panels has gradually emerged. However, when multiple display panels are spliced into a large display device, the width of the frame of the display panel often causes discontinuities in the display image at the junction between adjacent display panels.

Gate-Driver-on-Array (GOA) circuit is one of the technologies to realize narrow frame. However, when using this technology, no matter the line width or line spacing of the signal line matched with it can not be reduced too small, otherwise there will be problems of overheating and resistance capacitance delay (RC delay).

The present invention provides a display device, which can improve the problems of overheating and delay of resistance and capacitance, and enhance the effect of narrow frame.

The display device of the present invention includes a substrate, a pixel array, a first driving circuit, a second driving circuit, a plurality of first connection lines, a plurality of second connection lines, and a plurality of signal lines. The substrate has a front surface, a back surface and a side surface. The side connects the front and back. The pixel array is arranged on the front surface of the substrate. The first driving circuit is electrically connected to the pixel array on the front surface of the substrate. The second driving circuit is disposed on the front surface of the substrate and is electrically connected to the pixel array. The first connection line is disposed on the side surface of the substrate and is electrically connected to the first driving circuit. The second connection line is arranged on the side surface of the substrate and is electrically connected to the second driving circuit. The signal line is arranged on the back of the substrate. The two ends of each signal line are respectively connected to a corresponding one of the first connecting lines and a corresponding one of the second connecting lines.

In an embodiment of the present invention, the second driving circuit is a gate driving circuit.

In an embodiment of the present invention, the second driving circuit includes a plurality of gate driving sub-circuits. Each gate drive sub-circuit is used to generate a gate drive signal. Each gate drive sub-circuit includes a pull-up control circuit, a pull-up circuit, a pull-down control circuit, and a pull-down circuit. The pull-up control circuit is used for receiving an initial signal. The pull-up circuit is coupled to the output terminal of the pull-up control circuit for generating gate drive signals. The pull-down control circuit is coupled to the output terminal of the pull-up control circuit. The pull-down circuit is coupled to the output terminal of the pull-down control circuit and is coupled to the input terminal of the pull-up circuit.

In an embodiment of the present invention, the pull-down control circuit is further used to receive a low-frequency signal, and the pull-up circuit is further used to receive a high-frequency signal.

In an embodiment of the present invention, the first driving circuit includes a source driving circuit and a timing control circuit.

In an embodiment of the present invention, the source driving circuit is a wafer-on-film.

In an embodiment of the present invention, the first driving circuit includes a plurality of first pads, which are disposed on the edge of the front surface of the substrate. The first connection line is connected to the first pad.

In an embodiment of the present invention, the second driving circuit includes a plurality of second pads disposed on the edge of the front surface of the substrate. The second connection line is connected to the second pad.

In an embodiment of the present invention, the signal line includes a high frequency signal line, a low frequency signal line and a ground line.

In an embodiment of the present invention, the signal line further includes a shared signal line.

In an embodiment of the present invention, the display device further includes a black matrix disposed on the front surface of the substrate. The orthographic projection of the black matrix on the front covers the orthographic projection of the signal line on the front.

In an embodiment of the present invention, the orthographic projection of the pixel array on the front and the orthographic projection of the signal line on the front at least partially overlap.

Based on the above, in the display device of the present invention, because the signal lines are arranged on the back of the substrate, in addition to the effect of the narrow frame, the display performance can be improved.

FIG. 1 is a schematic diagram of a display device according to an embodiment of the invention. FIG. 2 is a schematic rear view of the display device of FIG. 1. FIG. 1 and 2, the display device 100 of this embodiment includes a substrate 110, a pixel array 120, a first driving circuit 130, a second driving circuit 140, a plurality of first connecting lines 150, and a plurality of The second connection line 160 and a plurality of signal lines 170. The substrate 110 has a front surface 112, a back surface 114, and a side surface 116. In other words, the front surface 112 and the back surface 114 are two opposite main surfaces of the substrate 110. In addition, the surfaces surrounding the entire periphery of the substrate are collectively referred to herein as the side surfaces 116. Therefore, the side surfaces 116 may be a curved surface or consist of multiple flat surfaces and/or Surface composition. The pixel array 120 is disposed on the front surface 112 of the substrate 110. The first driving circuit 130 is electrically connected to the pixel array 120 on the front surface 112 of the substrate 110. In other words, the connection point between the first driving circuit 130 and the pixel array 120 is located on the front surface 112 of the substrate 110. The second driving circuit 130 is disposed on the front surface 112 of the substrate 110 and is electrically connected to the pixel array 120. The signal line 170 is disposed on the back side 114 of the substrate 110.

3 is a schematic cross-sectional view of the display device of FIG. 1 at the position of the first connecting line. 1 and 3, the side surface 116 connects the front surface 112 and the back surface 114. The first connection line 150 is disposed on the side surface 116 of the substrate 110 and is electrically connected to the first driving circuit 130. The second connecting wire 160 is disposed on the side surface 116 of the substrate 110 and is electrically connected to the second driving circuit 140. As shown in FIG. 3, in this embodiment, the first driving circuit 130 extends, for example, to the edge of the front surface 112 of the substrate 110, and the first connecting line 150 is disposed on the side surface 116 of the substrate 110 and extends to the first driving circuit 130. And get in touch with it. In other embodiments, the first connection line 150 may also extend from the side 116 of the substrate 110 to the front 112 of the substrate 110 to cover the portion of the first driving circuit 130 extending to the edge of the front 112 of the substrate 110. The present invention does not limit the contact manner between the first connecting line 150 and the first driving circuit 130, as long as the first driving circuit 130 located on the front surface 112 of the substrate 110 and the first connecting line 150 located on the side 116 of the substrate 110 can be in contact with each other That's it. Although the contact method of the second connecting line 160 and the second driving circuit 140 is not illustrated here, the contact method may be similar to the contact method of the first connecting line 150 and the first driving circuit 130.

2 and 3, both ends of each signal line 170 are respectively connected to a corresponding first connection line 150 and a corresponding second connection line 160. The signal line 170 described here is not limited to a single line with only two ends, and can also be any other type of signal line 170 having at least two ends. As shown in FIG. 3, in this embodiment, the signal line 170 extends to the edge of the back 114 of the substrate 110, and the first connection line 150 is disposed on the side surface 116 of the substrate 110 and extends to and contacts the signal line 170. In other embodiments, the first connection line 150 may also extend from the side 116 of the substrate 110 to the back 114 of the substrate 110 to cover the portion of the signal line 170 extending to the edge of the back 114 of the substrate 110. The present invention does not limit the contact manner of the first connection line 150 and the signal line 170, as long as the signal line 170 on the back 114 of the substrate 110 and the first connection line 150 on the side 116 of the substrate 110 can be in contact with each other. Although the contact method of the second connecting line 160 and the signal line 170 is not illustrated here, the contact method can be compared with the contact method of the first connecting line 150 and the signal line 170.

In the display device 100 of this embodiment, the signal line 170 is arranged on the back 114 of the substrate 110, and the first connecting line 150 and the second connecting line 160 on the side 116 of the substrate 110 are used to connect the first driving circuit 130 and The second driving circuit 140. Therefore, there is no need to reserve an area for arranging the signal line 170 on the front surface 112 of the substrate 110, and a better narrow frame effect can be achieved. In addition, there is a larger area on the back side 114 of the substrate 110 for the wiring of the signal line 170, and the line width and line spacing of the signal line 170 can be increased, so the phenomenon of heat concentration and resistance and capacitance delay can be greatly improved.

In addition, in this embodiment, only the dielectric layer and the conductor layer required by the signal line 170 can be formed on the back side 114 of the substrate 110, and the manufacturing process is relatively simple. On the other hand, although the second driving circuit 140 with a more complicated manufacturing process is formed on the front surface 112 of the substrate 110, a pixel array 120 with a complicated manufacturing process is originally required to be formed on the front surface 112 of the substrate 110, so the overall manufacturing process will not be increased. Complexity.

Please refer to FIG. 1 again. In this embodiment, the first driving circuit 130 includes a source driving circuit 132 and a timing control circuit 134. The source driving circuit 132 is electrically connected to the pixel array 120 to provide image signals required for the pixel array 120 to display. In addition, the timing control circuit 134 is electrically connected to the source driving circuit 132 to control the driving timing of the source driving circuit 132. In this embodiment, the source driving circuit 132 is a chip on film (COF), and the timing control circuit 134 is, for example, provided on a printed circuit board 136, but the invention is not limited to this. For example, the source driving circuit 132 is electrically connected to the pixel array 120 on the front surface 112 of the substrate 110 through the flexible circuit board 132A, and the source driving circuit 132 is also electrically connected to the printed circuit board 136 through the flexible circuit board 132A for timing control. Circuit 134. In addition, the first driving circuit 130 further includes, for example, a third connecting line 138, which is disposed on the front surface 112 of the substrate 110. The first connection line 150 is electrically connected to the timing control circuit 134 through the third connection line 138, the flexible circuit board 132A, and the printed circuit board 136 in sequence.

In an embodiment not shown, the source driving circuit may also be a chip on film (COF), but the present invention is not limited to this. At this time, the source drive circuit in the form of a chip is electrically connected to the pixel array and the flexible circuit board on the front surface of the substrate, and is electrically connected to the timing control circuit through the flexible circuit board.

Please refer to FIG. 1 again. The first driving circuit 130 of this embodiment may include a plurality of first pads P10 disposed on the edge of the front surface 112 of the substrate 110. The first connection line 150 is connected to the first pad P10. The second driving circuit 140 of this embodiment includes a plurality of second pads P20, which are disposed on the edge of the front surface 112 of the substrate 110. The second connection line 160 is connected to the second pad P20. For example, the first pad P10 is the edge on the upper side of the front surface 112 of the substrate 110 in FIG. 1, and the second pad P20 is the edge on the left and right sides of the front surface 112 of the substrate 110 in FIG. 1, but The present invention is not limited to this. Although the pads are used to name the first driving circuit 130 and the second driving circuit 140 for connecting the first connecting line 150 and the second connecting line 160, it does not mean the first pad P10 and the second pad. The P20 must be different from the adjacent part in terms of structure, size, shape or other aspects, and it may only refer to the area used to connect the first connecting line 150 and the second connecting line 160.

2 again, the signal line 170 of this embodiment may include a high-frequency signal line 172, a low-frequency signal line 174, and a ground line 176, but the present invention is not limited thereto.

FIG. 4 is a block diagram of a second driving circuit of the display device of FIG. 1. FIG. 1 and 4, the second driving circuit 140 of this embodiment is, for example, a gate driving circuit. The second driving circuit 140 of this embodiment includes, for example, a plurality of gate driving sub-circuits 140A. Each gate driving sub-circuit 140A is used to generate a gate driving signal S12. Each gate driving sub-circuit 140A includes a pull-up control circuit 142, a pull-up circuit 144, a pull-down control circuit 146, and a pull-down circuit 148, but the present invention is not limited thereto. The pull-up control circuit 142 is used for receiving a start signal ST. The pull-up circuit 144 is coupled to the output terminal of the pull-up control circuit 142 for generating the gate driving signal S12. The pull-down control circuit 146 is coupled to the output terminal of the pull-up control circuit 142. The pull-down circuit 148 is coupled to the output terminal of the pull-down control circuit 146 and coupled to the input terminal of the pull-up circuit 144.

FIG. 5 is a block diagram of a second driving circuit of a display device according to another embodiment of the invention. Please refer to FIG. 5, this embodiment is similar to the embodiment in FIG. In this embodiment, the pull-down control circuit 146 is further used to receive a low-frequency signal LC, and the pull-up circuit 144 is further used to receive a high-frequency signal HC.

FIG. 6 is a schematic rear view of a display device according to still another embodiment of the present invention. Please refer to FIG. 6, this embodiment is similar to the embodiment in FIG. In this embodiment, the signal line 270 further includes a common signal line 272. Therefore, there is no need to reserve an area for arranging the common signal line 272 on the front surface 112 of the substrate 110, and a better narrow frame effect can be achieved.

FIG. 7 is a schematic partial front view of a display device according to another embodiment of the present invention. The technical solution described here can be applied to the previous embodiments and other embodiments in accordance with the present invention. The following description is based on the embodiment shown in FIG. 1. 1 and FIG. 7, the display device 100 further includes a black matrix 180 disposed on the front surface 112 of the substrate 110. In order to clearly show the remaining components of this embodiment in FIG. 1, the black matrix 180 is not shown. Some components are also omitted in FIG. 7, and although the signal line 170 is shown in FIG. 7, it is only used to indicate the relative position of the signal line 170, and the signal line 170 is not located on the front surface 112 of the substrate 110. The orthographic projection of the black matrix 180 on the front surface 112 covers the orthographic projection of the signal line 170 on the front surface 112. In other words, when viewed from the front surface 112 of the substrate 110, the signal line 170 is basically not seen because it is shielded by the black matrix 180. With this design, it is possible to prevent the signal line 170 from causing a decrease in the aperture ratio of the display device 100. In this embodiment, the display device 100 may be a liquid crystal display device, but the display device of the present invention may also be a light emitting diode array display device or other display devices. In addition, in this embodiment, the orthographic projection of the pixel array 120 on the front side 112 and the orthographic projection of the signal line 170 on the front side 112 at least partially overlap. In some types of display devices, the black matrix 180 may not be provided or need not be provided, but the orthographic projection of the pixel array 120 on the front 112 and the orthographic projection of the signal line 170 on the front 112 at least partially overlap, so the signal line 170 has Larger wiring space helps to improve the phenomenon of heat concentration and resistance and capacitance delay.

In summary, in the display device of the present invention, moving the signal line to the backside of the substrate helps to further achieve the goal of a narrow frame. At the same time, because the signal line has a larger wiring space on the back of the substrate, it helps to improve the phenomenon of heat concentration and resistance and capacitance delay, and can improve the display performance.

100: display device 110: substrate 112: positive 114: back 116: side 120: pixel array 130: The first drive circuit 132: Source drive circuit 132A: Flexible circuit board 134: timing control circuit 136: Printed Circuit Board 138: Third connection line 140: second drive circuit 140A: Gate driver sub-circuit 142: Pull-up control circuit 144: pull-up circuit 146: pull-down control circuit 148: pull-down circuit 150: The first connection line 160: second connecting line 170, 270: signal line 172: high frequency signal line 174: low frequency signal line 176: Ground Wire 180: black matrix 272: Shared signal line P10: The first pad P20: The second pad S12: Gate drive signal ST: Start signal LC: low frequency signal HC: High frequency signal

FIG. 1 is a schematic front view of a display device according to an embodiment of the invention. FIG. 2 is a schematic rear view of the display device of FIG. 1. FIG. 3 is a schematic cross-sectional view of the display device of FIG. 1 at the position of the first connecting line. FIG. 4 is a block diagram of a second driving circuit of the display device of FIG. 1. FIG. FIG. 5 is a block diagram of a second driving circuit of a display device according to another embodiment of the invention. FIG. 6 is a schematic rear view of a display device according to still another embodiment of the present invention. FIG. 7 is a schematic partial front view of a display device according to another embodiment of the present invention.

100: display device

110: substrate

112: positive

116: side

120: pixel array

130: The first drive circuit

132: Source drive circuit

132A: Flexible circuit board

134: timing control circuit

136: Printed Circuit Board

138: Third connection line

140: second drive circuit

140A: Gate driver sub-circuit

150: The first connection line

160: second connecting line

P10: The first pad

P20: The second pad

Claims (12)

A display device includes: a substrate having a front surface, a back surface, and a side surface, wherein the side surface connects the front surface and the back surface; a pixel array disposed on the front surface of the substrate; and a first driving circuit on the substrate The front surface of the substrate is electrically connected to the pixel array; a second driving circuit is disposed on the front surface of the substrate and is electrically connected to the pixel array; a plurality of first connection lines are disposed on the side surface of the substrate and are electrically connected Are electrically connected to the first driving circuit; a plurality of second connecting lines are arranged on the side surface of the substrate and electrically connected to the second driving circuit; and a plurality of signal lines are arranged on the back of the substrate, each of the signal lines The two ends of are respectively connected to the corresponding one of the first connecting lines and the corresponding one of the second connecting lines. The display device according to claim 1, wherein the second driving circuit is a gate driving circuit. The display device according to claim 2, wherein the second driving circuit includes a plurality of gate driving sub-circuits, each of the gate driving sub-circuits is used to generate a gate driving signal, and each of the gate driving sub-circuits Including: a pull-up control circuit for receiving an initial signal; a pull-up circuit coupled to the output terminal of the pull-up control circuit for generating the gate A pole drive signal; a pull-down control circuit coupled to the output terminal of the pull-up control circuit; and a pull-down circuit coupled to the output terminal of the pull-down control circuit and coupled to the input terminal of the pull-up circuit. The display device according to claim 3, wherein the pull-down control circuit is further used for receiving a low-frequency signal, and the pull-up circuit is further used for receiving a high-frequency signal. The display device according to claim 1, wherein the first driving circuit includes a source driving circuit and a timing control circuit. The display device according to claim 5, wherein the source driving circuit is a wafer-on-film. The display device according to claim 1, wherein the first driving circuit includes a plurality of first pads disposed on the edge of the front surface of the substrate, and the first connecting lines are connected to the first pads. The display device according to claim 1, wherein the second driving circuit includes a plurality of second pads disposed on the edge of the front surface of the substrate, and the second connecting lines are connected to the second pads. The display device according to claim 1, wherein the signal lines include a high-frequency signal line, a low-frequency signal line, and a ground line. The display device according to claim 9, wherein the signal lines further include a common signal line. The display device according to claim 1, further comprising a black matrix disposed on the front surface of the substrate, wherein the orthographic projection of the black matrix on the front surface covers the orthographic projection of the signal lines on the front surface. The display device according to claim 1, wherein the orthographic projection of the pixel array on the front surface and the orthographic projection of the signal lines on the front surface at least partially overlap.

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