TW202121365A - Display device repair system - Google Patents

Abstract

To provide a display device repair system that can reduce connection failures of an inorganic light emitting element. A display device repair system is the repair system of a display device that has an array substrate, and a plurality of inorganic light emitting elements arrayed in the array substrate. The display device repair system has: an inspection-purpose substrate that faces the array substrate across the plurality of inorganic light emitting elements; an inspection electrode that is provided in a surface of the inspection-purpose substrate facing the array substrate, and is electrically connected to the plurality of inorganic light emitting elements; a press device that pressurizes the inspection-purpose substrate toward the plurality of inorganic light emitting elements; and a control circuit that determines respective lighting conditions of the plurality of inorganic light emitting elements.

Description

Display device repair system

The invention relates to a repair system for a display device.

In recent years, inorganic EL (Electro Luminescence) displays using inorganic light emitting diodes (micro LEDs (Light Emitting Diode)), that is, inorganic light emitting elements as display elements, have attracted attention. For example, Patent Document 1 describes an inspection jig useful for performing lighting inspection of inorganic light-emitting devices. [Prior Technical Literature] [Patent Literature]

[Patent Document 1] Specification of Chinese Patent Application Publication No. 109686828

[The problem to be solved by the invention]

When the inorganic light-emitting element is mounted on the array substrate, there is a possibility that the electrodes on the array substrate and the connection with the inorganic light-emitting element may be poor. The repair system of the display device requires the detection of poorly connected inorganic light-emitting elements, and the detected poorly connected inorganic light-emitting elements as good products.

The present invention was completed in view of the above-mentioned problems, and its purpose is to provide a repair system for display devices that can reduce the connection failure of inorganic light-emitting elements. [Technical means to solve the problem]

A repair system for a display device of one aspect of the present invention is a repair system for a display device having an array substrate and a plurality of inorganic light-emitting elements arranged on the array substrate, and has: a substrate for inspection, which sandwiches a plurality of inorganic light-emitting elements. The light-emitting element is opposed to the array substrate; the inspection electrode is provided on the surface of the inspection substrate that faces the array substrate, and is electrically connected to a plurality of the inorganic light-emitting elements; and a pressing device that controls the inspection Pressing the substrate toward the plurality of the inorganic light-emitting elements; and a control circuit that determines the lighting state of each of the plurality of the inorganic light-emitting elements.

The form (embodiment) for implementing the present invention will be described in detail with reference to the drawings. The present invention is not limited by the content described in the following embodiments. In addition, the constituent requirements described below include those that can be easily imagined by those skilled in the art and those that are substantially the same. In addition, the constituent elements described below can be combined as appropriate. In addition, the disclosure is only an example, and for those skilled in the art, it is of course included in the scope of the present invention that appropriate changes can be easily conceived to maintain the gist of the invention. In addition, the drawings are to make the description clearer. Compared with the actual state, the drawings may show the width, thickness, and shape of each part in a schematic manner, but they are only an example and do not limit the interpretation of the present invention. In addition, in this specification and each figure, the same elements as those mentioned above related to the figures that have appeared are sometimes denoted by the same symbols, and detailed descriptions are omitted as appropriate.

(First Embodiment) FIG. 1 is a plan view showing a configuration example of the display device of the first embodiment. As shown in FIG. 1, the display device 1 includes an array substrate 2, a pixel Pix, a driving circuit 12, a driving IC (Integrated Circuit) 210, and a cathode wiring 60. The array substrate 2 is a driving circuit substrate for driving each pixel Pix, and is also called a backplane or an active matrix substrate. The array substrate 2 has a substrate 20, a plurality of transistors, a plurality of capacitors, various wirings, and the like.

As shown in FIG. 1, the display device 1 has a display area AA and a peripheral area GA. The display area AA is the area where a plurality of pixels Pix are arranged, that is, the area where the image is displayed. The peripheral area GA is an area that does not overlap with a plurality of pixels Pix, and is arranged outside the display area AA.

A plurality of pixels Pix are arranged in the first direction Dx and the second direction Dy in the display area AA of the substrate 20. In addition, the first direction Dx and the second direction Dy are directions parallel to the first surface 20a (see FIG. 4) of the substrate 20 of the array substrate 2. The first direction Dx is orthogonal to the second direction Dy. However, the first direction Dx may not be orthogonal to the second direction Dy but may cross. The third direction Dz is a direction orthogonal to the first direction Dx and the second direction Dy. The third direction Dz corresponds to the normal direction of the substrate 20, for example. Hereinafter, the top view means to display the positional relationship when viewed from the third direction Dz.

The driving circuit 12 is disposed in the peripheral area GA of the substrate 20. The driving circuit 12 drives a plurality of gate lines (for example, the light emission control scan line BG, the reset control scan line RG, the initialization control scan line IG, and the write control scan line SG based on various control signals from the drive IC210 3)) The circuit. The driving circuit 12 selects a plurality of gate lines sequentially or simultaneously, and supplies gate driving signals to the selected gate lines. Thereby, the driving circuit 12 selects a plurality of pixels Pix connected to the gate line.

The driving IC 210 is a circuit that controls the display of the display device 1. The driving IC 210 can also be used as a COG (Chip On Glass) to be mounted on the peripheral area GA of the substrate 20. It is not limited to this, and the driver IC 210 may also be mounted as a COF (Chip On Film) on the wiring substrate connected to the peripheral area GA of the substrate 20. In addition, the wiring board connected to the substrate 20 is, for example, a flexible printed board or a rigid board.

The cathode wiring 60 is provided in the peripheral area GA of the substrate 20. The cathode wiring 60 is provided to surround the plurality of pixels Pix in the display area AA and the driving circuit 12 in the peripheral area GA. The cathodes (cathode electrodes 114 (see FIG. 5)) of the plurality of light-emitting elements 5 (see FIG. 4) are connected to the common cathode wiring 60, and are supplied with a fixed potential (for example, a ground potential). More specifically, the cathode electrode 114 of the light-emitting element 5 is connected to the cathode wiring 60 via the opposite cathode electrode 61 on the array substrate 2. In addition, the cathode wiring 60 may have a slit in a part, and may be formed with two different wirings on the substrate 20.

Figure 2 is a top view showing a plurality of pixels. As shown in FIG. 2, one pixel Pix includes a plurality of pixels SPix. For example, the pixel Pix has a first pixel SPixR, a second pixel SPixG, and a third pixel SPixB. The first pixel SPixR displays red, which is the primary color of the first color. The second pixel SPixG displays green which is the primary color of the second color. The third pixel SPixB displays blue which is the primary color of the third color.

As shown in FIG. 2, in one pixel Pix, the first pixel SPixR and the third pixel SPixB are arranged in the first direction Dx. In addition, the second pixel SPixG and the third pixel SPixB are arranged in the second direction Dy. In addition, the first color, the second color, and the third color are not limited to red, green, and blue, respectively, and arbitrary colors such as complementary colors can be selected. Hereinafter, when there is no need to distinguish between the first pixel SPixR, the second pixel SPixG, and the third pixel SPixB, it is referred to as a pixel SPix.

In addition, the number of pixels SPix included in one pixel Pix is not limited to three, and more than four pixels SPix can also be associated with each other. For example, it may also include a fourth pixel SPixW corresponding to white as the fourth color. In addition, the arrangement of the plurality of pixels SPix is not limited to the configuration shown in FIG. 2. For example, the first pixel SPixR may be adjacent to the second pixel SPixG in the first direction Dx. In addition, the first pixel SPixR, the second pixel SPixG, and the third pixel SPixB may be sequentially and repeatedly arranged in the first direction Dx.

The pixels SPix have light-emitting elements 5, respectively. The display device 1 displays images in the first pixel SPixR, the second pixel SPixG, and the third pixel SPixB by emitting different light for each of the light-emitting elements 5R, 5G, and 5B. The light-emitting element 5 is an inorganic light-emitting diode (LED: Light Emitting Diode) chip with a size of several μm or more and 30 μm or less in plan view. Generally speaking, a device with a chip size of 100 μm or more is called a mini LED, and a device with a chip size of more than a few μm and less than 100 μm is called a micro LED (micro LED). In the present invention, LEDs of any size can also be used, as long as they are used separately according to the screen size of the display device 1 (the size of one pixel). A display device equipped with a micro LED (micro LED) in each pixel is also called a micro LED display device. In addition, the micro LED does not limit the size of the light-emitting element 5.

Fig. 3 is a circuit diagram showing a configuration example of a pixel circuit of a display device. The pixel circuit PICA shown in FIG. 3 is provided in each of the first pixel SPixR, the second pixel SPixG, and the third pixel SPixB. The pixel circuit PICA is provided on the substrate 20 and supplies a driving signal (current) to the circuit of the light-emitting element 5. In addition, in FIG. 3, the description of the pixel circuit PICA can be applied to the pixel circuit PICA of each of the first pixel SPixR, the second pixel SPixG, and the third pixel SPixB.

As shown in FIG. 3, the pixel circuit PICA includes 5 light-emitting elements, 5 transistors, and 2 capacitors. Specifically, the pixel circuit PICA includes a light-emitting control transistor BCT, an initialization transistor IST, a writing transistor SST, a reset transistor RST, and a driving transistor DRT. A part of the transistor can also be shared by a plurality of adjacent pixels SPix.

The plurality of transistors of the pixel circuit PICA are respectively composed of n-type TFTs (Thin Film Transistors). However, it is not limited to this, and each transistor may be composed of a p-type TFT.

The light emission control scan line BG is connected to the gate of the light emission control transistor BCT. The initialization control scan line IG is connected to the gate of the initialization transistor IST. The write control scan line SG is connected to the gate of the write transistor SST. The reset control scan line RG is connected to the gate of the reset transistor RST.

The light emission control scan line BG, the initialization control scan line IG, the write control scan line SG, and the reset control scan line RG are respectively connected to the driving circuit 12 (see FIG. 1). The driving circuit 12 respectively supplies the light emission control signal Vbg, the initialization control signal Vig, the write control signal Vsg and the reset control to the light emission control scan line BG, the initialization control scan line IG, the write control scan line SG, and the reset control scan line RG. Signal Vrg.

The driving IC 210 (refer to FIG. 1) supplies the image signal Vsig to the pixel circuit PICA of each of the first pixel SPixR, the second pixel SPixG, and the third pixel SPixB in a time-division manner. Between each row of the first pixel SPixR, the second pixel SPixG, and the third pixel SPixB, and the driving IC 210, a switching circuit such as a multiplexer is provided. The image signal Vsig is supplied to the writing transistor SST via the image signal line L2. In addition, the drive IC 210 supplies the reset power supply potential Vrst to the reset transistor RST via the reset signal line L3. The driving IC 210 supplies the initialization potential Vini to the initialization transistor IST via the initialization signal line L4.

The light-emitting control transistor BCT, the initialization transistor IST, the write transistor SST, and the reset transistor RST function as switching elements that select conduction and non-conduction between the two nodes. The driving transistor DRT functions as a current control element that controls the current flowing into the light-emitting element 5 according to the voltage between the gate and the drain.

The cathode (cathode electrode 114) of the light emitting element 5 is connected to the cathode power supply line L10. In addition, the anode (anode electrode 110) of the light-emitting element 5 is connected to the anode power line L1 via the driving transistor DRT and the light-emitting control transistor BCT. The anode power supply potential PVDD is supplied to the anode power supply line L1. The cathode power supply potential PVSS is supplied to the cathode power supply line L10. The anode power supply potential PVDD is higher than the cathode power supply potential PVSS. The cathode power supply line L10 includes a cathode wiring 60.

In addition, the pixel circuit PICA includes a capacitor Cs1 and a capacitor Cs2. The capacitor Cs1 is a holding capacitor formed between the gate and the source of the driving transistor DRT. The capacitor Cs2 is an additional capacitor formed between the source of the driving transistor DRT, the anode of the light-emitting element 5, and the cathode power line L10.

The display device 1 drives the pixels SPix in the first row to the pixels SPix in the final row, and displays an image of one frame in one frame period.

During the reset period, according to the electric potentials of the light emission control scan line BG and the reset control scan line RG, the light emission control transistor BCT is turned off (non-conductive state), and the reset transistor RST is turned on (conductive state). Thereby, the source of the driving transistor DRT is fixed at the reset power supply potential Vrst. The reset power supply potential Vrst is a potential at which the potential difference between the reset power supply potential Vrst and the cathode power supply potential PVSS is smaller than the potential difference at which the light-emitting element 5 starts to emit light.

Next, according to the potential of the initialization control scan line IG, the initialization transistor IST is turned on. The gate of the driving transistor DRT is fixed at the initialization potential Vini through the initialization transistor IST. In addition, the drive circuit 12 turns on the light emission control transistor BCT and turns off the reset transistor RST. The driving transistor DRT is turned off when the source potential is (Vini-Vth), and the unevenness of the threshold voltage Vth of the driving transistor DRT of each pixel SPix is compensated.

Then, during the image signal writing operation period, the light-emitting control transistor BCT is turned off, the initialization transistor IST is turned off, and the writing transistor SST is turned on. The image signal Vsig is input to the gate of the driving transistor DRT.

Then, during the light-emitting operation period, the light-emitting control transistor BCT is turned on, and the write transistor SST is turned off. From the anode power supply line L1, the driving transistor DRT is supplied with the anode power supply potential PVDD via the light emission control transistor BCT. The driving transistor DRT supplies a current corresponding to the voltage between the gate and source to the light-emitting element 5. The light emitting element 5 emits light with a brightness corresponding to the current.

In addition, the driving circuit 12 can drive the pixels SPix in each column, can also drive two columns of pixels SPix at the same time, and can drive more than three columns of pixels SPix at the same time. In addition, the configuration of the pixel circuit PICA shown in FIG. 3 is only an example, and can be changed as appropriate. For example, the number of wires and the number of transistors in one pixel SPix may also be different.

Fig. 4 is a cross-sectional view taken along the line IV-IV' of Fig. 1; As shown in FIG. 4, the array substrate 2 of the display device 1 includes a substrate 20 and a plurality of transistors. The substrate 20 is an insulating substrate, for example, a glass substrate, a quartz substrate, or a flexible substrate made of acrylic resin, epoxy resin, polyimide resin, or polyethylene terephthalate (PET) resin.

In addition, in this specification, in the direction perpendicular to the surface of the substrate 20, the direction from the substrate 20 toward the light-emitting element 5 is referred to as "upper side" or simply "upper". In addition, the direction from the light-emitting element 5 toward the substrate 20 is referred to as "lower side" or simply "lower". In addition, when expressing the state of placing other structures on a structure, simply express it as "on top". Unless otherwise specified, it includes placing other structures directly above the structure in contact with the structure. Both the case of a structure and the case of arranging other structures above a certain structure with other structures interposed therebetween.

The primer layer 21 is provided on the first surface 20 a of the substrate 20. The undercoat layer 21 and the insulating films 22, 23, 24, 26, and 27 are inorganic insulating films, such as silicon oxide (SiO ₂ ) or silicon nitride (SiN).

A plurality of transistors are arranged on the undercoat layer 21. For example, in the display area AA of the substrate 20, as a plurality of transistors, a driving transistor DRT and a writing transistor SST included in the pixel SPix are respectively provided. In the peripheral area GA of the substrate 20, as a plurality of transistors, a transistor TrC included in the driving circuit 12 is provided. In addition, among the plurality of transistors, the display driving transistor DRT, the writing transistor SST, and the transistor TrC, but the light-emitting control transistor BCT, the initialization transistor IST, and the reset transistor RST included in the pixel circuit PICA are also included. It has the same layered structure as the drive transistor DRT. In addition, in the following description, when there is no need to distinguish and describe the case of a plurality of transistors, only the transistor Tr is indicated.

The transistor Tr is, for example, a TFT with a double-sided gate structure. The transistor Tr has a first gate electrode 31, a second gate electrode 32, a semiconductor layer 33, a source electrode 35, and a drain electrode 34, respectively. The first gate electrode 31 is provided on the undercoat layer 21. The insulating film 22 is provided on the undercoat layer 21 and covers the first gate electrode 31. The semiconductor layer 33 is provided on the insulating film 22. For the semiconductor layer 33, for example, polysilicon is used. However, the semiconductor layer 33 is not limited to this, and may be a microcrystalline oxide semiconductor, an amorphous oxide semiconductor, a low-temperature polysilicon, or the like.

The insulating film 23 is provided on the semiconductor layer 33. The second gate electrode 32 is provided on the insulating film 23. In the semiconductor layer 33, the portion sandwiched by the first gate electrode 31 and the second gate electrode 32 becomes the channel region 33a of the transistor Tr. In addition, as the transistor Tr, only n-type TFTs are shown, and p-type TFTs may also be formed at the same time.

The gate line 36 is connected to the second gate electrode 32 of the driving transistor DRT. The first gate electrode 31, the second gate electrode 32, and the gate line 36 are made of, for example, aluminum (Al), copper (Cu), silver (Ag), molybdenum (Mo), or alloy films thereof.

In this embodiment, the transistor Tr is not limited to a double-sided gate structure. The transistor Tr may be a bottom gate type in which only the first gate electrode 31 constitutes a gate electrode. In addition, the transistor Tr may be a top gate type in which only the second gate electrode 32 constitutes a gate electrode. In addition, the primer layer 21 may not be provided.

The source electrode 35 and the drain electrode 34 are connected to the semiconductor layer 33 through contact holes provided in the insulating films 23 and 24. The source electrode 35 and the drain electrode 34 are, for example, a laminated structure of titanium and aluminum, that is, a laminated film of (upper) TiAlTi (lower) or (upper) AlTi (lower).

A capacitor Cs1 is formed by the gate line 36 and the source electrode 35 opposite to the insulating fringe 24. In addition, the capacitor Cs1 also includes a capacitor formed between the semiconductor layer 33 and the gate line 36 opposite to the insulating fringe film 23.

The insulating film 25 covers the transistor Tr and is provided on the insulating film 24. The insulating film 25 uses organic materials such as photosensitive acrylic. The insulating film 25 is a flattening film, and can flatten the unevenness formed by the transistor Tr or various wirings.

On the insulating film 25, the counter electrode 37, the insulating film 26, the counter anode electrode 50, the connection layer 51, and the insulating film 27 are laminated in this order. The counter electrode 37 is made of a light-transmitting conductive material such as ITO (Indium Tin Oxide). The connecting electrode 38 is provided on the same layer as the counter electrode 37. The connection electrode 38 is connected to the source electrode 35 at the bottom of the contact hole.

The counter anode electrode 50 is provided on the array substrate 2 and is provided corresponding to each of the plurality of light-emitting elements 5. The opposite anode electrode 50 is electrically connected to the connection electrode 38 and the source electrode 35 through a contact hole provided in the insulating film 26. Thereby, the opposite anode electrode 50 is electrically connected to the driving transistor DRT. The counter anode electrode 50 has, for example, a laminated structure of molybdenum (Mo) and aluminum (Al). In addition, the counter anode electrode 50 may also be a metal or alloy containing at least one of molybdenum and titanium, or a translucent conductive material.

A capacitor Cs2 is formed between the opposing anode electrode 50 and the opposing electrode 37 that are opposed to the insulating fringe film 26. The insulating film 27 is provided to cover the counter anode electrode 50. The insulating film 27 covers the peripheral edge of the opposed anode electrode 50 and insulates the opposed anode electrode 50 of the adjacent pixel SPix.

The insulating film 27 has an opening for mounting the light-emitting element 5 at a position overlapping with the opposite anode electrode 50 and the connection layer 51. The size of the opening of the insulating film 27 takes into account the mounting offset in the mounting process of the light-emitting element 5 and the like, and is set as an opening with a larger area than the light-emitting element 5. Each light-emitting element 5 is mounted so that the anode electrode 110, the reflective layer 112 (see FIG. 5) and the counter anode electrode 50 are in contact with each other.

An element insulating film 28 is provided between the plurality of light-emitting elements 5. The element insulating film 28 is formed of a resin material. The element insulating film 28 covers at least the side surface of the light emitting element 5, and the element insulating film 28 is not provided on the cathode electrode 114 of the light emitting element 5 (refer to FIG. 5). The upper surface of the element insulating film 28 and the upper surface of the cathode electrode 114 are formed on the same surface, so that the element insulating film 28 is formed flat. However, the position of the upper surface of the element insulating film 28 may be different from the position of the upper surface of the cathode electrode 114.

The opposite cathode electrode 61 covers the plurality of light-emitting elements 5 and the element insulating film 28 and is electrically connected to the plurality of light-emitting elements 5. More specifically, the opposite cathode electrode 61 is provided over the upper surface of the element insulating film 28 and the upper surface of the cathode electrode 114. The cathode power supply potential PVSS is supplied to the cathode electrode 61 and the cathode electrode 114. For the counter cathode electrode 61, for example, a conductive material having translucency such as ITO is used. In this way, the light emitted from the light-emitting element 5 can be efficiently extracted to the outside.

The opposite cathode electrode 61 is continuously arranged from the display area AA to the peripheral area GA, and is connected to the cathode wiring 60 at the bottom of the contact hole H1. Specifically, the contact hole H1 is provided through the device insulating film 28 and the insulating film 25 in the peripheral area GA, and the cathode wiring 60 is provided on the bottom surface of the contact hole H1. The cathode wiring 60 is provided on the insulating film 24. That is, the cathode wiring 60 is provided in the same layer as the source electrode 35 and the drain electrode 34, and is formed of the same material.

Here, the structure of the light-emitting element 5 will be described. Fig. 5 is a cross-sectional view showing a configuration example of the light-emitting element of the first embodiment. As shown in FIG. 5, the light-emitting element 5 has a semiconductor layer 52, an anode electrode 110, a reflective layer 112, and a cathode electrode 114. However, the opposing anode electrode 50, the connection layer 51, and the opposing cathode electrode 61 may be included in the light-emitting element 5.

The semiconductor layer 52 is a light-emitting layer that emits light. The semiconductor layer 52 has an n-type cladding layer 54, a p-type cladding layer 56, and a light-emitting layer 58 disposed between the p-type cladding layer 56 and the n-type cladding layer 54. In this embodiment, the semiconductor layer 52 faces the upper side, and the p-type cladding layer 56, the light-emitting layer 58, and the n-type cladding layer 54 are laminated in this order. As the semiconductor layer 52, a compound semiconductor such as gallium nitride (GaN), aluminum indium gallium phosphide (AlInGaP), aluminum gallium arsenide (AlGaAs), or gallium arsenide phosphide (GaAsP) is used. In this embodiment, the p-type cladding layer 56 and the n-type cladding layer 54 are gallium nitride (GaN). In addition, the light-emitting layer 58 is indium gallium nitride (InGaN). The light-emitting layer 58 may also be a multiple quantum well structure (MQW: Multiple Quantum Well) laminated with InGaN and GaN.

The light-emitting element 5 faces upward, and a reflective layer 112, an anode electrode 110, a p-type cladding layer 56, a light-emitting layer 58, an n-type cladding layer 54, and a cathode electrode 114 are laminated in this order. More specifically, the light-emitting element 5 is formed by arranging a structure in which at least a p-type cladding layer 56, a light-emitting layer 58, and an n-type cladding layer 54 are sequentially stacked on the array substrate 2. Below the light-emitting element 5, a connecting layer 51 is provided, and above the light-emitting element 5, an opposing cathode electrode 61 is provided.

The connection layer 51 includes a conductive member, here a metal material. In this embodiment, the connection layer 51 is solder, and more specifically, is gold-based solder such as gold tin (AuSn) or silver tin (AgSn). The connection layer 51 joins the counter anode electrode 50 and the reflective layer 112.

The reflective layer 112 is disposed on the connection layer 51. The reflective layer 112 is a conductive member that can reflect light. In this embodiment, it is an alloy containing silver (Ag). The anode electrode 110 is disposed on the reflective layer 112. The anode electrode 110 is a transparent conductive member, such as ITO. The anode electrode 110 is electrically connected to the opposite anode electrode 50 via the reflective layer 112 and the connection layer 51. The anode electrode 110 is connected to the p-type cladding layer 56.

The cathode electrode 114 is connected to the n-type cladding layer 54. The cathode electrode 114 is a transparent conductive member, such as ITO. In addition, the cathode electrode 114 preferably has a connection terminal 116 inside. The connection terminal 116 is provided on the surface below the cathode electrode 114. The connection terminal 116 is in contact with the n-type cladding layer 54 on the lower surface, and is also connected to the cathode electrode 114.

The connection terminal 116 includes a conductive member, which is a metal material here. In this embodiment, the connection terminal 116 includes at least one of titanium (Ti) or titanium nitride (TiN). The connection terminal 116 assists the connection between the n-type cladding layer 54 and the cathode electrode 114.

The opposite cathode electrode 61 is overlapped and arranged on the surface on the upper side of the cathode electrode 114. In addition, the light-emitting element 5 may not be provided with the cathode electrode 114 and may be connected to the opposite cathode electrode 61 via the connection terminal 116.

Next, a method of manufacturing the light-emitting element 5 will be described. Fig. 6 is a diagram illustrating a method of stacking a light-emitting element according to the first embodiment. As shown in FIG. 6, when the light emitting element 5 is laminated, a semiconductor layer 52 is formed on one surface 200a of the first substrate 200 (step S10). In this embodiment, the first substrate 200 is a substrate containing Al ₂ O ₃ , that is, a sapphire substrate. Specifically, the manufacturing apparatus forms the semiconductor layer 52 on the surface 200 a of the first substrate 200 in the order of the n-type cladding layer 54, the light-emitting layer 58, and the p-type cladding layer 56. Thereby, the semiconductor layer 52 brings the first surface 52a and the one surface 200a of the first substrate 200 into contact and is joined.

In addition, the first surface 52a is a surface on the side of the n-type cladding layer 54 of the semiconductor layer 52 in the arrangement of the n-type cladding layer 54, the light-emitting layer 58, and the p-type cladding layer 56. In addition, the second surface 52b of the semiconductor layer 52 is a surface on the opposite side to the first surface 52a. That is, the second surface 52b is a surface on the p-type cladding layer 56 side of the semiconductor layer 52 in the arrangement of the n-type cladding layer 54, the light-emitting layer 58, and the p-type cladding layer 56.

Next, the laser device irradiates the semiconductor layer 52 with laser light L (step S11). Specifically, in the chamber CH, the surface 200 a of the first substrate 200 on which the semiconductor layer 52 is formed is arranged so as to face the surface of the array substrate 2. On the surface of the array substrate 2, an opposite anode electrode 50, a connection layer 51, a reflective layer 112, and an anode electrode 110 are laminated. That is, the second surface 52b of the semiconductor layer 52 of the first substrate 200 faces the surface 110a of the anode electrode 110. In addition, although omitted in FIG. 6, the array substrate 2 is also laminated with the layers (transistor Tr, etc.) shown in FIG. 4 between the opposed anode electrode 50 and the substrate 20.

In step S11, in this state, that is, in a state where the surface 200a of the first substrate 200 and the surface of the array substrate 2 in the chamber CH face each other, the laser light L is irradiated from the surface 200b side of the first substrate 200. The laser light L enters the first substrate 200 from the surface 200b, reaches the surface 200a, and is irradiated to the first surface 52a of the semiconductor layer 52 in contact with the surface 200a.

The semiconductor layer 52 is irradiated with the laser light L to absorb the light, separated (peeled) from the first substrate 200, and laminated on the surface of the array substrate 2 (step S12). Specifically, the manufacturing apparatus peels off the semiconductor layer 52 from the first substrate 200 by laser lift-off.

In addition, the laser light L is preferably set in a wavelength band that transmits the first substrate 200 and absorbs light by the n-type cladding layer 54 of the semiconductor layer 52. For example, the laser light L preferably has an energy of not less than 3.5 eV (electron Volt) and less than 9.9 eV corresponding to a wavelength band that transmits sapphire but does not transmit gallium nitride. In addition, the wavelength of the laser light L is preferably set to 310 nm or less.

In addition, when the semiconductor layer 52 is peeled off, the surface of the array substrate 2 faces the surface 200 a of the first substrate 200. Therefore, the second surface 52b of the semiconductor layer 52 peeled from the first substrate 200 is in contact with the surface 110a of the anode electrode 110 of the array substrate 2, and the second surface 52b of the semiconductor layer 52 (p-type cladding layer 56) is in contact with the anode electrode. The surface 110a of 110 is joined. That is, the semiconductor layer 52 is transferred to the array substrate 2.

After the semiconductor layer 52 is transferred to the array substrate 2, the connection terminal 116 is formed on the first surface 52 a of the semiconductor layer 52. Then, with the repair system 100, the light-emitting element 5 is inspected, and the light-emitting element 5 is repaired as needed (step S13). For example, in the repair system 100, the lighting inspection device 7 has an inspection substrate 71 and an inspection electrode 72. The inspection substrate 71 faces the array substrate 2. The inspection electrode 72 is provided on the surface of the inspection substrate 71 facing the array substrate 2. The inspection electrode 72 is in contact with the n-type cladding layer 54 of the semiconductor layer 52 and the connection terminal 116. In FIG. 6, one light-emitting element 5 is shown for easy understanding of the description, but the repair system 100 performs lighting inspection and repair of a plurality of light-emitting elements 5.

In the lighting inspection of the light-emitting element 5, the anode power supply potential PVDD is supplied to the opposite anode electrode 50. In addition, the inspection electrode 72 is supplied with a reference potential (for example, the cathode power supply potential PVSS). Thereby, the light-emitting element 5 is turned on. Or, the light-emitting element 5 judged to be in the non-lighting state is repaired by the repair system 100.

When the inspection and repair of the light-emitting element 5 are completed, the cathode electrode 114 is laminated on the semiconductor layer 52. Thereby, the light-emitting element 5 is formed (step S14). Thereafter, an element insulating film 28 is provided between the light-emitting elements 5, and the facing cathode electrode 61 covers the plurality of light-emitting elements 5, and is laminated on the cathode electrode 114 and the element insulating film 28.

In addition, in this embodiment, only the semiconductor layer 52 is formed on the first substrate 200, and members of the light-emitting element 5 other than the semiconductor layer 52 may be formed. For example, in step S10, at least one of the cathode electrode 114, the connection terminal 116, the connection layer 51, the reflective layer 112, and the anode electrode 110 may be formed on the first substrate 200 together with the semiconductor layer 52 and transferred To the array substrate 2. In addition, although the processing in the chamber CH is described in FIG. 6, it is not limited to laminating the light-emitting element 5 in the chamber CH.

Next, the repair system 100 and repair method of the display device 1 will be described. Fig. 7 is a block diagram showing a configuration example of the repair system of the first embodiment. The repair system 100 performs lighting inspection and repair of a display device 1 having an array substrate 2 and a plurality of light-emitting elements 5 arranged on the array substrate 2. As shown in FIG. 7, the repair system 100 includes a lighting inspection device 7, an inspection control circuit 101, a light detection device 102, an image processing circuit 103, an inspection drive circuit 104, a pressure device 220, a laser device 230, and Heater power supply 240.

The inspection control circuit 101 is a circuit that controls the lighting inspection of a plurality of light-emitting elements 5. In addition, the inspection control circuit 101 is a circuit that controls the repair of the plurality of light-emitting elements 5 based on the information of the lighting state of the plurality of light-emitting elements 5.

The lighting inspection device 7 is an inspection substrate for performing lighting inspection of a plurality of light-emitting elements 5. The inspection electrode 72 of the lighting inspection device 7 is connected to the cathodes (connection terminals 116) of the plurality of light-emitting elements 5. The inspection electrode 72 functions as the cathode electrode 114 and the counter cathode electrode 61 of the light-emitting element 5 during lighting inspection.

The inspection drive circuit 104 supplies the anode power supply potential PVDD to the array substrate 2 and the cathode power supply potential PVSS to the lighting inspection device 7 based on the control signal from the inspection control circuit 101. In each light-emitting element 5, a current corresponding to the potential difference between the anode power supply potential PVDD and the cathode power supply potential PVSS flows to emit light. In addition, the inspection drive circuit 104 only needs to supply the potential at which the light-emitting element 5 is turned on as the inspection drive signal, and it may also supply a potential different from the anode power supply potential PVDD and the cathode power supply potential PVSS during display of the display device 1.

The light detecting device 102 detects light emitted from the plurality of light emitting elements 5, respectively. The light detection device 102 is an image sensor having an imaging element such as CCD (Charge Coupled Device), for example. The image processing circuit 103 receives the detection signal (image data) from the light detection device 102 and performs image processing to analyze the lighting state (for example, brightness) of each of the plurality of light-emitting elements 5. The image processing circuit 103 outputs information about the lighting state of the plurality of light-emitting elements 5 to the inspection control circuit 101.

The inspection control circuit 101 determines the lighting state of each of the plurality of light-emitting elements 5 based on the information from the image processing circuit 103. For example, if the brightness of the light emitted from the light-emitting element 5 is within a specific range, the inspection control circuit 101 determines that the lighting state of the light-emitting element 5 is good. When the brightness of the light emitted from the light-emitting element 5 is less than the reference value, the inspection control circuit 101 determines that the light-emitting element 5 is in a non-lighting state. In addition, the inspection control circuit 101 calculates the ratio of the number of light-emitting elements 5 in the non-lighting state to the number of all light-emitting elements 5 as the connection failure rate. In addition, the inspection control circuit 101 calculates the position of each of the light-emitting element 5 in the lighting state and the light-emitting element 5 in the non-lighting state.

When the connection failure rate is greater than a specific reference value, that is, when there is a specific number of light-emitting elements 5 in the non-lighting state, the control circuit 101 for inspection provides for at least one of the pressure device 220, the laser device 230, and the heater power supply 240 More than one output control signal to repair the light-emitting element 5.

FIG. 8 is a flowchart showing the repair method of the repair system of the first embodiment. In addition, the repair method in FIG. 8 is a flowchart illustrating the repair method in step S13 shown in FIG. 6 in detail.

As shown in FIG. 8, first, the repair system 100 brings the inspection electrode 72 of the lighting inspection device 7 into contact with the connection terminal 116 of the light-emitting element 5 (step S21). More specifically, FIG. 9 is a cross-sectional view showing the inspection substrate and the pressing device of the first embodiment. As shown in FIG. 9, the inspection substrate 71 is arranged facing the array substrate 2 with a plurality of light-emitting elements 5 interposed therebetween. The inspection electrode 72 is provided on the second surface 71 b (the surface facing the array substrate 2) of the inspection substrate 71, and is electrically connected to the plurality of light-emitting elements 5.

The inspection substrate 71 is a translucent insulating substrate, such as a glass substrate, a quartz substrate, or acrylic resin, epoxy resin, polyimide resin, or polyethylene terephthalate (PET) resin. Flexible substrate. The inspection electrode 72 is a light-transmitting conductive material, that is, for example, ITO. Thereby, even when the lighting inspection device 7 is overlapped and arranged on the plurality of light emitting elements 5, the light emitted from the plurality of light emitting elements 5 also passes through the lighting inspection device 7 and reaches the light detection device 102.

The pressing device 220 is arranged on the first surface 71 a side of the inspection substrate 71 and presses the inspection substrate 71 toward the plurality of light-emitting elements 5. The pressurizing device 220 has an installation stand 221 and an elastic body 222. The setting table 221 is a member for installing the lighting inspection device 7 and supporting the lighting inspection device 7. The elastic body 222 is arranged between the installation table 221 and the lighting inspection device 7. The elastic body 222 is a sheet-like member having elasticity, and is formed of synthetic rubber, elastomer, or the like. The elastomer 222 may also be natural rubber.

The lighting inspection device 7 is moved toward the array substrate 2 by the pressurizing device 220, whereby the connection terminal 116 of the light-emitting element 5 is connected to the inspection electrode 72. That is, the upper surface and the lower surface of the light emitting element 5 are sandwiched between the array substrate 2 and the inspection substrate 71, and are electrically connected to the counter anode electrode 50 and the inspection electrode 72 of the array substrate 2 respectively. In this case, since the element insulating film 28 and the opposite cathode electrode 61 are not provided, the side surface of the light emitting element 5 is exposed between the array substrate 2 and the inspection substrate 71.

In this embodiment, the connection terminal 116 provided on the upper surface of the plurality of light-emitting elements 5 has a Young's modulus greater than that of the inspection electrode 72. The connection terminal 116 contains titanium (Ti) as described above, more preferably titanium nitride (TiN). For example, the Young's modulus of titanium is about 106 GPa. The Young's modulus of titanium oxide is about 350 GPa. In contrast, as a material for the inspection electrode 72, for example, the Young's modulus of ITO is about 60 GPa. Thereby, the connection terminal 116 contacts so that it may fit into the inside from the surface of the electrode 72 for inspection. As a result, the reliability of the connection between the inspection electrode 72 and the cathode (connection terminal 116) of the light-emitting element 5 can be ensured.

Fig. 10 is a plan view showing a configuration example of the light-emitting element of the first embodiment. As shown in FIG. 10, the plurality of light-emitting elements 5 have a quadrangular shape in a plan view, and four corners formed by connecting two sides are provided. A plurality of connection terminals 116 are provided on the upper surface of the light-emitting element 5, that is, the upper surface of the n-type cladding layer 54, at each of the two diagonal corners. In this embodiment, the pressure applied to the inspection electrode 72 from the plurality of connection terminals 116 is increased compared to the case where the connection terminals 116 are provided to cover all the areas on the upper surface of the light emitting element 5. As a result, the plurality of connection terminals 116 and the inspection electrode 72 are reliably electrically connected.

The shape, number, and arrangement of the connection terminals 116 are not limited to the example shown in FIG. 10, and can be changed as appropriate. Fig. 11 is a plan view showing a light-emitting element of a first modification of the first embodiment. As shown in FIG. 11, in the first modification example, a plurality of connection terminals 116A are arranged along each of the two opposite sides of the upper surface of the light emitting element 5 in a plan view. That is, the plurality of connection terminals 116A are respectively provided in a line shape extending in the second direction Dy, and are arranged spaced apart in the first direction Dx.

Fig. 12 is a plan view showing a light-emitting element of a second modification of the first embodiment. As shown in FIG. 12, in the second modification example, the connecting terminal 116B is formed in a frame shape along the four sides of the upper surface of the light emitting element 5 in a plan view. In FIG. 12, it is formed by one continuous connecting terminal 116B. A slit may be provided in a part of the connecting terminal 116B, and the connecting terminal 116B divided into a plurality of connecting terminals 116B may be formed into a frame shape.

Returning to FIG. 8, the repair system 100 performs a lighting inspection of the light-emitting elements 5, and the inspection control circuit 101 determines whether each light-emitting element 5 is in a lighted state or a non-lighted state (step S22). Specifically, the inspection drive circuit 104 supplies the anode power supply potential PVDD to the array substrate 2 and the cathode power supply potential PVSS to the inspection electrode 72. Thereby, the lighting inspection of a plurality of light-emitting elements 5 is performed at the same time.

In the case where the connection failure rate is less than the specific reference value, which is better than the case where all the light-emitting elements 5 are well lit (step S22, YES), the repair system 100 ends the repair, and the manufacturing device performs the step S14 of FIG. 6 The mounting process of the light-emitting element 5 is shown.

When the connection failure rate is greater than a specific reference value, that is, when there is a specific number of light-emitting elements 5 in the non-lighting state (step S22, No), the repair system 100 performs repair. Fig. 13 is an explanatory diagram for explaining the repair method of the repair system of the first embodiment. FIG. 13 is an explanatory diagram schematically showing the repair method of steps S23, S25, and S26 in FIG. 8. Among them, since the lighting inspection performed between each step of FIG. 13 is the same as that of FIG. 9, it is omitted and shown. In addition, FIG. 13 shows that the light-emitting element 5 in the non-lighting state has a poor connection on the anode side. For example, FIG. 13 illustrates a case where a void 51SP is generated in the connection layer 51, and the connection between the anode electrode 110 of the light-emitting element 5 and the opposite anode electrode 50 is poor.

The repair system 100 first presses the inspection substrate 71 toward the array substrate 2 side by the pressing device 220 (step S23). As shown in FIG. 13, the pressure device 220 intervenes the inspection substrate 71 to apply a force P to the light-emitting element 5 in the non-lighting state, so that the gap 51SP of the connection layer 51 is deformed in a manner of being squeezed to emit light. The situation where the anode electrode 110 of the element 5 and the opposite anode electrode 50 are electrically connected through the connection layer 51. In this case, the connection failure on the anode side of the light-emitting element 5 is eliminated, and the light-emitting element 5 becomes a good product that can be well lit.

After the pressing device 220 applies the force P for a certain period of time, the inspection control circuit 101 ends the pressing of the pressing device 220 and moves the pressing device 220. Then, the repair system 100 performs a lighting inspection of the light-emitting element 5 by lighting the inspection device 7 (step S24).

When the connection failure rate is less than the specific reference value (step S24, Yes), the inspection control circuit 101 determines that the pressure device 220 is repaired to eliminate the connection failure of the light-emitting element 5 in the non-lighting state, and the system is repaired 100 ends the repair.

When the connection failure rate is greater than a specific reference value (step S24, No), the repair system 100 performs repair by irradiating the laser light with the laser device 230 (step S25).

As shown in FIG. 13, the inspection control circuit 101 moves the pressurizing device 220 and the lighting inspection device 7 from the upper side of the light emitting element 5, and the laser device 230 irradiates the laser LZ. The laser device 230 irradiates the laser light LZ to the light-emitting element 5 judged to be in the non-lighting state among the light-emitting elements 5 based on the control signal from the inspection control circuit 101. Here, the wavelength of the laser LZ under repair is, for example, 355 nm or more, and more preferably the wavelength region of the infrared region. Since the laser LZ has a sufficiently long wavelength compared with the band gap of the semiconductor layer 52 (for example, GaN) of the light emitting element 5, it transmits through the semiconductor layer 52 and is absorbed by the connection layer 51. The connection layer 51 is melted by the heat from the laser LZ, and the anode electrode 110 of the light-emitting element 5 and the opposite anode electrode 50 are electrically connected through the connection layer 51 in some cases.

In addition, since the connection terminal 116 uses a material with a higher melting point than the connection layer 51, even when the laser device 230 is repaired, deformation and the like can be suppressed.

After the laser device 230 irradiates the laser LZ for a specific time, the inspection control circuit 101 ends the repair of the laser device 230 and moves the laser device 230. Then, the repair system 100 performs the lighting inspection of the light-emitting element 5 by the lighting inspection device 7 in the same manner as in FIG. 9 (step S26).

When the connection failure rate is less than the specified reference value (step S26, Yes), the inspection control circuit 101 determines that the non-lighting state of the light-emitting element 5 is eliminated by the repair of the laser device 230, and the system is repaired 100 ends the repair.

When the connection failure rate is greater than the specific reference value (step S26, No), the repair system 100 presses the inspection substrate 71 by the press device 220 and heats the light emitting element 5 (step S27). The heating system of the light-emitting element 5, for example, the heater power supply 240 supplies a driving signal VH for heating to the inspection electrode 72 based on a control signal from the inspection control circuit 101, whereby a current flows through the inspection electrode 72. The inspection electrode 72 generates heat in accordance with the flowing current, and the heat of the inspection electrode 72 is transferred to the light-emitting element 5. That is, the inspection electrode 72 functions as a heating resistor that generates heat by the drive signal VH.

The heat of the light-emitting element 5 is transferred to the connection layer 51 to melt the connection layer 51. Furthermore, by applying a force P to the light-emitting element 5 by the pressing device 220, the void 51SP of the connection layer 51 is deformed in a manner of being compressed. Thereby, the anode electrode 110 of the light-emitting element 5 and the opposite anode electrode 50 are electrically connected through the connection layer 51.

After the pressure device 220 applies the force P to the light emitting element 5, and the heater power supply 240 supplies the driving signal VH to the inspection electrode 72 for a specific time, the inspection control circuit 101 ends the repair of the heater power supply 240 and the pressure device 220 to heat The power supply 240 moves. Then, the repair system 100 performs the lighting inspection of the light-emitting element 5 by the lighting inspection device 7 as in FIG. 9 (step S28).

When the connection failure rate is less than the specified reference value (step S28, Yes), the inspection control circuit 101 determines that the pressure device 220 and the heating of the light-emitting element 5 are repaired to eliminate the non-lighting state of the light-emitting element 5 The connection is bad, and the repair system 100 ends the repair.

When the connection failure rate is greater than the specific reference value (step S28, No), the repair system 100 determines that it is difficult to repair, removes the light-emitting element 5 in the non-lighted state (step S29), and ends the repair. Furthermore, after the repair system 100 removes the light-emitting element 5 in the non-lighted state, other light-emitting elements 5 are installed. Or, the repair system 100 can also end the repair while leaving the light-emitting element 5 in the non-lighted state.

As described above, the repair system 100 can perform lighting inspection and repair in a state where a plurality of light-emitting elements 5 are mounted on the array substrate 2 and the element insulating film 28 and the opposite cathode electrode 61 are not formed. Therefore, the repair system 100 can perform a lighting inspection of a plurality of light-emitting elements 5 with a lighting inspection device 7 of a simple configuration. In addition, the repair system 100 does not cause damage to the element insulating film 28 and the counter cathode electrode 61 even if it is repaired by the irradiation of the laser LZ or the heating of the light emitting element 5, so the element insulating film 28 and the counter cathode electrode 61 are formed together. It can be easily repaired compared to the case of lighting inspection and repair afterwards.

In addition, the repair system 100 can perform multiple repairs through the pressurizing device 220, the laser device 230, and the heating resistor (the inspection electrode 72), thereby increasing the success rate of the repair. As a result, the connection failure of the light-emitting element 5 can be reduced.

In addition, the repair method of the repair system 100 shown in FIG. 7 to FIG. 9 can also be appropriately changed. The order of steps S23, S25, and S27 shown in FIG. 8 can be exchanged, and any one of steps S23, S25, and S27 can also be omitted.

In addition, the configuration of the lighting inspection device 7 shown in FIG. 9 is only an example, and can be changed as appropriate. For example, FIG. 14 is an explanatory diagram for explaining the repair method of the repair system of the third modification of the first embodiment. As shown in FIG. 14, the lighting inspection device 7A of the third modification example may have a heating resistor 73. The heater power supply 240 supplies the driving signal VH to the heating resistor 73. Thereby, a current flows through the heating resistor 73 to generate heat (step S27-1).

In addition, the heating resistor 73 is provided on the first surface 71 a of the inspection substrate 71, that is, the surface on the opposite side to the inspection electrode 72. However, the heating resistor 73 may be provided on the second surface 71 b of the inspection substrate 71. That is, the heating resistor 73 may be provided on the same surface as the inspection electrode 72.

Fig. 15 is a cross-sectional view showing an inspection substrate and a pressing device of a fourth modification of the first embodiment. As shown in FIG. 15, in the fourth modification, the light-emitting elements 5R, 5G, and 5B have different heights. Specifically, the light-emitting element 5G is higher than the light-emitting element 5B, and the light-emitting element 5R is higher than the light-emitting element 5G. In addition, in the fourth modification example, the inspection substrate 71 is a flexible substrate formed of a soft resin material. Thereby, even when the heights of the light-emitting elements 5R, 5G, and 5B are different, the inspection substrate 71 is deformed along the upper surface of each of the light-emitting elements 5R, 5G, and 5B by the force from the pressing device 220, and Each connection terminal 116 is connected to the inspection electrode 72. In addition, since the pressing device 220 has the elastic body 222, when the heights of the light-emitting elements 5R, 5G, and 5B are different, it is also possible to suppress the force applied from the inspection substrate 71 to each of the light-emitting elements 5R, 5G, and 5B. difference.

(Second Embodiment) Fig. 16 is a cross-sectional view showing the inspection substrate of the repair system of the second embodiment. In addition, in the following description, the same constituent elements as those described in the above-mentioned embodiment are denoted by the same reference numerals, and repeated descriptions are omitted. As shown in FIG. 16, the lighting inspection device 7B of the second embodiment has a convex portion 74 provided on the second surface 71b. The convex portion 74 protrudes toward the array substrate 2 in an area overlapping with the peripheral area GA. The convex portion 74 is formed of, for example, a metal material.

The inspection electrode 72 is provided over the area overlapping with the display area AA and the area overlapping with the peripheral area GA, and covers the convex portion 74. In other words, the height between the inspection electrode 72 and the inspection substrate 71 in the peripheral area GA is higher than the height between the inspection electrode 72 and the inspection substrate 71 in the display area AA. The inspection electrode 72 is electrically connected to the cathode wiring 60 of the array substrate 2 at a portion overlapping with the lower surface of the convex portion 74.

In the second embodiment, the inspection drive circuit 104 can supply the cathode power supply potential PVSS to the inspection electrode 72 of the lighting inspection device 7B via the array substrate 2. Therefore, the wiring board for electrically connecting the inspection drive circuit 104 and the lighting inspection device 7B can be omitted, and the structure of the repair system 100 can be simplified.

(Third Embodiment) Fig. 17 is a diagram illustrating a method of stacking a light-emitting element according to a third embodiment. As shown in FIG. 17, when the light emitting element 5 is laminated, the surface 200a of the first substrate 200 on which the semiconductor layer 52 is formed is opposed to the surface 250a of the transfer substrate 250 in the chamber CH, and the semiconductor layer 52 is irradiated Laser light L (step S30). The transfer substrate 250 can be made of any material, for example, it can be Poly Dimethylsiloxane (PDMS), or silicon oxide (SiO ₂ ). In the case of silica, it is better to provide an adhesive on the surface.

In this state, that is, in a state where the surface 200a of the first substrate 200 and the surface 250a of the transfer substrate 250 are opposed to each other in the chamber CH, the first surface 52a of the semiconductor layer 52 is irradiated with laser light L. Specifically, the first substrate 200 is irradiated with laser light L from the surface 200 b side of the first substrate 200. The laser light L is incident from the surface 200b into the first substrate 200, reaches the surface 200a, and is irradiated to the first surface 52a of the semiconductor layer 52 in contact with the surface 200a. The semiconductor layer 52 is irradiated with the laser light L in this way to absorb the light, and is separated (peeled) from the first substrate 200 (step S31). That is, in step S30 and step S31 (separation step), the semiconductor layer 52 is peeled from the first substrate 200 by laser lift-off.

Here, when the semiconductor layer 52 is peeled from the first substrate 200, the surface 250a of the transfer substrate 250 and the surface 200a of the first substrate 200 face each other. Therefore, the semiconductor layer 52 peeled from the first substrate 200 is transferred to the surface 250 a of the transfer substrate 250. In other words, the second surface 52b of the semiconductor layer 52 is in contact with the surface 250a of the transfer substrate 250, and the second surface 52b of the semiconductor layer 52 (p-type cladding layer 56) is joined to the surface 250a of the transfer substrate 250.

After the semiconductor layer 52 is transferred to the transfer substrate 250, in the chamber CH, the surface 250a of the transfer substrate 250 on which the semiconductor layer 52 is formed is opposed to the surface of the array substrate 2, and the semiconductor layer 52 is irradiated with laser light L (step S32). On the surface of the array substrate 2 opposite to the transfer substrate 250, an opposing cathode electrode 61A, a connection layer 51A, a reflective layer 112, and a cathode electrode 114A are laminated, and further, a transistor Tr, etc. are laminated and formed below the semiconductor layer 52 All layers. Therefore, the first surface 52a of the semiconductor layer 52 faces the surface 114Aa of the cathode electrode 114A.

In this state, that is, in a state where the surface 250a of the transfer substrate 250 and the surface of the array substrate 2 are opposed to each other in the chamber CH, the second surface 52b of the semiconductor layer 52 is irradiated with laser light L. Specifically, the laser light L is irradiated to the transfer substrate 250 from the surface 250b of the transfer substrate 250 side. The laser light L enters the transfer substrate 250 from the surface 250b to the surface 250a, and is irradiated to the second surface 52b of the semiconductor layer 52 in contact with the surface 250a. The semiconductor layer 52 is irradiated with the laser light L in this way, and is separated (peeled) from the transfer substrate 250 (step S33). In addition, the laser light L is preferably set in a wavelength band that transmits the transfer substrate 250 and does not transmit the p-type cladding layer 56 of the semiconductor layer 52.

Here, when the semiconductor layer 52 is peeled from the transfer substrate 250, the surface of the array substrate 2 faces the surface 250a of the transfer substrate 250. Therefore, the semiconductor layer 52 peeled from the transfer substrate 250 is laminated on the surface of the array substrate 2. In other words, the first surface 52a of the semiconductor layer 52 is in contact with the surface of the array substrate 2, here the surface 114Aa of the cathode electrode 114A, and the first surface 52a of the semiconductor layer 52 and the surface 114Aa of the cathode electrode 114A are joined. That is, the semiconductor layer 52 is transferred from the transfer substrate 250 to the array substrate 2. Thereafter, by stacking the opposing anode electrode 50 on the semiconductor layer 52, the light-emitting element 5 is formed. Furthermore, an opposite anode electrode is partially formed on the anode electrode 110 to form the display device 1.

In addition, in the third embodiment, only the semiconductor layer 52 is formed on the first substrate 200 and the transfer substrate 250, and members of the light emitting element 5 other than the semiconductor layer 52 may be formed. For example, at least one of the connection layer 51A, the reflective layer 112, the cathode electrode 114A, and the opposite anode electrode 50 may be formed on at least one of the first substrate 200 and the transfer substrate 250 together with the semiconductor layer 52, and It is transferred to the array substrate 2.

The preferred embodiments of the present invention have been described above, but the present invention is not limited to such embodiments. The content disclosed in the embodiment is only an example, and various changes can be made without departing from the scope of the present invention. Appropriate changes made within the scope not departing from the gist of the present invention, of course, also belong to the technical scope of the present invention. At least one of various omissions, replacements, and changes of the constituent elements can be made without departing from the scope of the above-mentioned embodiments and modifications.

1: display device 2: Array substrate 5, 5R, 5G, 5B: light-emitting element 7, 7A, 7B: lighting inspection device 12: Drive circuit 20: substrate 20a: side 1 21: Undercoat 22～27: Insulating film 28: component insulation film 31: The first gate electrode 32: 2nd gate electrode 33: Semiconductor layer 33a: Passage area 34: Drain electrode 35: source electrode 36: gate line 37: Counter electrode 38: Connect the electrodes 50: Opposite anode electrode 51, 51A: Connection layer 51SP: Gap 52: Semiconductor layer 52a: Side 1 52b: Side 2 54: n-type cladding layer 54p: n-type cladding layer 56: p-type cladding 58: luminescent layer 60: Cathode wiring 61: Opposite cathode electrode 61A: Opposite cathode electrode 71: substrate for inspection 71a: side 1 71b: Side 2 72: Inspection electrode 73: heating resistor 74: Convex 100: repair system 101: Control circuit for inspection 102: Light detection device 103: Image processing circuit 104: Drive circuit for inspection 110: anode electrode 110a: surface 112: reflective layer 114, 114A: Cathode electrode 114Aa: Surface 116, 116A, 116B: connection terminals 200: 1st substrate 200a: surface 200b: surface 210: Driver IC 220: pressurizing device 221: Setting Table 222: Elastomer 230: Laser device 240: heater power supply 250: Transfer substrate 250a: surface 250b: surface AA: display area BCT: Light-emitting control transistor BG: Luminous control scan line CH: Chamber Cs1: Capacitance Cs2: Capacitance DRT: drive transistor Dx: 1st direction Dy: 2nd direction Dz: 3rd direction GA: Surrounding area H1: Contact hole IG: Initialize control scan line IST: initialize transistor IV-IV': line L: Laser light L1: anode power cord L2: Video signal line L3: Reset signal line L4: Initialization signal line L10: Cathode power cord LZ: Laser P: Force PICA: pixel circuit Pix: pixel PVDD: anode power supply potential PVSS: Cathode power supply potential RG: reset control scan line RST: reset transistor S10～S14: steps S21～S33: Step S27-1: Step SG: write control scan line SPix: pixel SPixB: 3rd pixel SPixG: 2nd pixel SPixR: 1st pixel SpixW: 4th pixel SST: write transistor Tr: Transistor TrC: Transistor Vbg: luminous control signal VH: drive signal Vig: Initialization control signal Vini: Initialization potential Vrg: reset control signal Vrst: reset the power supply potential Vsg: write control signal Vsig: video signal

FIG. 1 is a plan view showing a configuration example of the display device of the first embodiment. Figure 2 is a top view showing a plurality of pixels. Fig. 3 is a circuit diagram showing a configuration example of a pixel circuit of a display device. Fig. 4 is a cross-sectional view taken along the line IV-IV' of Fig. 1; Fig. 5 is a cross-sectional view showing a configuration example of the light-emitting element of the first embodiment. Fig. 6 is a diagram illustrating a method of stacking a light-emitting element according to the first embodiment. Fig. 7 is a block diagram showing a configuration example of the repair system of the first embodiment. FIG. 8 is a flowchart showing the repair method of the repair system of the first embodiment. Fig. 9 is a cross-sectional view showing the inspection substrate and the pressing device of the first embodiment. Fig. 10 is a plan view showing a configuration example of the light-emitting element of the first embodiment. Fig. 11 is a plan view showing a light-emitting element of a first modification of the first embodiment. Fig. 12 is a plan view showing a light-emitting element of a second modification of the first embodiment. Fig. 13 is an explanatory diagram for explaining the repair method of the repair system of the first embodiment. 14 is an explanatory diagram for explaining the repair method of the repair system of the third modification of the first embodiment. Fig. 15 is a cross-sectional view showing an inspection substrate and a pressing device of a fourth modification of the first embodiment. Fig. 16 is a cross-sectional view showing the inspection substrate of the repair system of the second embodiment. Fig. 17 is a diagram illustrating a method of stacking a light-emitting element according to the third embodiment.

2: Array substrate

5, 5R, 5G, 5B: light-emitting element

7: Light up the inspection device

71: substrate for inspection

72: Inspection electrode

100: repair system

101: Control circuit for inspection

102: Light detection device

103: Image processing circuit

104: Drive circuit for inspection

220: pressurizing device

230: Laser device

240: heater power supply

PVDD: anode power supply potential

PVSS: Cathode power supply potential

Claims (12)

A repair system for a display device, which is a repair system for a display device having an array substrate and a plurality of inorganic light-emitting elements arranged on the array substrate, and has: A substrate for inspection, which sandwiches a plurality of the above-mentioned inorganic light-emitting elements and faces the above-mentioned array substrate; The inspection electrode is arranged on the surface of the inspection substrate opposite to the array substrate, and is electrically connected to a plurality of the inorganic light-emitting elements; A pressing device that presses the inspection substrate toward a plurality of the inorganic light-emitting elements; and The control circuit determines the lighting state of each of the plurality of inorganic light-emitting elements. For example, the repair system of the display device of claim 1, which has: An electrode, which is provided on the array substrate, is provided corresponding to each of the plurality of inorganic light-emitting elements; A connection layer, which electrically connects the above-mentioned electrode and the above-mentioned inorganic light-emitting element; and The laser device irradiates laser light to the inorganic light-emitting elements judged to be in the non-lighting state among the plurality of inorganic light-emitting elements based on the control signal from the control circuit. For example, the repair system of the display device of claim 1, which has: A heating resistor, which is provided on the above-mentioned inspection substrate; and The heater power supply supplies a driving signal for heating to the heating resistor based on a control signal from the control circuit. For example, the repair system of the display device of claim 1, which has: The heater power supply supplies a drive signal for heating to the inspection electrode based on a control signal from the control circuit. Such as the repair system of the display device of claim 3, where The pressing device presses the inspection substrate, and heats the inorganic light-emitting element by the heating drive signal from the heater power supply. Such as the repair system of the display device of claim 1, where The above-mentioned inspection electrodes are provided throughout the area overlapping with the display area and the area overlapping with the surrounding area; and The height between the inspection electrode and the inspection substrate in the peripheral area is higher than the height between the inspection electrode and the inspection substrate in the display area. Such as the repair system of the display device of claim 1, where A plurality of the above-mentioned inorganic light-emitting elements have connection terminals provided on the upper surface of each; and The connection terminal is connected to the inspection electrode and has a Young's modulus greater than that of the inspection electrode. Such as the repair system of the display device of claim 7, where A plurality of the above-mentioned inorganic light-emitting elements have 4 corners with two sides connected in a plan view from a direction perpendicular to the above-mentioned array substrate; and A plurality of the above-mentioned inorganic light-emitting elements have a plurality of the above-mentioned connection terminals; A plurality of the above-mentioned connecting terminals are provided at each of the two diagonal corners. Such as the repair system of the display device of claim 7, where A plurality of the above-mentioned inorganic light-emitting elements have two opposing sides in a plan view from a direction perpendicular to the above-mentioned array substrate; and A plurality of the above-mentioned inorganic light-emitting elements have a plurality of the above-mentioned connection terminals; A plurality of the connection terminals are provided along each of the two sides. Such as the repair system of the display device of claim 7, where The above-mentioned connection terminal contains titanium or titanium nitride. Such as the repair system of the display device of claim 1, where The inorganic light-emitting element is provided with a structure in which at least a p-type cladding layer, a light-emitting layer, and an n-type cladding layer are sequentially stacked on the array substrate. Such as the repair system of the display device of claim 1, where The upper surface and the lower surface of the inorganic light-emitting element are sandwiched by the array substrate and the inspection substrate, and are electrically connected to the electrodes of the array substrate and the inspection electrodes, respectively; and The side surface of the inorganic light-emitting element is exposed between the array substrate and the inspection substrate.

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