TW202040933A - 訊號補償裝置 - Google Patents
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Abstract
一種訊號補償裝置。此訊號補償裝置包含運算電路與調變電路。運算電路用以根據第一資料訊號與第二資料訊號產生控制訊號。第二資料訊號為訊號轉換電路根據第一資料訊號產生。調變電路用以根據控制訊號提供迴路增益,以補償訊號轉換電路的衰減。
Description
本案是有關於一種訊號補償裝置,且特別是有關於具有調變電路的訊號補償裝置。
訊號收發器中的功率放大器(PA)受到調幅到調幅(AM-AM)和調幅到調相(AM-PM)失真,導致頻譜再生。頻譜再生使得難以將功率放大器整合在無線收發器中,例如IEEE802.11a/b/g/n/ac WLAN應用,並降低發射器的效能。許多方法被提出以補償訊號失真,然而,這造成發射器的成本與設計複雜度增加。
本案的一態樣係於提供一種訊號補償裝置。此訊號補償裝置包含運算電路與調變電路。運算電路用以根據第一資料訊號與第二資料訊號產生控制訊號。第二資料訊號為訊號轉換電路根據第一資料訊號產生。調變電路用以根據控制訊號提供迴路增益,以補償訊號轉換電路的衰減。
綜上所述,本案所提供的訊號補償裝置透過使用調變電路以線性化發射器和接收器。相較於現有的訊號補償方
法,本案的實施方式降低計算複雜度,並具有較少的功耗。
100、200、300‧‧‧訊號收發器
ADD1、ADD2、ADD3‧‧‧加減運算電路
S11、S21、S12、S22、S13、S23、SF‧‧‧資料訊號
Sctrl1、Sctrl2、Sctrl3‧‧‧資料訊號
130‧‧‧發射器轉換電路
150‧‧‧接收器轉換電路
M1、M2‧‧‧混頻電路
DAC1、DAC3‧‧‧數位轉類比電路
ADC1、ADC3‧‧‧類比轉數位電路
VGA‧‧‧功率放大電路
ATT‧‧‧衰減電路
LPF‧‧‧低頻濾波電路
PA‧‧‧放大電路
110A、110B、110C‧‧‧訊號補償裝置
112A、112B、112C‧‧‧調變電路
INT1、INT2、INT3‧‧‧積分電路
QUA1、QUA2、QUA3‧‧‧量化電路
CON1、CON2、CON3‧‧‧控制電路
OP1、OP2、OP3‧‧‧運算電路
INTa、INTb‧‧‧積分電路
第1圖為根據本案一些實施例提出之一種訊號收發器的示意圖;第2圖為根據本案一些實施例提出之一種訊號收發器的示意圖;第3圖為根據本案一些實施例提出之一種訊號收發器的示意圖;第4圖為根據本案一些實施例提出之一種積分電路的示意圖;以及第5圖為根據本案一些實施例提出之一種積分電路的示意圖。
第1圖為根據本案一些實施例提出之一種訊號收發器100的示意圖。如第1圖所繪示,訊號收發器100包含訊號補償裝置110A、發射器轉換電路130、接收器轉換電路150。訊號補償裝置110A包含運算電路OP1以及調變電路112A。發射器轉換電路130包含數位轉類比電路DAC1、低頻濾波電路LPF、混頻電路M1以及放大電路PA。接收器轉換電路150包含類比轉數位電路ADC1、功率放大電路VGA、混頻電路M2以及衰減電路ATT。調變電路112包含加減運算電路ADD1、積分電路INT1、量化電路QUA1以及控制電路CON1。
於連接關係上,加減運算電路ADD1耦接於積分電路INT1與控制電路CON1。積分電路INT1耦接於量化電路QUA1。量化電路QUA1耦接於數位轉類比電路DAC1與控制電路CON1。
數位轉類比電路DAC1耦接於低頻濾波電路LPF。低頻濾波電路LPF耦接於混頻電路M1。混頻電路M1耦接於放大電路PA。
衰減電路ATT耦接於混頻電路M2。混頻電路M2耦接於功率放大電路VGA。功率放大電路VGA耦接於類比轉數位電路ADC1。
於操作關係上,運算電路OP用以根據資料訊號S11與資料訊號S12產生控制訊號Sctrl,其中資料訊號S12為發射器轉換電路130與接收器轉換電路150根據資料訊號S11產生。
於初次操作或取得校正模型時,資料訊號S11繞過(bypass)調變電路112A直接傳送至發射器轉換電路130,並於發射器轉換電路130轉換資料訊號S11後由發射器(未繪示)發出發射資料訊號SF。發射器(未繪示)接收發射資料訊號SF後,接收器轉換電路150轉換發射資料訊號SF後,產生資料訊號S21。運算電路OP1接收資料訊號S11與資料訊號S21後,依據資料訊號S11與S21產生控制訊號Sctrl1。於部分實施例中,控制訊號Sctrl1係由資料訊號S21除以資料訊號S11所產生。接著,控制訊號Sctrl1被傳送至控制電路CON1儲存。
如第1圖所繪示的調變電路112A係為三角積分調
變電路。若是積分電路INT1加上量化電路QUA1的運算模型係為H(s),控制電路CON1的運算模型係為G(s),經由控制電路CON1的回路增益後,調變電路112A的運算模型如以下算式:
於實際發送欲輸出的資料訊號S11時,不繞過調變電路112A。如此,資料訊號S11經由訊號補償裝置110A、發射器轉換電路130與接收器轉換電路150後,資料訊號S21的訊號接近資料訊號S11或與資料訊號S11相同。
即,調變電路110A根據控制訊號Sctrl1提供迴路增益,以抵銷訊號轉換電路(包含發射器轉換電路130與接收器轉換電路150)的衰減。
於部分實施例中,數位類轉類比電路DAC1用以將接收到的資料訊號由數位資料訊號轉換為類比資料訊號,低通濾波電路LPF用以過濾接收到的類比資料訊號以產生過濾後資料訊號。混頻電路M1用以將類比資料訊號由低頻訊號轉換為高頻訊號。放大電路PA用以將接收到的高頻訊號放大,以產生發射資料訊號SF。
於部分實施例中,衰減電路ATT用以將發射器所發射的發射資料訊號進行衰減處理,並產生衰減後訊號。混頻電路M2用以將衰減後訊號由高頻調整為低頻。功率放大電路VGA用以放大衰減後訊號以產生類比資料訊號。類比轉數位電路ADC1用以將類比資料訊號轉換為數位資料訊號。
如第1圖所繪示的訊號補償裝置110A係為預失真調變電路。此訊號補償裝置110A的調變電路112A係與發射器
轉換電路130耦接。資料訊號S11會先經由訊號補償裝置110A的調變後,再經過發射器轉換電路130的衰減後再輸出。
請參閱第2圖。第2圖為根據本案一些實施例提出之一種訊號收發器200的示意圖。第2圖中的發射器轉換電路130、接收器轉換電路150和第1圖中的發射器轉換電路130、接收器轉換電路150相同。第2圖中的訊號收發器200與第1圖中的訊號收發器100的差異在於第2圖中的訊號補償裝置110B的調變電路112B係與接收器轉換電路150相耦接。
如第2圖所繪示。於初次操作或取得校正模型時,發射器轉換電路130接收資料訊號S12後,發射器轉換電路130依據資料訊號S12產生資料訊號SF,並發送資料訊號SF。接收器轉換電路150接收資料訊號SF後,接收器轉換電路150依據資料訊號SF產生資料訊號S22,並將資料訊號S22傳送至運算電路OP2。運算電路OP2依據資料訊號S22與資料訊號S12產生控制訊號Sctr2。接著,控制訊號Sctrl2被傳送至控制電路CON2儲存。於部分實施例中,控制訊號Sctrl2係由資料訊號S22除以資料訊號S12所產生。
於實際發送欲輸出的資料訊號S12時,資料訊號S12經由發射器轉換電路130與接收器轉換電路150後所產生的訊號被傳送至訊號補償裝置110B。訊號補償裝置110B根據控制訊號Sctrl2提供迴路增益,以補償訊號轉換電路(包含發射器轉換電路130與接收器轉換電路150)的衰減。
如第2圖所繪示的訊號補償裝置110B係為後失真調變電路。此訊號補償裝置110B的調變電路112B係與接收器
轉換電路150耦接。資料訊號S12輸出後,經過發射器轉換電路130與接收器轉換電路150的衰減後,再經由訊號補償裝置110B的補償校正。
請參閱第3圖。第3圖為根據本案一些實施例提出之一種訊號收發器300的示意圖。第3圖中的發射器轉換電路130和第1圖中的發射器轉換電路130相同。第3圖中的訊號收發器300與第1圖中的訊號收發器100的差異在於第3圖中,訊號補償裝置110C係位於接收器轉換電路150內。如第3圖所繪示的訊號補償裝置110C係為後失真調變電路。
如第3圖所繪示,接收器轉換電路150的類比轉數位電路ADC3包含加減運算電路ADD3、積分電路INT3、量化電路QUA3以及數位轉類比電路DAC3。而訊號補償裝置110C包含運算電路OP3與調變電路112C。調變電路112C包含控制電路CON3。
於連接關係上,加減運算電路ADD3耦接於積分電路INT3。積分電路INT3耦接於量化電路QUA3。量化電路QUA3耦接於控制電路CON3。控制電路CON3耦接於運算電路OP3與數位轉類比電路DAC3。
於初次操作或取得校正模型時,發射器轉換電路130接收資料訊號S13後,發射器轉換電路130依據資料訊號S13產生資料訊號SF,並發送資料訊號SF。接收器轉換電路150接收資料訊號SF後,接收器轉換電路150中的量化電路QUA3於傳送資料訊號時會繞過CON3,直接將經過衰減電路ATT、混頻電路M2、功率放大電路VGA、加減運算電路
ADD3、積分電路INT3以及量化電路QUA3處理後的資料訊號S23傳送至數位轉類比電路DAC3與運算電路OP3。運算電路OP3依據資料訊號S23與資料訊號S13產生控制訊號Sctr3。接著,控制訊號Sctrl3被傳送至控制電路CON3儲存。於部分實施例中,控制訊號Sctrl3係由資料訊號S23除以資料訊號S13所產生。
於實際發送欲輸出的資料訊號S13時,資料訊號S13經由發射器轉換電路130與接收器轉換電路150。於接收器轉換電路150操作時,量化電路QUA3所產生的訊號會先被傳送至控制電路CON3,再由控制電路CON3傳送至數位轉類比電路DAC3。
於第3圖的實施例中,訊號補償裝置110的迴路增益係透過加減運算電路ADD3、積分電路INT3、量化電路QUA3、控制電路CON3、數位轉類比電路DAC3所形成,以補償發射器轉換電路130與接收器轉換電路150中的衰減電路ATT、混頻電路M2、功率放大電路VGA、加減運算電路ADD3、積分電路INT3、量化電路QUA3、數位轉類比電路DAC3所造成的訊號衰減。
請參閱第4圖與第5圖。第4圖為根據本案一些實施例提出之一種積分電路INTa的示意圖。第5圖為根據本案一些實施例提出之另一種積分電路INTb的示意圖。積分電路INTa與積分電路INTb可用以表示第1圖中的積分電路INT1、第2圖中的積分電路INT2或第3圖中的積分電路INT3。積分電路INTa係為類比積分電路。而積分電路INTb係為數位積分電
路。
於部分實施例中,第1圖的數位轉類比電路DAC1與第3圖的數位轉類比電路DAC3分別包含開關(未繪示),以控制第1圖的數位轉類比電路DAC1與第3圖的數位轉類比電路DAC3選擇所接收的訊號。舉例而言,於初次操作或取得校正模型時,第1圖的數位轉類比電路DAC1選擇接收未經過訊號補償裝置110A的資料訊號S11,而第3圖的數位轉類比電路DAC3選擇接收未經過訊號補償裝置110C的資料訊號S23。另一方面,於實際發送欲輸出的資料訊號時,第1圖的數位轉類比電路DAC1選擇接收經過訊號補償裝置110A的資料訊號S11,而第3圖的數位轉類比電路DAC3選擇接收經過訊號補償裝置110C的資料訊號S23。
於部分實施例中,當所傳送與接收的資料訊號係為聲音訊號時,如第1圖至第3圖所繪示之訊號收發器100、200、300不包含混頻電路M1、M2。即當所傳送與接收的資料訊號係為聲音訊號時,不須經由混頻電路M1、M2的處理。
綜上所述,於本案的實施例中所提供的訊號補償裝置透過使用三角積分調變電路以線性化發射器和接收器。相較於現有的訊號補償方法,本案的實施方式可降低計算複雜度,並具有較少的功耗。
雖然本案已以實施方式揭露如上,然其並非限定本案,任何熟習此技藝者,在不脫離本案之精神和範圍內,當可作各種之更動與潤飾,因此本案之保護範圍當視後附之申請專利範圍所界定者為準。
100‧‧‧訊號收發器
ADD1‧‧‧加減運算電路
S11、S21、SF‧‧‧資料訊號
Sctrl1‧‧‧資料訊號
130‧‧‧發射器轉換電路
150‧‧‧接收器轉換電路
M1、M2‧‧‧混頻電路
DAC1‧‧‧數位轉類比電路
ADC1‧‧‧類比轉數位電路
VGA‧‧‧功率放大電路
ATT‧‧‧衰減電路
LPF‧‧‧低頻濾波電路
PA‧‧‧放大電路
110A‧‧‧訊號補償裝置
112A‧‧‧調變電路
INT1‧‧‧積分電路
QUA1‧‧‧量化電路
CON1‧‧‧控制電路
OP1‧‧‧運算電路
Claims (10)
- 一種訊號補償裝置,包含:一運算電路,用以根據一第一資料訊號與一第二資料訊號產生一控制訊號,其中該第二資料訊號為一訊號轉換電路根據該第一資料訊號產生;以及一調變電路,用以根據該控制訊號提供一迴路增益,以補償該訊號轉換電路的一衰減。
- 如請求項1所述的訊號補償裝置,其中該訊號轉換電路包含一發射器轉換電路以及一接收器轉換電路。
- 如請求項2所述的訊號補償裝置,其中該發射器轉換電路包含:一數位轉類比電路,用以將該第一資料訊號轉換為一類比資料訊號;一功率放大電路,用以放大該第一類比資料訊號;一低通濾波電路,用以過濾該第一類比資料訊號;以及一混頻電路,用以將該第一類比資料訊號由低頻訊號轉換為高頻訊號。
- 如請求項2所述的訊號補償裝置,其中該接收器轉換電路包含:一衰減電路,用以接收該發射器轉換電路所發射的一發射資料訊號並進行衰減處理,並產生一衰減後訊號;一混頻電路,用以將該衰減後訊號由高頻調整為低頻; 一放大電路,用以放大該衰減後訊號以產生一類比資料訊號;以及一類比轉數位電路,用以將該類比資料訊號轉換為一數位資料訊號,以產生該第二資料訊號。
- 如請求項1所述的訊號補償裝置,其中該調變電路包含:一加減運算電路;一積分電路,耦接於該加減運算電路;一量化電路,耦接於該積分電路;以及一控制電路,耦接於該量化電路以及該加減運算電路,以形成一回授路徑。
- 如請求項5所述的訊號補償裝置,其中該調變電路係與該發射器轉換電路相耦接,且該調變電路係為預失真調變電路。
- 如請求項5所述的訊號補償裝置,其中該調變電路係與該接收器轉換電路相耦接,且該調變電路係為後失真調變電路。
- 如請求項2所述的訊號補償裝置,其中該調變電路係位於該接收器轉換電路內,且該調變電路係為後失真調變電路。
- 如請求項8所述的訊號補償裝置,其中該接收器轉換電路包含一類比轉數位電路,其中該類比轉數位電路包含:一加減運算電路;一積分電路,耦接於該加減運算電路;一量化電路,耦接於該積分電路以及該補償電路的一控制電路;以及一數位轉類比電路,耦接於該補償電路的該控制電路與該加減運算電路。
- 如請求項1所述的訊號補償裝置,其中該運算電路更用以將該第二資料訊號除以該第一資料訊號,以產生該控制訊號。
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2019
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- 2019-11-04 US US16/672,686 patent/US11115260B2/en active Active
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US20200344108A1 (en) | 2020-10-29 |
US11115260B2 (en) | 2021-09-07 |
TWI703813B (zh) | 2020-09-01 |
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