TW201916554A - High step-down converter which comprises two input capacitors connected in series and having an input voltage sharing effect for high input voltage applications - Google Patents

Abstract

A high step-down converter comprises first and second input capacitors connected in series, first and second switches connected in series, third and fourth switches connected in series, first and second coupling capacitors, a first resonant inductor, first and second transformers, first to fourth diodes, first and second step-down inductors, and first and second inductors connected in parallel. The two input capacitors connected in series have an input voltage sharing effect for high input voltage applications, and all switches have low-voltage stress. The first and second inductors connected in parallel have an output current sharing effect and are suitable for high output current applications. The first to fourth switches are alternately turned on so that the current flowing through the first and second inductors has the performance of ripple cancellation to reduce the ripple of the output current. The first and second input capacitors are connected to an input power source in parallel for receiving an input voltage from the input power source so as to share the crushed voltage. The first and second switches are connected to the first input capacitor in parallel. A common terminal of the second and third switches is electrically connected to a common terminal of the first and second input capacitors. The first coupling capacitor has first and second ends connected to a common terminal of the first and second switches. The second coupling capacitor has first and second ends connected to a common terminal of the third and fourth switches. The first resonant inductor has first and second ends connected to the common terminal of the second and third switches. The high step-down converter further comprises an output unit electrically connected to the first and second step-down inductors for converging the current from the first and second step-down inductors and generating an output voltage.

Description

High buck converter

This invention relates to a converter, and more particularly to a high buck converter.

Referring to Figure 1, a conventional buck converter whose buck ratio is determined by the duty ratio of its switch The parameters V _O , D, and V _in are the output voltage, the conduction duty ratio, and the input voltage, respectively, but have the following disadvantages: 1. The step-down ratio is low and is limited by the conduction duty ratio of the switch, and if the step-down ratio is to be increased, The switch needs to operate at a minimum duty-conducting ratio. 2. Switches and diodes are subject to high voltage and high current stress.

Accordingly, it is an object of the present invention to provide a high buck converter that solves the above problems.

Therefore, the high buck converter of the present invention comprises a first input capacitor and a second input capacitor connected in series, a first switch and a second switch connected in series, a third switch and a fourth switch connected in series The first and second coupling capacitors, the first resonant inductor, the first and second transformers, the first to fourth diodes, the first and second step-down inductors, the first and second inductors, and an output capacitor.

A first input capacitor and a second input capacitor connected in series are connected in parallel to an input power source for receiving an input voltage from the input power source to share the voltage across the input voltage.

A first switch and a second switch connected in series are connected in parallel with the first input capacitor, and the first switch is controlled to switch between conduction and non-conduction, and the second switch is controlled to switch between conduction and non-conduction.

A third switch and a fourth switch connected in series are connected in parallel with the second input capacitor, and the first switch is controlled to switch between conduction and non-conduction, and the second switch is controlled to switch between conduction and non-conduction. The second switch and a common end of the third switch are electrically connected to a common end of the first input capacitor and the second input capacitor.

The first coupling capacitor has a first end electrically connected to a common end of the first switch and the second switch, and a second end.

The second coupling capacitor has a first end electrically connected to a common end of the third switch and the fourth switch, and a second end.

The first resonant inductor has a first end and a second end electrically connected to the common end of the second switch and the third switch.

Each transformer has a primary side winding and a secondary side winding, and each side winding has a first end and a second end, wherein the first end of the primary side winding of the first transformer is electrically connected to the a second end of the first resonant inductor, a second end of the primary side winding of the first transformer is electrically connected to the second end of the first coupling capacitor, and a first end of the primary side winding of the second transformer is electrically connected to the second end The second end of the second coupling capacitor, the second end of the primary side winding of the second transformer is electrically connected to the second end of the first resonant inductor.

The first diode has an anode electrically connected to the first end of the secondary side winding of the first transformer, and a cathode.

The second diode has an anode electrically connected to the second end of the secondary side winding of the first transformer, and a cathode.

The first buck inductor has a first end electrically connected to the cathode of the first diode and a second end electrically connected to the cathode of the second diode.

The third diode has an anode electrically connected to the first end of the secondary side winding of the second transformer, and a cathode.

The fourth diode has an anode electrically connected to the second end of the secondary side winding of the second transformer, and a cathode.

The second step-down inductor has a first end electrically connected to the cathode of the third diode and a second end electrically connected to the cathode of the fourth diode.

The first inductor has a first end electrically connected to the cathode of the second diode, and a second end.

The second inductor has a first end electrically connected to the cathode of the fourth diode and a second end electrically connected to the first end of the first inductor.

The output capacitor is electrically connected between the second end of the first inductor and the anode of the second pole body to provide an output voltage.

The effect of the invention is that the capacitor series input structure has the effect of input voltage sharing, and is suitable for high input voltage applications, and the voltage stress of all power switches of the converter is only half of the input voltage. By using the first and second step-down inductors to achieve a low voltage conductivity ratio, it is not necessary to use a relatively large transformer, reducing the transformer volume and increasing the power density, and also reducing the parasitic components of the transformer and reducing the surge of the converter. Inductor Parallel Output Architecture: With output current sharing, it is suitable for high output current applications, and the converter upper and lower modules can share half of the output current. All switch interleaved operation causes the output to have current ripple cancellation.

Before the present invention is described in detail, it should be noted that in the following description, similar elements are denoted by the same reference numerals.

Referring to FIG. 2, an embodiment of the high buck converter of the present invention includes a first input capacitor C _I1 and a second input capacitor C _I2 connected in series, and a first switch S ₁ and a second switch connected in series. S _2, a third switch connected in series with a fourth switch S ₃ S _4, the first to the second coupling capacitor CB1 ~ CB2, a first resonant inductor Lr, a first transformer and a second transformer T _{T. 1 2} , a first diode D ₁ , a second diode D ₂ , a third diode D ₃ , a fourth diode D ₄ , a first step-down inductor L _b1 , a second The step-down inductor L _b2 , an output unit 3 , and a control unit 2 .

A first input capacitor C _I1 and a second input capacitor C _I2 connected in series are connected in parallel to an input power source for receiving an input voltage Vin from the input power source to share the voltage across the input voltage Vo.

a first switch S ₁ and a second switch S ₂ connected in series are connected in parallel with the first input capacitor C _I1 , and the first switch S ₁ is controlled to switch between conduction and non-conduction, the second switch S ₂ Controlled between switching between conduction and non-conduction.

a third switch S ₃ and a fourth switch S ₄ connected in series are connected in parallel with the second input capacitor C _I2 , and the first switch S ₁ is controlled to switch between conduction and non-conduction, the second switch S ₂ Controlled between switching between conduction and non-conduction. The second switch S ₂ and a common end of the third switch S ₃ are electrically connected to a common end of the first input capacitor C _I1 and the second input capacitor C _I2 .

The first switch S ₁ has a first end electrically connected to the first end of the first coupling capacitor C _{I2 ,} a second end electrically connected to a negative terminal of the input power source, a first parasitic diode D _S1 and a first parasitic capacitance C _1, the first parasitic capacitance C ₁ is electrically connected between the first terminal of the first switch S ₁ and the second end. The first parasitic diode D _S1 has a first switch S is electrically connected to the second end of the anode ₁ and an electrical switch S is connected to a first end of the first cathode _1. The first switch S ₁ is an N-type power semiconductor transistor, and the first end of the first switch S ₁ is a drain, and the second end of the first switch S ₂ is a source.

The second switch S ₂ has a first end electrically connected to the first end of the first resonant inductor Lr, a second end electrically connected to the first end of the first coupling capacitor C _B1 , and a second parasitic diode D _S2 body and a second parasitic capacitor C _2, the second parasitic capacitance C ₂ is electrically connected between the first terminal of the second switch S ₂ and the second end. The second parasitic diode D _S2 has an anode electrically connected to the second end of the second switch S ₂ and a cathode electrically connected to the first end of the first switch S ₁ . The second switch S ₂ is an N-type power semiconductor transistor, and a first end of the second switch S ₂ is a drain, the second terminal of the second switch S ₂ is the source.

The third switch S ₃ has a first end electrically connected to the first end of the second coupling capacitor C _{B2 ,} a second end electrically connected to the first end of the first resonant inductor Lr , and a third parasitic diode intermediate D _S3 and a third parasitic capacitor C _3, the third parasitic capacitor C ₃ is electrically connected to the third switch S ₃ to the first and second ends. The third parasitic diode D _S3 has an anode electrically connected to the second end of the third switch S ₃ and a cathode electrically connected to the first end of the first switch S ₁ . The third switch _{S. 3} is an N-type power semiconductor transistor, the first and the second switch S ₂ is a drain terminal, a second terminal of the second switch S ₂ is the source.

The fourth switch S ₄ has a first end electrically connected to the input power source, a second end electrically connected to the first end of the second coupling capacitor C _B2 , a fourth parasitic diode D _S4 and a fourth parasitic capacitance between C _4, C ₄ and the fourth parasitic capacitance is electrically connected to the first terminal of the fourth switch S ₄ and the second end. The fourth parasitic diode D _S4 has an anode electrically connected to the second end of the fourth switch S4 and a cathode electrically connected to the first end of the fourth switch S ₄ . The fourth switch _{S. 4} is an N-type power semiconductor transistor, and a first end of the second switch S ₂ is a drain, the second terminal of the second switch S ₂ is the source.

The first coupling capacitor C _I1 has a first end electrically connected to a common end of the first switch S ₁ and the second switch S ₂ , and a second end. The second coupling capacitor C _B2 has a first end electrically connected to a common end of the third switch S ₃ and the fourth switch S ₄ , and a second end.

The first resonant inductor Lr has a first end and a second end electrically connected to the common end of the second switch S ₂ and the third switch S ₃ .

Each of the first transformer T ₁ and the second transformer T ₂ has a primary side winding LP1, LP2 and a secondary side winding LS1, LS2, and each side winding has a first end and a second end. wherein the first end of the first transformer T1 primary side winding LP1 is electrically connected to the first end of the second resonant inductor Lr, the second terminal of the first primary side winding of the transformer T ₁ is connected to the second LP1 a second end of the coupling capacitor C _{I1 ,} a first end of the primary side winding LP2 of the second transformer T ₂ is electrically connected to a second end of the second coupling capacitor, and a first side of the second transformer T2 The two ends are electrically connected to the second end of the first resonant inductor Lr. The turns ratios of the first and second transformers T ₁ and T ₂ are equal (n: 1). The first end of each of the secondary side windings LS1, LS2 is a striking end, and the second end of each of the secondary side windings LS1, LS2 is a non-tapping end. The first end of each of the primary side windings LP1, LP2 is a striking end, and the second end of each of the primary side windings LP1, LP2 is a non-tapping end.

The first diode D ₁ has an anode electrically connected to the first end of the secondary side winding LS1 of the first transformer T ₁ , and a cathode. The second diode D ₂ has a second end electrically an anode and a cathode connected to the first secondary winding of the transformer T is LS1 _1. The first step-down inductor L _b1 has a first end electrically connected to the cathode of the first diode D ₁ and a second end electrically connected to the cathode of the second diode D ₂ . The third diode D ₃ has an anode electrically connected to the first end of the secondary side winding L _S2 of the second transformer T ₂ , and a cathode. The fourth diode D ₄ has an anode electrically connected to the second end of the secondary side winding L _S2 of the second transformer T ₂ , and a cathode. The second step-down inductor L _b2 has a first end electrically connected to the cathode of the third diode D ₃ and a second end electrically connected to the cathode of the fourth diode D ₄ .

The output unit 3 is electrically connected to the second end of the first buck inductor Lb1 and the second buck inductor Lb2 for converging currents from the first and second buck inductors Lb1, Lb2 and generating an output Voltage Vo. The output unit 3 includes a first inductor L ₁ , a second inductor L ₂ , and an output capacitor C _O . The first inductor L ₁ has a first end electrically connected to the cathode of the second diode D ₂ and the second end of the first step-down inductor Lb1, and a second end. The second inductor L ₂ has a first end electrically connected to the cathode of the fourth diode D ₄ and the second end of the second step-down inductor Lb2, and a first end electrically connected to the first end of the first inductor L ₁ Second end. The output capacitor Co is electrically connected between the second end of the first inductor L ₁ and the anode of the second pole body D ₂ for providing an output voltage Vo.

The control unit 2 generates a switching of the first switch of the first pulse signals S _1, and a switching of the second switch S ₂ of the second pulse signal, switching the third switch a third clock signal and the S _{wave. 3} Switching the fourth pulse wave signal of the fourth switch S ₄ , the first pulse wave signal and the second pulse wave signal and the third pulse wave signal and the fourth pulse wave signal have the same cycle time, the first A pulse wave signal does not overlap with a duty conduction period of the second pulse wave signal, and the third pulse wave signal does not overlap with a duty conduction period of the fourth pulse wave signal. The switching timing diagram of the switches S ₁ to S ₄ will be further explained below in sixteen stages.

Referring to Figure 3, an equivalent circuit diagram of the present embodiment, indicating that the two transformer T primary winding NP1 _1, T _2, the magnetizing inductance Lm1 NP2 non-ideal equivalent circuit, Lm2, and the first to the second The leakage inductances Lr1 and Lr2 in the non-ideal equivalent circuit of the primary side windings NP1 and NP2 of the two transformers T ₁ and T ₂ , the parameters i _Lm1 to i _Lm2 respectively represent the current flowing through the magnetizing inductances Lm1 and Lm2, the parameter V _p1 , V _s1 represents the two-terminal voltage across the primary side winding NP1 and the secondary side winding NS1 of the first transformer T1, respectively, and the parameters v _p2 , v _s2 represent the primary side winding NP2 and the secondary side winding NS2 of the second transformer T2, respectively. The two-terminal cross-over voltage, the parameters V _Lb1 and V _Lb2 respectively represent the two-terminal voltage across the first and second step-down inductors Lb1 and Lb2, and the parameters V _L1 and V _L2 represent the first and second inductors L1 and L2, respectively. The two ends of the pressure. The parameters v _C1 to v _C4 represent the cross-pressures of the first to fourth parasitic capacitances C ₁ to C ₄ , respectively. The parameters v _CB1 to v _CB2 represent the crossover voltages of the first to second coupling capacitors C _B1 to C _B2 , respectively. The parameter i _Lr represents the current flowing through the first resonant inductor Lr.

4 is an operation timing diagram of the embodiment, wherein the parameters V _gs1 , V _gs2 , V _gs3 , and V _gs4 respectively represent first and second pulse tones for controlling whether the first to fourth switches S1 S S4 are turned on. The voltage of the variable signal, the parameters V _DS1 ~ V _DS4 represent the two-terminal cross-over of the first to fourth switches S1 - S4 respectively, and the parameter T _S is the cycle time of the first pulse wave signal, wherein the parameters i _D1 ～ i _D4 Representing currents flowing through the first to fourth diodes D1 to D4, respectively, the parameters i _Lb1 to i _Lb2 represent currents flowing through the first to second step-down inductors Lb1 and Lb2, respectively, and the parameters i _L1 to i _L2 represent respectively. The current flowing through the first to second inductors L1, L2, the parameter i _Lo represents the sum of the currents flowing through the first to second inductors L1, L2, and the parameter i _o represents the output current supplied by the output capacitor C _O .

The following is a circuit diagram of the sixteenth stage of the present embodiment, in which the conductive elements are indicated by solid lines, and the non-conducting elements are indicated by broken lines, and each stage will be described below.

The first stage (time:):

Referring to Figure 4 and 5, the first switch S ₁ is non-conducting, the second switch S ₂ is not turned on, the second switch S ₃ is turned on, the fourth switch S ₄ is not turned on, a first diode D ₁ is turned on, the second two The pole body D _{2 is} not conducting, the third diode D _{3 is} not conducting, the fourth diode D _{4 is} turned on, the first parasitic diode D _{S1 is} not conducting, and the second parasitic diode D _{S2 is} not conducting, the third The parasitic diode D _{S3 is} not turned on, and the fourth parasitic diode D _{S4 is} not turned on.

Since the first switch S _{1 is} switched to be non-conducting, the first parasitic capacitance C _{1 is} charged, and the second parasitic capacitance C _{2 is} discharged, when the voltage is charged Second diode Switching from non-conducting to conducting, it enters the second phase.

Second stage (time: ):

Referring to FIGS. 4 and 6, a first switch S ₁ is non-conducting, the second switch S ₂ is not turned on, the third switch S ₃ is turned on, the fourth switch S ₄ is not turned on, a first diode D ₁ is turned on, the second two The pole body D _{2 is} turned on, the third diode D _{3 is} not turned on, the fourth diode D _{4 is} turned on, the first parasitic diode D _{S1 is} not turned on, the second parasitic diode D _{S2 is} not turned on, and the third parasitic The diode D _{S3 is} not turned on, and the fourth parasitic diode D _{S4 is} not turned on.

The second phase begins with the second diode Switching to conduction, current flowing through the first diode due to current commutation Decreasing, current flowing through the first diode Increment. At this time, the leakage inductance of the first transformer And the magnetizing inductance Lm1 and the first resonant inductor First and second capacitors , Resonance is formed, and the first parasitic capacitance voltage is made Resonance rise, second parasitic capacitance voltage The resonance drops. When the second parasitic capacitance Down to zero, second parasitic diode When the transition is conductive, it enters the third phase.

The third stage (time:):

Referring to FIG. 4 and FIG. 7 , the first switch S _{1 is} not turned on, the second switch S _{2 is} not turned on, the third switch S _{3 is} turned on, the fourth switch S _{4 is} not turned on, and the first diode D _{1 is} turned on, the second two The polar body D _{2 is} turned on, the third diode D _{3 is} not turned on, the fourth diode D _{4 is} turned on, the first parasitic diode D _{S1 is} not turned on, the second parasitic diode D _{S2 is} turned on, and the third parasitic two is The polar body D _{S3 is} not turned on, and the fourth parasitic diode D _{S4 is} not turned on.

When the second parasitic capacitor voltage Resonance to zero, second switch Second parasitic diode Conduction, second parasitic capacitor voltage Clamped to zero, and the second switch Switch to on to achieve zero voltage switching (ZVS) when the third switch Switch to non-conducting and proceed to the fourth stage.

The fourth stage (time: ):

Referring to FIG. 4 and FIG. 8 , the first switch S _{1 is} not turned on, the second switch S _{2 is} turned on, the third switch S _{3 is} not turned on, the fourth switch S _{4 is} not turned on, and the first diode D _{1 is} turned on, the second two The pole body D _{2 is} turned on, the third diode D _{3 is} not turned on, the fourth diode D _{4 is} turned on, the first parasitic diode D _{S1 is} not turned on, the second parasitic diode D _{S2 is} not turned on, and the third parasitic The diode D _{S3 is} not turned on, and the fourth parasitic diode D _{S4 is} not turned on.

Current from the magnetizing inductance of the second transformer Third parasitic capacitance Linear charging to make the fourth parasitic capacitance Linear discharge, when the third parasitic capacitor voltage Charging to the equivalent of the second coupling capacitor voltage Third diode Switching from non-conducting to conducting, it enters the fifth stage.

The fifth stage (time: ):

Referring to FIG. 4 and FIG. 9, a first switch S ₁ is non-conducting, the second switch S ₂ is turned on, the third switch S ₃ is not turned on, the fourth switch S ₄ is not turned on, a first diode D ₁ is turned on, the second two The pole body D _{2 is} turned on, the third diode D _{3 is} not turned on, the fourth diode D _{4 is} turned on, the first parasitic diode D _{S1 is} not turned on, the second parasitic diode D _{S2 is} not turned on, and the third parasitic The diode D _{S3 is} not turned on, and the fourth parasitic diode D _{S4 is} not turned on.

Current flowing through the third diode due to current commutation Decreasing, current flowing through the fourth diode Incremental, at this time, the second step-down inductor L _{b2 is} reflected to the magnetizing inductance Lm2 of the primary side and the second transformer T2 and the first resonant inductor , third and fourth capacitors , Resonance is formed, and the third parasitic capacitance voltage is made Resonance rise, fourth parasitic capacitance voltage Resonance drops when the fourth parasitic capacitance voltage Down to zero, the fourth parasitic diode When the transition is conductive, it enters the sixth stage.

The sixth stage (time: ):

Referring to FIG. 4 and FIG. 10, the first switch S _{1 is} not turned on, the second switch S _{2 is} turned on, the third switch S _{3 is} not turned on, the fourth switch S _{4 is} not turned on, and the first diode D _{1 is} turned on, the second two The polar body D _{2 is} turned on, the third diode D _{3 is} turned on, the fourth diode D _{4 is} turned on, the first parasitic diode D _{S1 is} not turned on, the second parasitic diode D _{S2 is} not turned on, and the third parasitic two The polar body D _{S3 is} not turned on, and the fourth parasitic diode D _{S4 is} turned on.

When the fourth parasitic capacitor voltage Resonance to zero, fourth switch Fourth parasitic diode Conduction, third diode current Continuous rise, first step-down inductor current Continue to drop when the first step-down inductor current When falling to zero, the first diode Switching to non-conducting enters the seventh stage.

The seventh stage (time: ):

Referring to FIG. 4 and FIG. 11, a first switch S ₁ is non-conducting, the second switch S ₂ is turned on, the third switch S ₃ is not turned on, the fourth switch S ₄ is turned on, a first diode D ₁ is not turned on, the second two The polar body D _{2 is} turned on, the third diode D _{3 is} turned on, the fourth diode D _{4 is} turned on, the first parasitic diode D _{S1 is} not turned on, the second parasitic diode D _{S2 is} not turned on, and the third parasitic two The polar body D _{S3 is} not turned on, and the fourth parasitic diode D _{S4 is} not turned on.

The second buck inductor current i _Lb2 continues to rise linearly when rising to the second inductor current When they are the same, Fourth diode Switching to non-conducting enters the seventh stage.

The eighth stage (time: ):

Referring to FIG. 4 and FIG. 12, a first switch S ₁ is non-conducting, the second switch S ₂ is turned on, the third switch S ₃ is not turned on, the fourth switch S ₄ is turned on, a first diode D ₁ is not turned on, the second two The pole body D _{2 is} turned on, the third diode D _{3 is} turned on, the fourth diode D _{4 is} not turned on, the first parasitic diode D _{S1 is} not turned on, and the second parasitic diode D _{S2 is} not turned on, and the third parasitic The diode D _{S3 is} not turned on, and the fourth parasitic diode D _{S4 is} not turned on.

At this time, the second inductor And the second step-down inductor Linear magnetization and first inductance Linear release, when the fourth switch Switching from conduction to non-conduction, the eighth phase is entered.

The ninth stage (time: ):

Refer to FIG. 4 and FIG. 13, a first switch S ₁ is non-conducting, the second switch S ₂ is turned on, the third switch S ₃ is not turned on, the fourth switch S ₄ is not turned on, a first diode D ₁ is not turned on, the second The diode D _{2 is} turned on, the third diode D _{3 is} turned on, the fourth diode D _{4 is} not turned on, the first parasitic diode D _{S1 is} not turned on, and the second parasitic diode D _{S2 is} not turned on, and the third The parasitic diode D _{S3 is} not turned on, and the fourth parasitic diode D _{S4 is} not turned on.

Due to the fourth switch Switching to non-conduction, respectively making the fourth parasitic capacitance Linear charging, third parasitic capacitance Linear discharge, when the voltage is charged Fourth diode Switching from non-conducting to conducting, it enters the tenth stage.

The tenth stage (time: ):

Referring to FIG. 4 and FIG. 14 , the first switch S _{1 is} not turned on, the second switch S _{2 is} turned on, the third switch S _{3 is} not turned on, the fourth switch S _{4 is} not turned on, the first diode D _{1 is} not turned on, and the second The diode D _{2 is} turned on, the third diode D _{3 is} turned on, the fourth diode D _{4 is} turned on, the first parasitic diode D _{S1 is} not turned on, the second parasitic diode D _{S2 is} not turned on, and the third parasitic The diode D _{S3 is} not turned on, and the fourth parasitic diode D _{S4 is} not turned on.

Fourth diode Switching to conduction, and commutating the current, the current flowing through the third diode Decreasing, flowing through the fourth diode Increment. At this time, the second step-down inductor is reflected from the secondary side to the magnetization inductance of the primary side and the second transformer And the first resonant inductor Third and fourth parasitic capacitance , Resonance, fourth parasitic capacitance voltage Resonance rise, third parasitic capacitance voltage Resonance drops when the third parasitic capacitor voltage Down to zero, the third parasitic diode When the transition is conductive, it enters the eleventh stage.

The eleventh stage (time: ):

Refer to FIG. 4 and FIG. 15, a first switch S ₁ is non-conducting, the second switch S ₂ is turned on, the third switch S ₃ is not turned on, the fourth switch S ₄ is not turned on, a first diode D ₁ is not turned on, the second The diode D _{2 is} turned on, the third diode D _{3 is} turned on, the fourth diode D _{4 is} turned on, the first parasitic diode D _{S1 is} not turned on, the second parasitic diode D _{S2 is} not turned on, and the third parasitic The diode D _{S3 is} turned on, and the fourth parasitic diode D _{S4 is} not turned on.

When the third parasitic capacitor voltage Resonance to zero, second switch Upper polarizer Conduction, third parasitic capacitor voltage Clamped to zero, so the third switch Switch to on to achieve zero voltage switching (ZVS) when the second switch Switch to non-conducting and proceed to the twelfth stage.

Twelfth stage (time: ):

Referring to FIG. 4 and FIG. 16, a first switch S ₁ is non-conducting, the second switch S ₂ is not turned on, the third switch S ₃ is turned on, the fourth switch S ₄ is not turned on, a first diode D ₁ is not turned on, the second The diode D _{2 is} turned on, the third diode D _{3 is} turned on, the fourth diode D _{4 is} turned on, the first parasitic diode D _{S1 is} not turned on, the second parasitic diode D _{S2 is} not turned on, and the third parasitic The diode D _{S3 is} not turned on, and the fourth parasitic diode D _{S4 is} not turned on.

Current from the magnetizing inductance of the first voltage device Second parasitic capacitance Linear charging, first parasitic capacitance Linear discharge, when the second parasitic capacitor voltage Charging to the same as the first coupling capacitor Voltage of the first diode Switching from non-conducting to conducting, it enters the thirteenth stage.

The thirteenth stage (time: ):

Referring to FIG. 4 and FIG. 17, a first switch S ₁ is non-conducting, the second switch S ₂ is not turned on, the third switch S ₃ is turned on, the fourth switch S ₄ is not turned on, a first diode D ₁ is turned on, the second two The polar body D _{2 is} turned on, the third diode D _{3 is} turned on, the fourth diode D _{4 is} turned on, the first parasitic diode D _{S1 is} not turned on, the second parasitic diode D _{S2 is} not turned on, and the third parasitic two The polar body D _{S3 is} not turned on, and the fourth parasitic diode D _{S4 is} not turned on.

This phase begins with the first diode Switch to conduction, current of the second diode Decrement, current of the first diode Increment. At this time, the first step-down inductor Lb1 is reflected from the secondary side to the primary side and is equivalently parallel to the magnetizing inductance. And the first resonant inductor First and second parasitic capacitance , Resonance, second parasitic capacitance voltage Resonance rise, first parasitic capacitance voltage Resonance drops when the first parasitic capacitor voltage Drop to zero, the first parasitic diode When the transition is conductive, it enters the fourteenth stage.

Fourteenth phase (time: ):

Referring to FIG. 4 and FIG. 18, a first switch S ₁ is turned on, the second switch S ₂ is not turned on, the third switch S ₃ is turned on, the fourth switch S ₄ is not turned on, a first diode D ₁ is turned on, the second diode The body D _{2 is} turned on, the third diode D _{3 is} turned on, the fourth diode D _{4 is} turned on, the first parasitic diode D _{S1 is} turned on, the second parasitic diode D _{S2 is} not turned on, and the third parasitic diode is turned on. D _{S3 is} not turned on, and the fourth parasitic diode D _{S4 is} not turned on.

When the first parasitic capacitor voltage Clamping to zero, the first switch S ₁ can be switched to conduct, achieving ZVS, first diode current Continuous rise, second step-down inductor current Continue to drop when the second step-down inductor current When falling to zero, the third diode Switch to non-conducting and enter the fifteenth stage.

The fifteenth stage (time: ):

Referring to FIG. 4 and FIG. 19, a first switch S ₁ is turned on, the second switch S ₂ is not turned on, the third switch S ₃ is turned on, the fourth switch S ₄ is not turned on, a first diode D ₁ is turned on, the second diode The body D _{2 is} turned on, the third diode D _{3 is} not turned on, the fourth diode D _{4 is} turned on, the first parasitic diode D _{S1 is} not turned on, the second parasitic diode D _{S2 is} not turned on, and the third parasitic two The polar body D _{S3 is} not turned on, and the fourth parasitic diode D _{S4 is} not turned on.

First step-down inductor current Continuous linear rise when rising to the first inductor current When they are the same, Second diode Switching to non-conducting enters the sixteenth stage.

Sixteenth stage (time: ):

Referring to FIG. 4 and FIG. 20, a first switch S ₁ is turned on, the second switch S ₂ is not turned on, the third switch S ₃ is turned on, the fourth switch S ₄ is not turned on, a first diode D ₁ is turned on, the second diode The body D _{2 is} turned on, the third diode D _{3 is} not turned on, the fourth diode D _{4 is} turned on, the first parasitic diode D _{S1 is} not turned on, the second parasitic diode D _{S2 is} not turned on, and the third parasitic two The polar body D _{S3 is} not turned on, and the fourth parasitic diode D _{S4 is} not turned on.

First inductance With the first step-down inductor Linear magnetization and second inductance Linear demagnetization, when the first switch Switching from conduction to non-conduction returns to the first phase of the next cycle.

As shown in Figure 21, the waveform of the first pulse wave signal, the input voltage and the output voltage, when the turn-on ratio When it meets the electrical specification output voltage Voltage conversion ratio formula for 24V, while in conventional converters When N=1 (N is the turns ratio) and D=0.47, the output voltage V _O is 94V, and the conventional buck converter obviously cannot be reduced to the specified electrical specifications.

As shown in Figure 22, the first and second inductor currents with Total output inductor current Waveform when When the output of the circuit is parallelized, the output current is distributed, and the current flowing through the first and second inductors L ₁ and L ₂ respectively is about 13.4A. And the first to fourth switches S ₁ -S ₄ are interleaved driving currents flowing through the first and second inductors L ₁ , L ₂ respectively versus Wave wave difference Can really reduce the output current Chopper .

As shown in Figure 23, it is the first step-down inductor current. With the first inductor current The waveform, as shown in Figure 24, is the second step-down inductor current And the second inductor current The waveform, the addition of the first and second step-down inductors L _b1 , L _b2 enables the converter to achieve a high step-down because when the first switch S _{1 is} switched on, the diode current on the secondary side begins to commutate. , the first step-down inductor current Start to rise, wait until the first step-down inductor current Equivalent to the current of the first inductor When the diode current on the secondary side is commutated, energy can be transferred to the load.

In summary, the above embodiment has the following advantages:

1. Low voltage conduction ratio: The first and second step-down inductors L _b1 and L _{b2 are used} to achieve a low voltage conduction ratio. It is not necessary to operate the conduction duty ratio to a minimum, and it is not necessary to use a transformer with a large turns ratio. The parasitic elements of the first and second transformers T ₁ , T ₂ reduce the surge of the converter.

2. Series input architecture: with input voltage sharing effect, suitable for high input voltage applications, and the voltage stress of all switches S ₁ ~ S ₄ is only the input voltage of the input voltage sharing half of the input voltage, so that the power switching element has low voltage stress For high voltage input applications.

3. Parallel output architecture: The output terminal is connected in parallel and has the effect of output current sharing. It is suitable for high output current applications, and can share half of the output current Io, and also distribute the power loss and thermal stress of the magnetic component and the semiconductor component. Suitable for high power and output low voltage and high current applications.

4. Switching interleaved conduction operation: the current flowing through the first and second inductors L ₁ , L ₂ has chopping cancellation performance, reducing the chopping of the output capacitor current, thereby reducing the output capacitance value and size, and optionally Smaller output filter components reduce converter volume and increase power density.

5. Zero voltage switching (ZVS): using the parasitic capacitance of the switches S ₁ to S ₄ , the first resonant inductor Lr and the leakage inductances of the first and second transformers T ₁ , T ₂ to form a resonance, so that the converter has zero voltage Switching performance, reducing switch switching losses and improving efficiency. At the same time, the switching frequency can be increased, the size of the energy storage component can be reduced, and on the other hand, the voltage surge caused by the leakage inductance can be avoided, and the switching element can be protected from high voltage stress, so that the object of the present invention can be achieved.

However, the above is only the embodiment of the present invention, and the scope of the invention is not limited thereto, and all the equivalent equivalent changes and modifications according to the scope of the patent application and the patent specification of the present invention are still The scope of the invention is covered.

C _I1 ‧‧‧first input capacitor

C _I2 ‧‧‧second input capacitor

S ₁ ‧‧‧first switch

S ₂ ‧‧‧second switch

S ₃ ‧‧‧third switch

S ₄ ‧‧‧fourth switch

CB1‧‧‧First Coupling Capacitor

CB2‧‧‧Second coupling capacitor

Lr‧‧‧First Resonance Inductance

T ₁ ‧‧‧First Transformer

T ₂ ‧‧‧second transformer

D ₁ ‧‧‧First Diode

D ₂ ‧‧‧Secondary

D ₃ ‧‧‧third diode

D ₄ ‧‧‧fourth dipole

L _b1 ‧‧‧First step-down inductor

L _b2 ‧‧‧second step-down inductor

3‧‧‧Output unit

L ₁ ‧‧‧first inductance

L ₂ ‧‧‧second inductance

C _O ‧‧‧ output capacitor

2‧‧‧Control unit

Vin‧‧‧Input voltage

Vo‧‧‧ output voltage

C1‧‧‧First parasitic capacitance

C2‧‧‧Second parasitic capacitance

C3‧‧‧ third parasitic capacitance

C4‧‧‧4th parasitic capacitance

D _S1 ‧‧‧First parasitic diode

D _S2 ‧‧‧Second parasitic diode

D _S3 ‧‧‧third parasitic diode

D _S4 ‧‧‧fourth parasitic diode

Other features and effects of the present invention will be apparent from the following description of the drawings, wherein: Figure 1 is a conventional buck converter; Figure 2 is one implementation of the high buck converter of the present invention. Figure 3 is an equivalent circuit diagram of the embodiment; Figure 4 is an operational timing diagram of the embodiment; Figure 5 is a circuit diagram of the operation of the first stage of the embodiment; Figure 6 is a circuit diagram of the embodiment Figure 7 is a circuit diagram of the operation of the embodiment in the third stage; Figure 8 is a circuit diagram of the operation of the embodiment in the fourth stage; Figure 9 is the operation of the embodiment in the fifth stage. FIG. 10 is a circuit diagram of the sixth stage of the embodiment; FIG. 11 is a circuit diagram of the seventh stage of the embodiment; FIG. 12 is a circuit diagram of the eighth stage of the embodiment; 13 is a circuit diagram of the embodiment operating in the ninth stage; FIG. 14 is a circuit diagram of the embodiment operating in the tenth stage; FIG. 15 is a circuit diagram of the embodiment operating in the eleventh stage; Example operates on the twelfth Figure 17 is a circuit diagram of the operation of the thirteenth stage of the embodiment; Figure 18 is a circuit diagram of the operation of the fourteenth stage of the embodiment; Figure 17 is a circuit diagram of the operation of the thirteenth stage of the embodiment; Figure 18 is a circuit diagram of the fourteenth stage of the embodiment; Figure 19 is a circuit diagram of the fifteenth stage of the embodiment; Figure 20 is a circuit diagram of the sixteenth stage of the embodiment. Figure 21 is a waveform diagram of the first pulse wave signal, the input voltage and the output voltage of the embodiment; Figure 22 is a waveform diagram of the first and second inductor currents and the total output inductor current of the embodiment; A waveform diagram of the first step-down inductor current and the first inductor current of the embodiment; and FIG. 24 is a waveform diagram of the second step-down inductor current and the second inductor current of the embodiment.

Claims (10)

A high buck converter includes: a first input capacitor and a second input capacitor connected in series, connected in parallel to an input power source for receiving an input voltage from the input power source to share a voltage across the input voltage a first switch and a second switch connected in series, in parallel with the first input capacitor, and the first switch is controlled to switch between conduction and non-conduction, the second switch is controlled between conduction and non-conduction Switching; a third switch and a fourth switch connected in series, in parallel with the second input capacitor, and the first switch is controlled to switch between conduction and non-conduction, the second switch is controlled between conduction and non-conduction Switching; the second switch and a common end of the third switch are electrically connected to a common end of the first input capacitor and the second input capacitor; a first coupling capacitor having an electrical connection between the first switch and the first a first end of a common end of the second switch, and a second end; a second coupling capacitor having a first end electrically connected to a common end of the third switch and the fourth switch, and a second end; First resonant inductor a first end and a second end electrically connected to the common end of the second switch and the third switch; a first transformer and a second transformer, each transformer having a primary side winding and a secondary side a winding, and each of the side windings has a first end and a second end, wherein the first end of the primary side winding of the first transformer is electrically connected to the second end of the first resonant inductor, the first transformer The second end of the primary side winding is electrically connected to the second end of the first coupling capacitor, and the first end of the primary side winding of the second transformer is electrically connected to the second end of the second coupling capacitor, the second transformer a second end of the primary side winding is electrically connected to the second end of the first resonant inductor; a first diode having an anode electrically connected to the first end of the secondary side winding of the first transformer, and a a second diode having an anode electrically connected to the second end of the secondary side winding of the first transformer, and a cathode; a first step-down inductor having an electrical connection to the first diode a first end of the cathode and an electrical connection a second end of the cathode of the polar body; a third diode having an anode electrically connected to the first end of the secondary side winding of the second transformer, and a cathode; a fourth diode having an electric a second end of the second side of the second transformer, and a cathode a second end of the cathode of the diode; and an output unit electrically connecting the first buck inductor and the second end of the second buck inductor for causing current from the first and second buck inductors Confluence and generate an output voltage. The high buck converter of claim 1, wherein the first and second transformers have equal turns ratios. The high buck converter of claim 1, wherein the first end of each secondary side winding is a striking end, and the second end of each secondary side winding is a non-tapping end, and the first end of each primary side winding It is the dot end, and the second end of each primary side winding is a non-tapping end. . The high buck converter of claim 1, wherein: the first switch has a first end electrically connected to the first end of the first coupling capacitor, and a second end electrically connected to a negative terminal of the input power source And a first parasitic capacitance electrically connected between the first end and the second end of the first switch; the second switch having a first end electrically connected to the first end of the first resonant inductor a second end of the first end of the first coupling capacitor, and a second parasitic capacitor electrically connected between the first end and the second end of the second switch; the third switch a first end electrically connected to the first end of the second coupling capacitor, a second end electrically connected to the first end of the first resonant inductor, and a third parasitic capacitor electrically connected to the third parasitic capacitor a first end of the third switch and a second end; the fourth switch has a first end electrically connected to the input power source, a second end electrically connected to the first end of the second coupling capacitor, and a fourth parasitic capacitor electrically connected to the first end of the fourth switch The second end of the room. The high buck converter of claim 4, wherein the first switch is an N-type power semiconductor transistor, and the first end of the first switch is a drain, and the second end of the first switch is Source. The high buck converter of claim 4, wherein the second switch is an N-type power semiconductor transistor, and the first end of the second switch is a drain, and the second end of the second switch is Source. The high buck converter of claim 4, wherein the third switch is an N-type power semiconductor transistor, and the first end of the second switch is a drain, and the second end of the second switch is Source. The high buck converter of claim 4, wherein the fourth switch is an N-type power semiconductor transistor, and the first end of the second switch is a drain, and the second end of the second switch is Source. The high buck converter of claim 4, further comprising a control unit, the control unit generates a first pulse signal for switching the first switch, a second pulse signal for switching the second switch, and a Switching a third pulse signal of the third switch and a fourth pulse signal for switching the fourth switch, the first pulse signal and the second pulse signal and the third pulse signal and the fourth pulse The wave signals have the same cycle time, and the first pulse wave signal does not overlap with a duty conduction period of the second pulse wave signal, and the third pulse wave signal does not overlap with a duty conduction period of the fourth pulse wave signal. The high buck converter of claim 1, wherein the output unit comprises: a first inductor having a first end electrically connected to the second end of the first buck inductor, and a second end; The second inductor has a first end electrically connected to the second end of the first buck inductor, and a second end electrically connected to the first end of the first inductor; and an output capacitor electrically connected to the first end The second end of the inductor and the anode of the second pole body are used to provide the output voltage.