TWI580167B - Single stage buck converter - Google Patents

Description

Single stage buck converter

The present invention relates to a power conversion technique, and more particularly to a single stage buck converter.

Conventional buck converters can use a single-stage architecture or a multi-stage architecture to convert a DC input voltage to a DC output voltage. Compared to multi-stage buck converters, single-stage buck converters offer higher conversion efficiency, simpler control logic, fewer components, and lower cost. For a single-stage buck converter, in order to reduce the output voltage, it is necessary to reduce the turn-on duty ratio of the switch in the single-stage buck converter or the turns ratio of the transformer in the single-stage buck converter (ie, the transformer The number of turns of the primary side winding is increased compared to the number of turns of the upper secondary winding.

However, reducing the turn-on duty ratio of the switch makes the single-stage buck converter difficult to perform closed-loop voltage regulation control, so that the output voltage cannot be regulated, and the switch utilization rate is low, which affects the overall conversion efficiency of the converter. In addition, increasing the turns ratio of the transformer will increase the parasitic components of the transformer, causing the signal waveform of the single-stage buck converter to generate a glitch, and the component selection requires a component with a large withstand voltage, resulting in a single-stage buck conversion. The cost of the device has risen. Therefore, there is still room for improvement in conventional buck converters.

Accordingly, it is an object of the present invention to provide a single stage buck converter that overcomes the shortcomings of the prior art.

Therefore, the single-stage buck converter of the present invention comprises a stacked input circuit, a first transformer, a second transformer, a first rectifying diode, a first step-down inductor, a second rectifying diode, A second step-down inductor and a parallel output circuit.

The spliced input circuit is adapted to receive a DC input voltage, and generate a first output voltage and a second output voltage according to the DC input voltage, the first and second output voltages being less than the DC input voltage.

The first transformer has a primary side winding electrically connected to the stacked input circuit to receive the first output voltage, and a primary side winding, each of the primary and secondary side windings having a first end and A second end.

The second transformer has a primary side winding electrically connected to the stacked input circuit to receive the second output voltage, and a primary side winding, each of the primary and secondary side windings of the second transformer having a first end and a second end, the first end of the primary side winding of the second transformer is electrically connected to the second end of the primary side winding of the first transformer.

The first rectifying diode has an anode electrically connected to the first end of the secondary side winding of the first transformer, and a cathode.

The first buck inductor has a first end electrically connected to the cathode of the first rectifying diode, and a second end outputting a first buck inductor current, the first buck inductor current is positively correlated with The voltage across the secondary side winding of the first transformer is reversed with respect to the inductance of the first step-down inductor.

The second rectifying diode has an anode electrically connected to the first end of the secondary side winding of the second transformer, and a cathode.

The second buck inductor has a first end electrically connected to the cathode of the second rectifying diode, and a second end outputting a second buck inductor current, the second buck inductor current being positively correlated The voltage across the secondary side winding of the second transformer is reversed with respect to the inductance of the second step-down inductor.

The parallel output circuit electrically connects the second ends of the first and second buck inductors to receive the first and second buck inductor currents, and electrically connect the first and second transformers The second ends of the secondary side windings, and generating a DC output voltage based on the first and second step-down inductor currents.

The effect of the present invention is that high voltage reduction is achieved by the first and second step-down inductors without increasing the turns ratio of the first and second transformers.

Referring to FIG. 1, an embodiment of the single-stage buck converter of the present invention is adapted to receive a DC input voltage Vin from a voltage source 1 and convert the DC input voltage Vin into a DC output voltage Vo, and is suitable for the DC output. The voltage Vo is output to a resistor R. The single-stage buck converter of this embodiment includes a stacked input circuit 2, a first transformer 3, a second transformer 4, a first rectifying diode D11, a first buck inductor Lb1, and a second The rectifier diode D21, a second step-down inductor Lb2, a parallel output circuit 5, and a control circuit 6.

The splicing input circuit 2 is adapted to electrically connect the voltage source 1 to receive the DC input voltage Vin, and further receive a first control signal Vgs1 and a second control signal Vgs2, and according to the DC input voltage Vin, the first And the second control signals Vgs1, Vgs2, generating a first output voltage V _P1 and a second output voltage V _P2 , wherein the first and second output voltages V _P1 , V _{P2 are} smaller than the DC input voltage Vin. In this embodiment, the splicing input circuit 2 has a first input terminal 21, a second input terminal 22, a first output terminal 23, a second output terminal 24, and a third output terminal 25, and includes A first switch S1, a second switch S2, a first input capacitor C1, a second input capacitor C2 and a resonant inductor Lr.

The first and second input terminals 21, 22 receive the DC input voltage Vin. The first and second output terminals 23, 24 output the first output voltage V _P1 . The second and third output terminals 24, 25 output the second output voltage V _P2 . The first switch S1 has a first end, a second end electrically connected to the second input end 22, and a control end receiving the first control signal Vgs1, so that the first switch S1 is based on the first control signal Vgs1 is turned on or off. The second switch S2 has a first end electrically connected to the first input end 21, a second end electrically connected to the first end of the first switch S1, and a control end receiving the second control signal Vgs2 Therefore, the second switch S2 is turned on or off according to the second control signal Vgs2. The first input capacitor C1 is electrically connected between the first end of the second switch S2 and the first output end 23. The second input capacitor C2 is electrically connected between the second end of the first switch S1 and the third output end 25. The resonant inductor Lr is electrically connected between the first end of the first switch S1 and the second output end 24. In this embodiment, the first and second switches S1 and S2 are each an N-type MOS field effect transistor, and the drain, source and gate of the N-type MOS field-effect transistor are respectively The first end, the second end, and the control end of each of the first and second switches S1, S2.

The first transformer 3 has a primary side winding 31 electrically connected to the first and second output terminals 23, 24 of the stacked input circuit 2 to receive the first output voltage V _P1 , and a primary side winding 32. Each of the primary and secondary side windings 31, 32 has a first end and a second end, and the first end and the second end of the primary side winding 31 are electrically connected to the stacked input circuit The first and second output ends 23, 24 of 2. The second transformer 4 has a primary side winding 41 electrically connected to the second and third output terminals 24, 25 of the stacked input circuit 2 to receive the second output voltage V _P2 , and a primary side winding 42. Each of the primary and secondary side windings 41, 42 has a first end and a second end, and the first end and the second end of the primary side winding 41 are electrically connected to the stacked input circuit The second and third output terminals 24, 25 of the second and fourth ends of the primary side winding 41 are also electrically connected to the second end of the primary side winding 31 of the first transformer 3. In the present embodiment, the first ends of the primary and secondary side windings 31, 41, 32, 42 are polar point ends, and the primary and secondary side windings 31, 41, 32, 42 The second end is a non-polar point end. In each of the first and second transformers 3, 4, a number N31 of the primary side winding 31 is equal to a number N32 of the secondary side winding 32, and a number of turns of the primary side winding 41 N41 is equal to a number N42 of the secondary side winding 42. The turns ratio n _{1 of} the first transformer 3 (i.e., n ₁ = N31 / N32) is equal to the turns ratio n _{2 of} the second transformer 4 (i.e., n ₂ = N41 / N42) and is equal to one (i.e., n ₁ = n ₂ =1).

The first rectifying diode D11 has an anode electrically connected to the first end of the secondary side winding 32 of the first transformer 3, and a cathode. The second rectifying diode D21 has an anode electrically connected to the first end of the secondary side winding 42 of the second transformer 4, and a cathode. The first buck inductor Lb1 having a first end electrically connected to the first rectifying diode D11 is the cathode, and a second output terminal of a first buck inductor current i ₁ of the first buck inductor The current i ₁ is positively related to the voltage across the secondary side winding 32 of the first transformer 3 and inverts the inductance value with respect to the first step-down inductor Lb1. The second step-down inductor Lb2 has a first end electrically connected to the cathode of the second rectifying diode D21, and a second end outputting a second step-down inductor current i ₂ , the second step-down inductor The current i ₂ is positively related to the voltage across the secondary side winding 42 of the second transformer 4 and inverts the inductance value with respect to the second step-down inductor Lb2.

The parallel output circuit 5 electrically connects the second ends of the first and second buck inductors Lb1, Lb2 to receive the first and second buck inductor currents i ₁ , i ₂ , and electrically connect the same The second ends of the secondary side windings 32, 42 of the first and second transformers 3, 4 are adapted to electrically connect the resistor R. The parallel output circuit 5 generates the DC output voltage Vo to the resistor R based on the first and second step-down inductor currents i ₁ , i ₂ . In this embodiment, the parallel output circuit 5 includes a first flywheel diode D12, a second flywheel diode D22, a first output inductor L1, a second output inductor L2, and an output capacitor Co.

The first flywheel diode D12 has an anode electrically connected to the second end of the secondary side winding 32 of the first transformer 3, and a cathode electrically connected to the second end of the first step-down inductor Lb1. The second flywheel diode D22 has an anode electrically connected to the second end of the secondary side winding 42 of the second transformer 4, and a cathode electrically connected to the second end of the second step-down inductor Lb2. The first output inductor L1 has a first end electrically connected to the second end of the first buck inductor Lb1, and a second end. The second output inductor L2 has a first end electrically connected to the second end of the second buck inductor Lb2, and a second end electrically connected to the second end of the first output inductor L1. The output capacitor Co has a first end electrically connected to the second end of the first output inductor L1, and a second end electrically connected to the anodes of the first and second flywheel diodes D12, D22, And the voltage across the output capacitor Co acts as the DC output voltage Vo.

The control circuit 6 generates the first and second control signals Vgs1, Vgs2, and outputs the first and second control signals Vgs1, Vgs2 to the first and second switches S1, S2, respectively. end.

Referring to FIG. 2, an equivalent circuit diagram of the present embodiment is used to illustrate a body diode D _S1 , D _S2 and a body of each of the first and second switches S1 and S2. Parasitic capacitances C _r1 , C _r2 are drawn, an imaginary first magnetizing inductance L _m1 for simulating the non-ideal characteristics of the first transformer 3 and an imaginary first leakage inductance L _lk1 are drawn for simulation An imaginary second magnetizing inductance L _m2 of the non-ideal characteristic of the second transformer 4 and an imaginary second leakage inductance L _lk2 are drawn, and the control circuit 6 (see Fig. 1) is not shown. Wherein, the parameters V _Cr1 and V _Cr2 are the cross-voltages of the two ends of the parasitic capacitances C _r1 and C _r2 , respectively, and the parameters V _C1 and V _C2 are the cross-pressures of the first and second input capacitors C1 and _C2 respectively. V _S1 is the cross-voltage of the two ends of the secondary side winding 32, the parameter V _S2 is the cross-voltage of the two ends of the secondary side winding 42 , and the parameters i _S1 and i _S2 respectively flow through the first and second switches S1 and S2 The current i, the parameter i _Lr is the current flowing through the resonant inductor Lr, and the parameters i _Lm1 and i _Lm2 are the currents flowing through the first and second magnetizing inductances L _m1 and L _m2 , respectively, and the parameters i _D11 and i _D21 respectively For the current flowing through the first and second rectifying diodes D11 and D21, the parameters i _Lb1 and i _Lb2 are currents flowing through the first and second step-down inductors Lb1 and Lb2, respectively, the parameter i _D12 , i _D22 is a current flowing through the first and second flywheel diodes D12 and D22, respectively, and parameters i _L1 and i _L2 are currents flowing through the first and second output inductors L1 and L2, respectively, parameter i _Lo is the sum of the currents flowing through the first and second output inductors L1, L2, and the parameter i _O is the total output current. _{Each of the} currents i _S1 , i _S2 , i _Lr , i _Lm1 , i _Lm2 , i _D11 , i _D21 , i _Lb1 , i _Lb2 , i _D12 , i _D22 , i _L1 , i _L2 , i _Lo , i _O The direction is indicated by a corresponding arrow and represents the preset current flow direction of the corresponding component.

Referring to FIG. 3, which is an operation timing diagram of the embodiment, the parameters Vgs1 and Vgs2 are the first and second control signals respectively, and the parameter Ts is the length of a switching period of the first control signal Vgs1, and the parameters V _Cr1 and V are The definitions of _Cr2 , i _Lm1 , i _Lm2 , i _Lr , i _Lb1 , i _Lb2 , i _L1 , i _L2 , i _Lo are the same as those in FIG. 2, and thus will not be described herein. It should be noted that, in this embodiment, each of the first and second control signals Vgs1, Vgs2 is in an active state (eg, a logic high level, and corresponds to the first and The corresponding ones of the second switches S1 and S2 are turned on) and an inactive state (for example, a logic low level, and corresponding to the corresponding ones of the first and second switches S1 and S2 of FIG. 1 are not turned on) Switch between. The first and second control signals Vgs1, Vgs2 have the same switching period (the length of which is Ts) and are alternately in the active state. When one of the first and second control signals Vgs1, Vgs2 is in the active state, the other of the first and second control signals Vgs1, Vgs2 is in the inactive state. The first control after switching from one of the first control signal Vgs1 and the second control signal Vgs2 to a predetermined dead time period (the length of which is Td) from each time point of the inactive state The other of the signal Vgs1 and the second control signal Vgs2 is switched to the active state.

Referring to FIGS. 3 through 15, the single-stage buck converter of the present embodiment operates cyclically in the first to twelfth stages. The circuit diagrams of Figures 4 to 15 are similar to those of Figure 2, except that in Figures 4 to 15, the conductive elements are drawn in solid lines, the non-conducting elements are drawn in dashed lines, and are thicker and arrowed. The solid line shows the actual current flow in the circuit. The following is a description of each stage.

The first stage (time point: t0~t1):

Referring to FIG. 3 and FIG. 4, the first and second switches S1 and S2 are not turned on, the body diodes D _S1 and D _{S2 are} not turned on, and the first rectifying diode D11 is turned on. The first flywheel 2 is The pole body D12 is not conducting, the second rectifier diode D21 is turned on, and the second flywheel diode D22 is turned on.

The second step-down inductor Lb2 is reflected to the primary side winding 41, and the second step-down inductor Lb2, the first and second leakage inductors L _lk1 , L _lk2 and the resonant inductor Lr and the parasitic capacitance C _r1 And C _r2 resonate, and the current i _Lm1 , i _Lm2 flowing through the first and second magnetizing inductances L _m1 , L _m2 , and the current i Lb1 flowing through the first step-down inductor _Lb1 and flowing through the first The current i _{L1 of the} output inductor L1 is regarded as a constant current. At this time, a current flowing through the resonant inductor Lr and flowing into the parasitic capacitance C _r1 (that is, a shunt of the current i _Lr , the current direction of the shunt is in the same direction as the current i _S1 ) charges the parasitic capacitance C _r1 . And flowing a current flowing through the resonant inductor Lr and flowing into the parasitic capacitance C _r2 (ie, another shunt of the current i _Lr , the current direction of the other shunt is opposite to the current i _S2 ) discharging the parasitic capacitance C _r2 , so that the parasitic capacitance C _r1 voltage across the two ends of V _Cr1 rises, and the parasitic capacitance C _r2 voltage across the two terminals of V _Cr2 decrease. When t=t1, the voltage across the two ends of the parasitic capacitance C _r2 V _Cr2 drops to V _Cr2 =V _C1 -(L _b1 n ₁ Vo)/L ₁ , and the parameters L _b1 and L ₁ are the first step-down inductors, respectively. The inductance value of Lb1 and the first output inductor L1 turns on the first flywheel diode D12. Then, enter the second stage.

The second stage (time point: t1~t2):

Referring to FIG. 3 and FIG. 5, the first and second switches S1 and S2 are not turned on, the body diodes D _S1 and D _{S2 are} not turned on, and the first rectifier diode D11 is turned on. The first flywheel 2 is turned on. The pole body D12 is turned on, the second rectifier diode D21 is turned on, and the second flywheel diode D22 is turned on.

The first step-down inductor Lb1 is reflected to the primary side winding 31, and the first step-down inductor Lb1, the first and second leakage inductors L _lk1 , L _{lk2 ,} and the resonant inductor Lr and the parasitic capacitance C _r1 , C _r2 resonance. At this time, the current flowing through the resonant inductor Lr and flowing into the parasitic capacitance C _r1 continues to charge the parasitic capacitance C _r1 , and the current flowing through the resonant inductor Lr and flowing into the parasitic capacitance C _r2 continues to the parasitic The capacitor C _r2 is discharged. When t=t2, the voltage across the two ends of the parasitic capacitance C _r2 V _Cr2 drops to zero, the body diode D _S2 becomes conductive, and the voltage across the two ends of the parasitic capacitance C _r2 V _{Cr2 is} clamped to zero. Then, enter the third stage.

The third stage (time point: t2~t3):

Referring to FIG. 3 and FIG. 6 , the first switch S1 is not turned on, the second switch S2 is turned on, the body diode D _{S1 is} not turned on, the body diode D _{S2 is} turned on, and the first rectifying diode D11 is turned on. The first flywheel diode D12 is turned on, the second rectifying diode D21 is turned on, and the second flywheel diode D22 is turned on.

Since the parasitic capacitance C _r2 voltage across the two ends of the clamp V _Cr2 zero, so that the parasitic capacitance C _r1 voltage across the two terminals of the DC V _Cr1 equal to the input voltage Vin (i.e., V _Cr1 = Vin). At this time, the second switch S2 is turned on to achieve Zero Voltage Switching (ZVS). In addition, the resonant inductor Lr starts to linearly release energy, that is, the current i _Lr flowing through the resonant inductor Lr starts to decrease linearly with a slope of -V _Lr /L _r , wherein the parameter V _{Lr is} the voltage across the resonant inductor Lr V _Lr = -(Vin-V _C1 + V _C2 /2)/[L _r +(L _b2 +L _lk2' )/2]<0, the parameters L _r , L _b2 , L _{lk2 '} are the resonant inductor Lr, the first The inductance value of the second step-down inductor Lb2 and the second drain inductor L _lk2 . At the same time, the current i _Lb1 flowing through the first step-down inductor Lb1 linearly decreases with a slope of -V _C1 /L _b1 , and the current i _Lb2 flowing through the second step-down inductor Lb2 has a slope (Vin-V _C2 )/L _{b2 .} Linearly rising, the current i _L1 flowing through the first output inductor L1 linearly decreases with a slope of -Vo/L ₁ , and the current i _L2 flowing through the second output inductor L2 linearly decreases with a slope of -Vo/L ₂ , parameter L _{2 is} the inductance value of the second output inductor L2. When t=t3, the current i _Lr flowing through the resonant inductor Lr linearly drops to zero, and the body diode D _S2 becomes non-conductive. Then, enter the fourth stage.

The fourth stage (time point: t3~t4):

Referring to FIG. 3 and FIG. 7 , the first switch S1 is not turned on, the second switch S2 is turned on, the body diodes D _S1 and D _{S2 are} not turned on, and the first rectifying diode D11 is turned on. The first flywheel is turned on. The diode D12 is turned on, the second rectifying diode D21 is turned on, and the second flywheel diode D22 is turned on.

The fourth stage is similar to the operation of the third stage. The current i _Lr flowing through the resonant inductor Lr continuously decreases linearly to a negative value, and the current i _Lb1 flowing through the first step-down inductor Lb1 flows through the first output inductor L1. The current i _L1 and the current i _L2 flowing through the second output inductor _L2 continue to decrease linearly. The current i _Lb2 flowing through the second step-down inductor _Lb2 continues to rise linearly. When t=t4, the current i _{Lb2 of} the second step-down inductor Lb2 is the same as the current i _{L2 of} the second output inductor L2. At this time, the second flywheel diode D22 becomes non-conductive. Then, enter the fifth stage.

The fifth stage (time point: t4~t5):

Referring to FIG. 3 and FIG. 8 , the first switch S1 is not turned on, the second switch S2 is turned on, the body diodes D _S1 and D _{S2 are} not turned on, and the first rectifying diode D11 is turned on. The first flywheel is turned on. The diode D12 is turned on, the second rectifying diode D21 is turned on, and the second flywheel diode D22 is not turned on.

At this time, the current i _Lb1 flowing through the first step-down inductor Lb1 and the current i L1 flowing through the first output inductor _L1 continue to linearly decrease. L2 is a current flowing through the second inductor Lb2 down _Lb2 current I flowing through the second output inductor _L2 I slope _{(Vin-V C2 -Vo) /} (L b2 + L 2) increases linearly with (i.e., the The second step-down inductor Lb2 and the second output inductor L2 are in a state of storing energy). When t=t5, the current i _Lb1 flowing through the first step-down inductor Lb1 falls to zero, and the first rectifying diode D11 becomes non-conductive. Then, enter the sixth stage.

The sixth stage (time point: t5~t6):

Referring to FIG. 3 and FIG. 9 , the first switch S1 is not turned on, the second switch S2 is turned on, the body diodes D _S1 and D _{S2 are} not turned on, and the first rectifying diode D11 is not turned on. The flywheel diode D12 is turned on, the second rectifying diode D21 is turned on, and the second flywheel diode D22 is not turned on.

The first step-down inductor Lb1 stops releasing energy. The current i _L1 flowing through the first output inductor _L1 continues to decrease linearly. The current i _Lb2 flowing through the second step-down inductor Lb2 and the current i L2 flowing through the second output inductor _L2 continue to rise linearly. When t=t6, the second switch S2 is switched from conductive to non-conductive. Then, enter the seventh stage.

The seventh stage (time point: t6~t7):

Referring to FIG. 3 and FIG. 10, the first and second switches S1 and S2 are not turned on, the body diodes D _S1 and D _{S2 are} not turned on, and the first rectifying diode D11 is turned on. The first flywheel 2 is turned on. The pole body D12 is turned on, the second rectifier diode D21 is turned on, and the second flywheel diode D22 is not turned on.

The first step-down inductor Lb1 is reflected to the primary side winding 31, and the first step-down inductor Lb1, the first and second leakage inductors L _lk1 , L _{lk2 ,} and the resonant inductor Lr and the parasitic capacitance C _r1 And C _r2 resonate, and currents i _Lm1 , i _Lm2 flowing through the first and second magnetizing inductances L _m1 , L _m2 , and current i Lb2 flowing through the second step-down inductor _Lb2 and flowing through the first The current i _{L1 of the} output inductor L1 is regarded as a constant current. At this time, a current flowing through the parasitic capacitance C _r1 and flowing into the resonant inductor Lr (the current direction thereof is opposite to the current i _S1 ) discharges the parasitic capacitance C _r1 and flows through the parasitic capacitance C _r2 and flows into the resonant inductor Lr is a current (which is the current direction of the current i _S2 in the same direction) of the parasitic capacitance C _r2 charged, so that the parasitic capacitance C _R1 ends of the cross voltage V _Cr1 decreased, and the parasitic capacitance C voltage across _r2 two ends V _Cr2 rises. When t=t7, the voltage V _{Cr1 at} both ends of the parasitic capacitance C _r1 drops to V _Cr1 =V _C2 -(L _b2 n ₂ Vo)/L ₂ , and the second flywheel diode D22 becomes conductive. Then, enter the eighth stage.

The eighth stage (time point: t7~t8):

Referring to FIG. 3 and FIG. 11 , the first and second switches S1 and S2 are not turned on, the body diodes D _S1 and D _{S2 are} not turned on, and the first rectifying diode D11 is turned on. The first flywheel 2 is turned on. The pole body D12 is turned on, the second rectifier diode D21 is turned on, and the second flywheel diode D22 is turned on.

The second step-down inductor Lb2 is reflected to the primary side winding 41, and the second step-down inductor Lb2, the first and second leakage inductors L _lk1 , L _lk2 and the resonant inductor Lr and the parasitic capacitance C _r1 , C _r2 resonance. At this time, the current flowing through the parasitic capacitance C _r1 continues to discharge the parasitic capacitance C _r1 , and the current flowing through the parasitic capacitance C _r2 continues to charge the parasitic capacitance C _r2 . When t=t8, the voltage across the two ends of the parasitic capacitance C _r1 V _Cr1 drops to zero, the body diode D _S1 becomes conductive, and the voltage across the two ends of the parasitic capacitance C _r1 V _{Cr1 is} clamped to zero. Then, enter the ninth stage.

The ninth stage (time point: t8~t9):

Referring to FIG. 3 and FIG. 12, the first switch S1 is turned on, the second switch S2 is not turned on, the body diode D _{S1 is} turned on, the body diode D _{S2 is} not turned on, and the first rectifying diode D11 is turned on. The first flywheel diode D12 is turned on, the second rectifying diode D21 is turned on, and the second flywheel diode D22 is turned on.

Since the voltage across the two ends of the parasitic capacitance C _r1 V _{Cr1 is} clamped at zero, the voltage across the two ends of the parasitic capacitance C _r2 V _Cr2 is equal to the DC input voltage Vin (ie, V _Cr2 =Vin). At this time, the first switch S1 is turned on to achieve zero voltage switching ZVS. In addition, the resonant inductor Lr starts to store energy linearly, that is, the current i _Lr flowing through the resonant inductor Lr starts to rise linearly with the slope V _Lr /L _r , and the transposition voltage V _{Lr of} the resonant inductor Lr is (Vin-V _C2 + V _C1 /2) L _r /[L _r +(L _b1 +L _lk1' )/2]>0, the parameter L _{lk1 ' is} the inductance value of the first leakage inductance L _lk1 . At the same time, the current i _Lb1 flowing through the first step-down inductor Lb1 linearly rises with a slope (Vin−V _C1 )/L _b1 , and the current i _Lb2 flowing through the second step-down inductor Lb2 has a slope of −V _C2 /L _{b2 .} Linearly decreasing, the current i _L1 flowing through the first output inductor L1 linearly decreases with a slope of -Vo/L ₁ , and the current i _L2 flowing through the second output inductor L2 linearly decreases with a slope of -Vo/L ₂ . When t=t9, the current i _Lr flowing through the resonant inductor Lr linearly rises to zero, and at this time, the body diode D _S1 becomes non-conductive. Then, enter the tenth stage.

The tenth stage (time point: t9~t10):

Referring to FIG. 3 and FIG. 13 , the first switch S1 is turned on, the second switch S2 is not turned on, the body diodes D _S1 and D _{S2 are} not turned on, and the first rectifying diode D11 is turned on. The first flywheel is turned on. The diode D12 is turned on, the second rectifying diode D21 is turned on, and the second flywheel diode D22 is turned on.

Similarly to the operation of the ninth stage, the current i _Lr flowing through the resonant inductor Lr continues to rise linearly to a positive value, and the current i _Lb1 flowing through the first step-down inductor _Lb1 continues to rise linearly. The current i _Lb2 flowing through the second step-down inductor Lb2, the current i L1 flowing through the first output inductor L1, and the current i _L2 flowing through the second output inductor _L2 continue to linearly decrease. When t=t10, the current i _{Lb1 of} the first step-down inductor Lb1 is the same as the current i _{L1 of} the first output inductor L1. At this time, the first flywheel diode D12 becomes non-conductive. Then, enter the eleventh stage.

The eleventh stage (time point: t10~t11):

Referring to FIG. 3 and FIG. 14 , the first switch S1 is turned on, the second switch S2 is not turned on, the body diodes D _S1 and D _{S2 are} not turned on, and the first rectifying diode D11 is turned on. The first flywheel is turned on. The diode D12 is not turned on, the second rectifying diode D21 is turned on, and the second flywheel diode D22 is turned on.

At this time, the current i _Lb2 flowing through the second step-down inductor Lb2 and the current i L2 flowing through the second output inductor _L2 continue to linearly decrease. Flowing through the first buck inductor Lb1 _Lb1 current I flowing through the first output current I _L1 of inductor L1 slope _{(Vin- V C1 -Vo) / (} L b1 + L 1) increases linearly with (i.e., the The first step-down inductor Lb1 and the first output inductor L1 are in a state of storing energy). When t=t11, the current i _Lb2 flowing through the second step-down inductor Lb2 falls to zero, and the second rectifying diode D21 becomes non-conductive. Then, enter the twelfth stage.

The twelfth stage (time point: t11~t12):

Referring to FIG. 3 and FIG. 15 , the first switch S1 is turned on, the second switch S2 is not turned on, the body diodes D _S1 and D _{S2 are} not turned on, and the first rectifying diode D11 is turned on. The first flywheel is turned on. The diode D12 is not turned on, the second rectifying diode D21 is not turned on, and the second flywheel diode D22 is turned on.

The second step-down inductor Lb2 stops releasing energy. The current i _Lb1 flowing through the first step-down inductor Lb1 and the current i L1 flowing through the first output inductor _L1 continue to rise linearly, and the current i _L2 flowing through the second output inductor _L2 continues to decrease linearly. When t=t12, the first switch S1 is switched from on to off, and returns to the first stage.

The circuit electrical specifications and component parameters of the single-stage buck converter of this embodiment are shown in Table 1. The component design uses the circuit action analysis derivation formula and is supplemented by the IsSpice simulation trial and error method. Table 1 :  <TABLE border="1" borderColor="#000000" width="_0020"><TBODY><tr><td> DC input voltage Vin </td><td> 400V </td><td> First and The second transformer turns ratio n₁, n₂</td><td> 1 </td></tr><tr><td> DC output voltage Vo </td><td> 48V </td><td> first and second magnetizing inductances L_m1, L_m2</td><td>< Img wi="125" he="24" file="02_image001.jpg" img-format="jpg"></img></td></tr><tr><td> Output Power</td> <td> 150~750 W </td><td> First and second leakage inductances L_lk1, L_lk2</td><td><img wi ="52" he="24" file="02_image003.jpg" img-format="jpg"></img></td></tr><tr><td> First and second input capacitors C1 , C2 </td><td><img wi="45" he="24" file="02_image005.jpg" img-format="jpg"></img></td><td> Resonance Inductance Lr </td><td><img wi="63" he="24" file="02_image007.jpg" img-format="jpg"></img></td></tr><tr>< Td> first and second output inductors L1, L2 </td><td><img wi="59" he="24" file="02_image009.jpg" img-format="jpg"></img> </td><td> Switching frequency</td><td> 100kHz </td></tr><tr ><td> First and second step-down inductors Lb1, Lb2 </td><td><img wi="63" he="24" file="02_image011.jpg" img-format="jpg">< /img></td><td> Output Capacitance Co </td><td><img wi="56" he="24" file="02_image013.jpg" img-format="jpg"></img ></td></tr></TBODY></TABLE>

Experimental simulation:

Referring to FIG. 16, a waveform diagram of the first control signal Vgs1, the DC input voltage Vin, and the DC output voltage Vo is shown. The duty-conducting ratio of the first switch S1 The DC output voltage Vo is 48V. It can be seen from the simulation results that the DC output voltage Vo outputted by the single-stage buck converter of the present embodiment can be lowered to a predetermined electrical specification.

Referring to FIG. 17 and FIG. 18, FIG. 17 is a waveform diagram of the first control signal Vgs1 and a voltage Vds1 between the source and the source of the first switch S1, and FIG. 18 is the second control signal Vgs2 and the second switch. A waveform diagram of a cross-over voltage Vds2 between the source and the source of S2. It can be seen from FIG. 17 that after the voltage across the first switch S1 drops to zero, the first control signal Vgs1 is switched to a logic high level, thereby causing the first switch S1 to achieve the soft switching performance of the zero voltage switching ZVS. As can be seen from FIG. 18, after the voltage across the second switch S2 drops to zero, the second control signal Vgs2 is switched to a logic high level, thereby enabling the second switch S2 to achieve the soft switching performance of the zero voltage switching ZVS. In addition, as can be seen from FIG. 17 and FIG. 18, the voltage stress of the first and second switches S1 and S2 is equal to the DC input voltage Vin (equal to 400 V), which is suitable for high voltage input applications.

Referring to FIG. 19, the first control signal Vgs1, the sum i _Lo of currents flowing through the first and second output inductors L1, L2, and the first and second output inductors L1, L2 flowing through the first and second output inductors L1, L2 Waveforms of currents i _L1 and i _L2 . Since the single-stage buck converter of the present embodiment adopts an output parallel architecture, the total output current i _O is equal to the current i _Lo , and the current i _Lo = i _L1 +i _L2 , that is, the first and second outputs Inductors L1 and L2 can share the output current (ie, current i _Lo ), so that the output current has chopped cancellation performance and can reduce the chopping of the output current.

Referring to FIG. 20 and FIG. 21, FIG. 20 is a waveform diagram of the first control signal Vgs1, currents i _Lb1 and i _L1 flowing through the first buck inductor Lb1 and the first output inductor L1, and FIG. 21 is the second A waveform diagram of the control signal Vgs2, the currents i _Lb2 , i _L2 flowing through the second buck inductor Lb2 and the second output inductor L2. The single-stage buck converter of this embodiment can achieve high buck voltage by the first and second buck inductors Lb1, Lb2. When the first switch S1 is turned on, the first flywheel diode D12 is continuously turned on, and the current i _Lb1 flowing through the first buck inductor _Lb1 starts to rise, and has to wait until flowing through the first buck inductor. The current i _{Lb1 of Lb1} is equal to the current i _L1 flowing through the first output inductor L1 (ie, i _Lb1 =i _L1 ), and when the first flywheel diode D12 becomes non-conducting, energy can be transmitted to the load (ie, the resistance) R), similarly, when the second switch S2 is switched to be on, the current i _Lb2 flowing through the second step-down inductor Lb2 is also equal to the current i _L2 flowing through the second output inductor _L2 (ie, i _Lb2 =i _L2 ), and when the second flywheel diode D22 becomes non-conducting, energy can be transferred to the load. Therefore, the conduction ratio D1, D2 of the actual operation of the single-stage buck converter of the embodiment (ie, D1=t _s1 /Ts, the parameter t _{s1 is} the current flowing through the first step-down inductor Lb1 in the switching period Ts) _Lb1 is equal to the time of current i _L1 flowing through the first output inductor L1, D2=t _s2 /Ts, and the parameter t _{s2 is} the current i _Lb2 flowing through the second step-down inductor Lb2 in the switching period Ts is equal to flowing through the first The time of the current i _L2 of the two output inductors L2 is smaller than the duty conduction ratios Ds1 and Ds2 of the first and second switches S1 and S2, respectively (ie, Ds1=t _s3 /Ts, and the parameter t _{s3 is in} the switching period Ts) The time when the first switch S1 is turned on, Ds2=t _s4 /Ts, and the parameter t _{s4 is} the time when the second switch S2 is turned on in the switching period Ts), so that the single-stage buck converter of the embodiment reaches the high buck. performance.

In summary, the above embodiment of the embodiment has the following advantages:

1. The first and second buck inductors Lb1, Lb2, the conduction ratios D1, D2 of the single-stage buck converter of the present embodiment are respectively smaller than the first and second switches S1, S2. The responsibility is turned on than Ds1, Ds2, thereby achieving high buck characteristics. Therefore, the single-stage buck converter of the present embodiment does not need to reduce the turn-on duty ratio of the switch in the conventional single-stage buck converter or the turns ratio of the transformer (ie, the primary side winding of the transformer) as in the prior art. The number of turns is higher than the number of turns of the secondary side winding).

2. The first and second step-down inductors Lb1, Lb2 reach a high step-down such that the first and second transformers 3, 4 have a turns ratio of one (n ₁ = n ₂ =1), Therefore, the parasitic elements of the first and second transformers 3 and 4 are reduced, and the surge generated when the first and second switches S1 and S2 are switched can be effectively suppressed, and the single-stage step-down conversion of the embodiment is performed. The device can select components with lower withstand voltage in component selection, thereby reducing the cost of the single-stage buck converter of the embodiment.

3. Resonance of the first and second buck inductors Lb1, Lb2, the first and second leakage inductances L _lk1 , L _{lk2 ,} and the resonant inductor Lr with the parasitic capacitances C _r1 , C _r2 The circuit design enables the first and second switches S1, S2 to achieve the soft cutting performance of the zero voltage switching ZVS. Therefore, the switching loss of the switch can be reduced, and the conversion efficiency of the single-stage buck converter of the embodiment can be improved.

4. Since the first and second switches S1 and S2 are stacked and connected to the input structure, the voltage stress of each of the first and second switches S1 and S2 can be maintained equal to the DC input voltage Vin, which is suitable for high voltage input applications. .

5. Since the single-stage buck converter of the present embodiment adopts an output parallel architecture, the output current i _Lo is equal to the sum of the currents i _L1 and i _L2 flowing through the first and second output inductors L1 and L2, so that the The first and second output inductors L1 and L2 can share the output current, and the currents i _L1 and i _{L2 of the} first and second output inductors L1 and L2 are combined to make the output current have chopping cancellation performance. Reduce the ripple of the output current. Therefore, the capacitance value of the output capacitor Co and its size can be reduced, so that the smaller output capacitor Co can be selected, thereby reducing the overall circuit volume and increasing the power density. In addition, by distributing the output currents by the first and second output inductors L1 and L2, the conduction loss of the magnetic element and the semiconductor element can be further reduced, and the utility model is suitable for high power and output low voltage and high current applications.

However, the above is only the embodiment of the present invention, and the scope of the invention is not limited thereto, and all the simple equivalent changes and modifications according to the scope of the patent application and the patent specification of the present invention are still Within the scope of the invention patent.

1‧‧‧voltage source

2‧‧‧Stacked input circuit

21‧‧‧ first input

22‧‧‧second input

23‧‧‧ first output

24‧‧‧second output

25‧‧‧ third output

3‧‧‧First transformer

31‧‧‧Primary winding

32‧‧‧Secondary side winding

4‧‧‧Second transformer

41‧‧‧Primary winding

42‧‧‧Secondary side winding

5‧‧‧ parallel output circuit

6‧‧‧Control circuit

C1‧‧‧first input capacitor

C2‧‧‧second input capacitor

Co‧‧‧ output capacitor

C _r1 ‧‧‧ parasitic capacitance

C _r2 ‧‧‧ parasitic capacitance

D _S1 ‧‧‧ body diode

D _S2 ‧‧‧ body diode

D11‧‧‧First Rectifier Diode

D12‧‧‧First flywheel diode

D21‧‧‧Secondary rectifier diode

D22‧‧‧Second flywheel diode

i _S1 ‧‧‧current flowing through the first switch

i _S2 ‧‧‧current flowing through the second switch

i _Lr ‧‧‧current flowing through the resonant inductor

i _Lm1 ‧‧‧current flowing through the first magnetizing inductor

i _Lm2 ‧‧‧current flowing through the second magnetizing inductor

i _D11 ‧‧‧current flowing through the first rectifying diode

i _D21 ‧‧‧current flowing through the second rectifying diode

i _Lb1 ‧‧‧current flowing through the first step-down inductor

i _Lb2 ‧‧‧current flowing through the second step-down inductor

i _D12 ‧‧‧current flowing through the first flywheel diode

i _D22 ‧‧‧second flywheel diode current

i _L1 ‧‧‧current flowing through the first output inductor

i _L2 ‧‧‧current flowing through the second output inductor

i _Lo ‧‧‧The sum of the currents flowing through the first and second output inductors

i _o ‧‧‧ total output current

i ₁ ‧‧‧First step-down inductor current

Lb1‧‧‧ first step-down inductor

Lb2‧‧‧Second step-down inductor

Lr‧‧‧Resonance Inductance

L _m1 ‧‧‧first magnetizing inductance

L _{1k1 ‧‧‧First} leakage inductance

L _m2 ‧‧‧second magnetizing inductance

L _{1k2 ‧‧‧Second} leakage inductance

R‧‧‧resistance

S1‧‧‧ first switch

S2‧‧‧ second switch

t‧‧‧Time

T0~t12‧‧‧ time point

Length of Ts‧‧‧ switching cycle

Td‧‧‧Predetermined length of dead zone

Vin‧‧‧DC input voltage

i ₂ ‧‧‧second step-down inductor current

L1‧‧‧first output inductor

L2‧‧‧second output inductor

Vo‧‧‧DC output voltage

Vgs1‧‧‧ first control signal

Vgs2‧‧‧ second control signal

Cross-voltage of V _Cr1 ‧‧‧ parasitic capacitance

Cross-voltage of V _Cr2 ‧‧‧ parasitic capacitance

V _C1 ‧‧‧cross-voltage of the first input capacitor

V _C2 ‧‧‧cross-voltage of the second input capacitor

V _P1 ‧‧‧first output voltage

V _S1 ‧‧‧cross-voltage of the secondary winding of the first transformer

V _P2 ‧‧‧second output voltage

V _S2 ‧‧‧cross-voltage of the secondary winding of the second transformer

Other features and advantages of the present invention will be apparent from the embodiments of the present invention, wherein: Figure 1 is a circuit diagram illustrating one embodiment of a single stage buck converter of the present invention; BRIEF DESCRIPTION OF THE DRAWINGS FIG. 3 is a timing chart illustrating the operation of the embodiment; FIGS. 4 to 15 are equivalent circuit diagrams illustrating the operation of the embodiment in the first to twelfth stages, respectively; Is a waveform diagram illustrating a first control signal, a DC input voltage, and a DC output voltage of the embodiment; FIG. 17 is a waveform diagram illustrating the first control signal and a first switch of the embodiment. FIG. 18 is a waveform diagram illustrating a second control signal of the embodiment and a voltage across the source and the drain of a second switch; FIG. 19 is a waveform diagram illustrating the implementation. The first control signal, the sum of currents flowing through the first and second output inductors, and the current flowing through the first and second output inductors; FIG. 20 is a waveform diagram illustrating the embodiment The first control signal flows through a first step-down The current of the inductor and the current flowing through the first output inductor; and FIG. 21 is a waveform diagram illustrating the second control signal of the embodiment, the current flowing through a second step-down inductor, and flowing through the The current of the two output inductors.

1‧‧‧voltage source

2‧‧‧Stacked input circuit

21‧‧‧ first input

22‧‧‧second input

23‧‧‧ first output

24‧‧‧second output

25‧‧‧ third output

3‧‧‧First transformer

31‧‧‧Primary winding

32‧‧‧Secondary side winding

4‧‧‧Second transformer

41‧‧‧Primary winding

42‧‧‧Secondary side winding

5‧‧‧ parallel output circuit

6‧‧‧Control circuit

C1‧‧‧first input capacitor

C2‧‧‧second input capacitor

Co‧‧‧ output capacitor

D11‧‧‧First Rectifier Diode

D12‧‧‧First flywheel diode

D21‧‧‧Secondary rectifier diode

D22‧‧‧Second flywheel diode

i ₁ ‧‧‧First step-down inductor current

i ₂ ‧‧‧second step-down inductor current

L1‧‧‧first output inductor

L2‧‧‧second output inductor

Lb1‧‧‧ first step-down inductor

Lb2‧‧‧Second step-down inductor

Lr‧‧‧Resonance Inductance

R‧‧‧resistance

S1‧‧‧ first switch

S2‧‧‧ second switch

Vin‧‧‧DC input voltage

Vo‧‧‧DC output voltage

Vgs1‧‧‧ first control signal

Vgs2‧‧‧ second control signal

V _P1 ‧‧‧first output voltage

V _P2 ‧‧‧second output voltage

Claims (10)

A single-stage buck converter includes: a stacked input circuit adapted to receive a DC input voltage, and generate a first output voltage and a second output voltage according to the DC input voltage, the first and second The output voltage is less than the DC input voltage; a first transformer having a primary side winding electrically connected to the stacked input circuit to receive the first output voltage, and a primary side winding in the primary and secondary windings Each has a first end and a second end; a second transformer having a primary side winding electrically connected to the stacked input circuit to receive the second output voltage, and a primary side winding, the second transformer Each of the primary and secondary side windings has a first end and a second end, the first end of the primary side winding of the second transformer electrically connecting the primary side winding of the first transformer The second rectifier; a first rectifying diode having an anode electrically connected to the first end of the secondary side winding of the first transformer, and a cathode; a first step-down inductor having an electric Connect this a first end of the cathode of the rectifying diode, and a second end outputting a first step-down inductor current, the first buck inductor current being positively related to the cross of the secondary side winding of the first transformer Pressurizing and inverting the inductance value of the first step-down inductor; a second rectifying diode having an anode electrically connected to the first end of the second side winding of the second transformer, and a cathode; a second step-down inductor having a first end electrically connected to the cathode of the second rectifying diode and a second end outputting a second step-down inductor current, the second buck inductor current being positively correlated a voltage across the secondary side winding of the second transformer, and inverting an inductance value of the second step-down inductor; and a parallel output circuit electrically connecting the first and second step-down inductors The second end receives the first and second step-down inductor currents, and electrically connects the second ends of the secondary side windings of the first and second transformers, and according to the first and the second The two buck inductor currents produce a DC output voltage. The single-stage buck converter of claim 1, wherein the parallel output circuit comprises: a first flywheel diode having an anode electrically connected to the second end of the secondary side winding of the first transformer And a cathode electrically connected to the second end of the first step-down inductor; a second flywheel diode having an anode electrically connected to the second end of the secondary side winding of the second transformer, and an electric a cathode connected to the second end of the second step-down inductor; a first output inductor having a first end electrically connected to the second end of the first buck inductor, and a second end; a second output inductor a first end electrically connected to the second end of the second buck inductor, and a second end electrically connected to the second end of the first output inductor; and an output capacitor having an electrical connection a first end of the second end of the output inductor, and a second end of the anode electrically connected to the first and second flywheel diodes, the voltage across the output capacitor is the DC output voltage. The single-stage buck converter of claim 2, wherein the splicing input circuit further receives a first control signal and a second control signal, and further generates the first and second control signals according to the first and second control signals. Waiting for the first and second output voltages, each of the first and second control signals is switched between an active state and an inactive state, and the stacked input circuit has: a first input terminal and a second input end, the first and second input terminals receive the DC input voltage; and a first output end, a second output end, and a third output end, the first and second output ends output The first output voltage, the second and third output terminals output the second output voltage. The single-stage buck converter of claim 3, wherein the spliced input circuit comprises: a first switch having a first end, a second end electrically connected to the second input end, and a receiving a control end of the first control signal, such that the first switch is turned on or off according to the first control signal; a second switch having a first end electrically connected to the first input end, and an electrical connection to the first switch a second end of the first end, and a control end receiving the second control signal, such that the second switch is turned on or off according to the second control signal; a first input capacitor is electrically connected to the first a first input capacitor is electrically connected between the second end of the first switch and the third output terminal; and a resonant inductor is electrically connected Between the first end of the first switch and the second output. The single-stage buck converter of claim 4, wherein the first switch and the second switch are each an N-type MOS field effect transistor. The single-stage buck converter of claim 3, further comprising a control circuit that generates the first and second control signals. The single-stage buck converter of claim 3, wherein the first and second control signals have the same switching period and are alternately in the active state, in the first and second control signals When the one is in the active state, the other of the first and second control signals is in the inactive state. The single-stage buck converter of claim 7, wherein a predetermined dead time is started at each time point of switching from one of the first control signal and the second control signal to the inactive state After the zone period, the other of the first control signal and the second control signal is switched to the active state. The single-stage buck converter of claim 1, wherein in each of the first and second transformers, the number of turns of the primary side winding is equal to the number of turns of the secondary side winding. The single-stage buck converter of claim 1, wherein, in each of the first and second transformers, the first ends of the primary and secondary side windings are polar point ends, The second ends of the primary and secondary side windings are non-polar point ends.