TWI569565B - Staggered high boost DC converter - Google Patents

Staggered high boost DC converter Download PDF

Info

Publication number
TWI569565B
TWI569565B TW105106061A TW105106061A TWI569565B TW I569565 B TWI569565 B TW I569565B TW 105106061 A TW105106061 A TW 105106061A TW 105106061 A TW105106061 A TW 105106061A TW I569565 B TWI569565 B TW I569565B
Authority
TW
Taiwan
Prior art keywords
switch
diode
voltage
secondary side
side winding
Prior art date
Application number
TW105106061A
Other languages
Chinese (zh)
Other versions
TW201733255A (en
Inventor
陳信助
楊松霈
林川凱
Original Assignee
崑山科技大學
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 崑山科技大學 filed Critical 崑山科技大學
Priority to TW105106061A priority Critical patent/TWI569565B/en
Application granted granted Critical
Publication of TWI569565B publication Critical patent/TWI569565B/en
Publication of TW201733255A publication Critical patent/TW201733255A/en

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Description

交錯式高升壓直流轉換器 Interleaved high boost DC converter

本發明是有關於一種升壓轉換器,特別是指一種交錯式高升壓直流轉換器。The present invention relates to a boost converter, and more particularly to an interleaved high boost DC converter.

參閱圖1,一種習知的升壓轉換器,當不考慮電感L上的寄生電阻RL時,其電壓增益M如式一,其中,參數V O、V in、D分別為輸出電壓、輸入電壓、開關的責任導通比。 Referring to FIG. 1, a conventional boost converter, when the parasitic resistance RL on the inductor L is not considered, its voltage gain M is as shown in Equation 1, where the parameters V O , V in , and D are output voltage and input voltage, respectively. , the responsibility of the switch to conduct ratio.

…式一 Formula 1

若考慮寄生電阻R L對電壓增益M的影響時,則其電壓增益M如式二,其中,參數R O為負載的電阻,且參閱圖2,為習知的升壓轉換器的電壓增益對導通比的關係曲線。 Considering the influence of the parasitic resistance R L on the voltage gain M, the voltage gain M is as shown in Equation 2, wherein the parameter R O is the resistance of the load, and referring to FIG. 2, is a voltage gain pair of a conventional boost converter. The relationship between the conduction ratios.

…式二 Formula 2

轉換效率對導通比如式三。The conversion efficiency is turned on as shown in Equation 3.

…式三 ...three

但是,習知的升壓轉換器的缺點為:However, the disadvantages of conventional boost converters are:

1.雖然提高其導通比能增加電壓增益,但隨著導通比越高則越容易產生很大的輸入電流漣波,將導致提供輸入電流的燃料電池的使用壽命減少,且從圖2可知在導通比超過0.9以上時,受到寄生電阻的影響而使電壓增益不增反減,且為了避免大的輸入電流漣波,實務上其電壓轉換比受限在約5倍以下,而不符高電壓增益的需求。1. Although increasing the turn-on ratio can increase the voltage gain, the higher the turn-on ratio is, the more likely it is to generate a large input current chopping, which will result in a decrease in the service life of the fuel cell providing the input current, and it can be seen from FIG. When the conduction ratio exceeds 0.9 or more, the voltage gain is not increased and decreased by the influence of the parasitic resistance, and in order to avoid large input current ripple, the voltage conversion ratio is limited to about 5 times or less, and the high voltage gain is not satisfied. Demand.

2.此電路架構將存在二極體D0產生瞬間的反向恢復電流,而形成相當大功率損失,而減少轉換功率,不符高功率應用。2. This circuit architecture will have a reverse recovery current generated by the diode D0, which will cause considerable power loss and reduce the conversion power, which is not suitable for high power applications.

因此,本發明之目的,即在提供一種解決上述問題的交錯式高升壓直流轉換器。Accordingly, it is an object of the present invention to provide an interleaved high step-up DC converter that solves the above problems.

於是,本發明交錯式高升壓直流轉換器,包含一個第一耦合電感及一個第二耦合電感、一個第一開關、一個第二開關、一個第一二極體、一個第二二極體、一個儲能元件、一個第三二極體、一個次級側電容,及一個整流輸出級。Thus, the interleaved high-boost DC converter of the present invention comprises a first coupled inductor and a second coupled inductor, a first switch, a second switch, a first diode, a second diode, An energy storage component, a third diode, a secondary side capacitor, and a rectified output stage.

每一個耦合電感具有一個初級側繞組及一個次級側繞組,每一個側繞組具有一第一端及一第二端,其中,該第一及第二耦合電感的初級側繞組的第一端電連接一起以接收一呈直流的輸入電壓,該第一耦合電感的次級側繞組的第二端電連接該第二耦合電感的次級側繞組的第二端。Each of the coupled inductors has a primary side winding and a secondary side winding, each side winding having a first end and a second end, wherein the first ends of the primary side windings of the first and second coupled inductors are electrically Connected together to receive a DC input voltage, the second end of the secondary side winding of the first coupled inductor is electrically coupled to the second end of the secondary side winding of the second coupled inductor.

第一開關具有一電連接於該第一耦合電感的初級側繞組的第一端的第一端,及一第二端,且該第一開關受控制以切換於導通狀態和不導通狀態間,當該第一開關導通時,該第一耦合電感的初級側繞組接收一第一電流充電而產生一第一初級側電壓,當該第一開關不導通時,該第一耦合電感的次級側繞組磁感應而產生一正比於該第一初級側電壓的第一次級側電壓。The first switch has a first end electrically connected to the first end of the primary side winding of the first coupled inductor, and a second end, and the first switch is controlled to switch between a conducting state and a non-conducting state, When the first switch is turned on, the primary side winding of the first coupled inductor receives a first current charge to generate a first primary side voltage, and when the first switch is not turned on, the secondary side of the first coupled inductor The winding is magnetically induced to produce a first secondary side voltage proportional to the first primary side voltage.

第二開關具有一電連接於該第二耦合電感的初級側繞組的第一端的第一端,及一第二端,且該第二開關受控制以切換於導通狀態和不導通狀態間,當該第二開關導通時,該該第二耦合電感的初級側繞組接收一第二電流充電而產生一第二初級側電壓,當該第一開關不導通時,該第二耦合電感的次級側繞組磁感應而產生一正比於該第二初級側電壓的第二次級側電壓,其中,該第一開關與第二開關處於導通狀態的時間點存在一相位差。The second switch has a first end electrically connected to the first end of the primary side winding of the second coupled inductor, and a second end, and the second switch is controlled to switch between the conducting state and the non-conducting state, When the second switch is turned on, the primary side winding of the second coupled inductor receives a second current charge to generate a second primary side voltage, and when the first switch is not turned on, the second coupled inductor secondary The side winding is magnetically induced to generate a second secondary side voltage proportional to the second primary side voltage, wherein a phase difference exists between the first switch and the second switch in an on state.

第一二極體具有一電連接該第一開關的第二端的陰極及一陽極。第二二極體具有一電連接該第二開關的第二端的陽極及一電連接該第二耦合電感的次級側繞組的第一端的陰極。The first diode has a cathode electrically connected to the second end of the first switch and an anode. The second diode has an anode electrically connected to the second end of the second switch and a cathode electrically connected to the first end of the secondary side winding of the second coupled inductor.

儲能元件電連接於該第一開關的第一端、該第一二極體的陽極與該第二二極體的陰極間,當該第一二極體導通時,該儲能元件用以根據來自該第一與第二耦合電感的初級側繞組的放電,而產生一儲能電壓,該儲能電壓正比於該第一及第二初級側電壓的加總。The energy storage component is electrically connected between the first end of the first switch, the anode of the first diode, and the cathode of the second diode. When the first diode is turned on, the energy storage component is used. A stored voltage is generated based on the discharge from the primary side windings of the first and second coupled inductors, the stored voltage being proportional to the sum of the first and second primary side voltages.

第三二極體具有一電連接該第一二極體的陰極的陽極,及一陰極。The third diode has an anode electrically connected to the cathode of the first diode, and a cathode.

次級側電容具有一電連接該第一耦合電感的次級側繞組的第一端的第一端,及一電連接該第三二極體的陰極第二端,該次級側電容用以根據來自該第一耦合電感的次級側繞組的放電,而產生一正比該第一次級側電壓的電容電壓。The secondary side capacitor has a first end electrically connected to the first end of the secondary side winding of the first coupled inductor, and a second end of the cathode electrically connected to the third diode, the secondary side capacitor is used A capacitance voltage proportional to the first secondary side voltage is generated in accordance with a discharge from the secondary side winding of the first coupled inductor.

整流輸出級電連接該次級側電容的第二端,用以根據來自該第二耦合電感的次級側繞組的放電、該儲能元件的放電與該次級側電容的放電產生一呈直流的輸出電壓,該輸出電壓正比於該儲能電壓、該電容電壓與該第二次級側電壓的加總。a rectifying output stage electrically connected to the second end of the secondary side capacitor for generating a DC according to a discharge from the secondary side winding of the second coupled inductor, a discharge of the energy storage element, and a discharge of the secondary side capacitor The output voltage is proportional to the sum of the storage voltage, the capacitance voltage, and the second secondary side voltage.

本發明之功效在於:同時符合高電壓增益及高功率應用,且降低元件成本。The invention has the advantages of complying with high voltage gain and high power applications at the same time, and reducing component cost.

在本發明被詳細描述之前,應當注意在以下的說明內容中,類似的元件是以相同的編號來表示。Before the present invention is described in detail, it should be noted that in the following description, similar elements are denoted by the same reference numerals.

參閱圖3,本發明交錯式高升壓直流轉換器之一實施例,包含一個第一耦合電感1及一個第二耦合電感2、一個第一開關S1、一個第二開關S2、一個第一二極體D1、一個第二二極體D2、一個第三二極體D3、一個儲能元件3、一個次級側電容C3、一個整流輸出級4及一控制單元5。Referring to FIG. 3, an embodiment of the interleaved high-boost DC converter of the present invention includes a first coupled inductor 1 and a second coupled inductor 2, a first switch S1, a second switch S2, and a first two. The pole body D1, a second diode D2, a third diode D3, an energy storage element 3, a secondary side capacitor C3, a rectifying output stage 4 and a control unit 5.

第一及第二耦合電感1具有一個初級側繞組Np1及一個次級側繞組Ns1,第二耦合電感2具有一個初級側繞組Np2及一個次級側繞組Ns2,每一個側繞組Np1、Np2、Ns1、Ns2具有一第一端及一第二端,其中,該第一及第二耦合電感1、2的初級側繞組Np1、Np2的第一端電連接一起以接收一呈直流的輸入電壓Vin,該第一耦合電感1的次級側繞組Ns1的第二端電連接該第二耦合電感2的次級側繞組Ns2的第二端。每一初級側繞組Np1、Np2的第一端是打點端,每一初級側繞組Np1、Np2的第二端是非打點端。每一次級側繞組Ns1、Ns2的第一端是打點端,每一次級側繞組Ns1、Ns2的第二端是非打點端。本實施例中,每一耦合電感1、2是一磁性鐵芯,且具有一匝數比n,其中,關於該二耦合電感1、2處於非理想效應分析的磁化電感及漏電感,將於後文中進一步說明。The first and second coupled inductors 1 have a primary side winding Np1 and a secondary side winding Ns1, and the second coupled inductor 2 has a primary side winding Np2 and a secondary side winding Ns2, each side winding Np1, Np2, Ns1 The Ns2 has a first end and a second end, wherein the first ends of the primary side windings Np1, Np2 of the first and second coupled inductors 1, 2 are electrically connected together to receive a DC input voltage Vin, The second end of the secondary side winding Ns1 of the first coupled inductor 1 is electrically connected to the second end of the secondary side winding Ns2 of the second coupled inductor 2. The first end of each of the primary side windings Np1, Np2 is a striking end, and the second end of each of the primary side windings Np1, Np2 is a non-tapping end. The first end of each of the secondary side windings Ns1, Ns2 is a striking end, and the second end of each of the secondary side windings Ns1, Ns2 is a non-tapping end. In this embodiment, each of the coupled inductors 1 and 2 is a magnetic core and has a turns ratio n, wherein the magnetizing inductance and the leakage inductance of the two coupled inductors 1 and 2 in a non-ideal effect analysis will be Further explanation is given later.

第一開關S1具有一電連接於該第一耦合電感1的初級側繞組Np1的第一端的第一端,及一第二端,且該第一開關S1受控制以切換於導通狀態和不導通狀態間,當該第一開關S1導通時,該第一耦合電感1的初級側繞組Np1接收一第一電流充電而產生一第一初級側電壓,當該第一開關S1不導通時,該第一耦合電感1的次級側繞組Ns1磁感應而產生一正比於該第一初級側電壓的第一次級側電壓。該第一開關S1是一N型功率半導體電晶體,且該第一開關S1的第一端是汲極,該第一開關S1的第二端是源極。The first switch S1 has a first end electrically connected to the first end of the primary side winding Np1 of the first coupled inductor 1, and a second end, and the first switch S1 is controlled to switch to the conducting state and not During the on state, when the first switch S1 is turned on, the primary side winding Np1 of the first coupled inductor 1 receives a first current charge to generate a first primary side voltage, and when the first switch S1 is not turned on, The secondary side winding Ns1 of the first coupled inductor 1 is magnetically induced to generate a first secondary side voltage proportional to the first primary side voltage. The first switch S1 is an N-type power semiconductor transistor, and the first end of the first switch S1 is a drain, and the second end of the first switch S1 is a source.

第二開關S2具有一電連接於該第二耦合電感2的初級側繞組Np1的第一端的第一端,及一第二端,且該第二開關S2受控制以切換於導通狀態和不導通狀態間,當該第二開關S2導通時,該該第二耦合電感2的初級側繞組Np2接收一第二電流充電而產生一第二初級側電壓,當該第一開關S1不導通時,該第二耦合電感2的次級側繞組Ns2磁感應而產生一正比於該第二初級側電壓的第二次級側電壓。該第二開關S2是一N型功率半導體電晶體,且該第一開關S1的第一端是汲極,該第一開關S1的第二端是源極。其中,該第一開關S1與第二開關S2處於導通狀態的時間點存在一相位差。且該第一及第二開關S1、S2的切換是零電流切換,以下將配合本案模式操作進一步說明。The second switch S2 has a first end electrically connected to the first end of the primary side winding Np1 of the second coupled inductor 2, and a second end, and the second switch S2 is controlled to switch to the conducting state and not During the on state, when the second switch S2 is turned on, the primary side winding Np2 of the second coupled inductor 2 receives a second current charge to generate a second primary side voltage. When the first switch S1 is not turned on, The secondary side winding Ns2 of the second coupled inductor 2 is magnetically induced to generate a second secondary side voltage proportional to the second primary side voltage. The second switch S2 is an N-type power semiconductor transistor, and the first end of the first switch S1 is a drain, and the second end of the first switch S1 is a source. There is a phase difference between the first switch S1 and the second switch S2 in the on state. And the switching of the first and second switches S1, S2 is zero current switching, which will be further explained below in conjunction with the mode operation of the present invention.

第一二極體D1具有一電連接該第一開關S1的第二端的陰極及一陽極。第二二極體D2具有一電連接該第二開關S1的第二端的陽極及一電連接該第二耦合電感2的次級側繞組Ns2的第一端的陰極。第三二極體D3具有一電連接該第一二極體D1的陰極的陽極,及一陰極。The first diode D1 has a cathode electrically connected to the second end of the first switch S1 and an anode. The second diode D2 has an anode electrically connected to the second end of the second switch S1 and a cathode electrically connected to the first end of the secondary side winding Ns2 of the second coupled inductor 2. The third diode D3 has an anode electrically connected to the cathode of the first diode D1, and a cathode.

儲能元件3電連接於該第一開關S1的第一端、該第一二極體D1的陽極與該第二二極體D2的陰極間,當該第一二極體D1導通時,該儲能元件3用以根據來自該第一與第二耦合電感1、2的初級側繞組Np1、Np2的放電,而產生一儲能電壓,該儲能電壓正比於該第一及第二初級側電壓的加總。該儲能元件3包括一個第一電容C1與一個第二電容C2。第一電容C1具有一個電連接該第一開關S1的第一端的第一端,及一電連接該第一二極體D1的陽極的第二端。第二電容C2具有一個電連接該第一開關S1的第一端的第一端,及一電連接該第二二極體D2的陰極的第二端。The energy storage device 3 is electrically connected between the first end of the first switch S1, the anode of the first diode D1 and the cathode of the second diode D2. When the first diode D1 is turned on, the The energy storage component 3 is configured to generate a storage voltage according to discharges from the primary side windings Np1, Np2 of the first and second coupled inductors 1, 2, the storage voltage being proportional to the first and second primary sides The sum of the voltages. The energy storage component 3 includes a first capacitor C1 and a second capacitor C2. The first capacitor C1 has a first end electrically connected to the first end of the first switch S1, and a second end electrically connected to the anode of the first diode D1. The second capacitor C2 has a first end electrically connected to the first end of the first switch S1, and a second end electrically connected to the cathode of the second diode D2.

次級側電容C3具有一電連接該第一耦合電感1的次級側繞組Ns1的第一端的第一端,及一電連接該第三二極體D3的陰極第二端,該次級側電容C3用以根據來自該第一耦合電感1的次級側繞組Ns1的放電,而產生一正比該第一次級側電壓的電容電壓。The secondary side capacitor C3 has a first end electrically connected to the first end of the secondary side winding Ns1 of the first coupled inductor 1, and a second end electrically connected to the cathode of the third diode D3. The side capacitor C3 is for generating a capacitance voltage proportional to the first secondary side voltage according to the discharge from the secondary side winding Ns1 of the first coupled inductor 1.

整流輸出級4電連接該次級側電容C3的第二端,用以根據來自該第二耦合電感2的次級側繞組Ns2的放電、該儲能元件3的放電與該次級側電容C3的放電產生一呈直流的輸出電壓Vo,該輸出電壓Vo正比於該儲能電壓、該電容電壓與該第二次級側電壓的加總。該整流輸出級4包括一個第四二極體D4及一個輸出電容C4。The rectified output stage 4 is electrically connected to the second end of the secondary side capacitor C3 for discharging according to the secondary side winding Ns2 from the second coupled inductor 2, discharging of the energy storage element 3, and the secondary side capacitor C3 The discharge produces a DC output voltage Vo that is proportional to the sum of the stored voltage, the capacitor voltage, and the second secondary side voltage. The rectified output stage 4 includes a fourth diode D4 and an output capacitor C4.

第四二極體D4具有一電連接該次級側電容C3的第二端的陽極,及一陰極。輸出電容C4電連接於該第四二極體D4的陰極與該第一二極體D1的陽極之間,用以提供該輸出電壓Vo。The fourth diode D4 has an anode electrically connected to the second end of the secondary side capacitor C3, and a cathode. The output capacitor C4 is electrically connected between the cathode of the fourth diode D4 and the anode of the first diode D1 for providing the output voltage Vo.

控制單元5產生一切換該第一開關S1的第一脈波調變信號及一切換該第二開關S2的第二脈波調變信號,該第一脈波調變信號與該第二脈波調變信號具有相同的周期時間,該第一及第二脈波調變信號的相位差為周期時間的二分之一。以下將以八階段進一步說明開關S1、S2的切換時序圖。The control unit 5 generates a first pulse modulation signal for switching the first switch S1 and a second pulse modulation signal for switching the second switch S2, the first pulse modulation signal and the second pulse wave The modulated signals have the same cycle time, and the phase differences of the first and second pulse modulated signals are one-half of the cycle time. The switching timing diagram of the switches S1, S2 will be further explained below in eight stages.

參閱圖4,為本實施例的一等效電路圖,用以說明該二耦合電感的非理想等效電路中的磁化電感Lm1、Lm2及其漏電感Lk1、Lk2。其中,參數v D1、v D2、v D3、v D4分別代表第一至第四二極體D1~D4的跨壓,參數V C1、V C2分別代表第一電容C1、第二電容C2的跨壓,參數i LK1、i LK2分別代表流經該二耦合電感1、2的漏電感電流,參數 i in代表輸入電流,參數i D1~i D4分別代表流過第一至第四二極體D1~D4的電流,參數i O代表總輸出電流 Referring to FIG. 4, an equivalent circuit diagram of the embodiment is used to illustrate the magnetizing inductances Lm1 and Lm2 and the leakage inductances Lk1 and Lk2 in the non-ideal equivalent circuit of the two coupled inductors. Wherein, the parameters v D1 , v D2 , v D3 , and v D4 represent the crossover voltages of the first to fourth diodes D1 to D4, respectively, and the parameters V C1 and V C2 represent the cross of the first capacitor C1 and the second capacitor C2, respectively. The parameters i LK1 and i LK2 represent the leakage inductance current flowing through the two coupled inductors 1, 2, respectively, the parameter i in represents the input current, and the parameters i D1 ~ i D4 represent the flow through the first to fourth diodes D1, respectively. ~D4 current, parameter i O represents total output current

參閱圖5,為本實施例的操作時序圖,其中,參數 v gs1、v gs2分別代表控制該第一及第二開關S1、 S2是否導通的第一及第二脈波調變信號的電壓,參數v ds1、v ds2分別代表該第一及第二開關S1、 S2的二端跨壓,參數T S為第一脈波調變信號的週期時間。 Referring to FIG. 5, it is an operation timing diagram of the embodiment, wherein the parameters v gs1 and v gs2 respectively represent voltages of the first and second pulse modulation signals that control whether the first and second switches S1 and S2 are turned on. The parameters v ds1 and v ds2 respectively represent the two-terminal voltage across the first and second switches S1 and S2, and the parameter T S is the cycle time of the first pulse modulation signal.

以下為本實施例操作於八階段的各電路圖,其中,導通的元件以實線表示,不導通的元件以虛線表示,以下分別針對每一階段進行說明。The following is a circuit diagram of the eight-stage operation of the present embodiment, in which the conductive elements are indicated by solid lines, and the non-conducting elements are indicated by broken lines, which are described below for each stage.

第一階段(時間: ):The first stage (time:):

參閱圖5及圖6,第一開關S1由不導通轉成導通,而第二開關S2不導通,第一二極體D1不導通,第二二極體D2不導通,第三二極體D3導通,第四二極體D4不導通。Referring to FIG. 5 and FIG. 6, the first switch S1 is turned from non-conducting to conducting, and the second switch S2 is not turned on, the first diode D1 is not turned on, the second diode D2 is not turned on, and the third diode D3 is turned on. When turned on, the fourth diode D4 is not turned on.

第一階段開始於,當第一開關S1切換成導通,且其漏電感Lk1的存在提供由零開始線性上升的電流,而使第一開關S1具有零電流切換的柔切性能,降低切換損失。隨著漏電感電流i LK1上升,當 時,第一耦合電感1的磁化電感 所儲存的能量仍藉由初級側繞組Np1傳送至次級側組Ns1,因此僅有第三二極體D3仍維持於導通狀態,而第一二極體D1、第二二極體D2和第四二極體D4均為逆向偏壓而不導通,由於第一與第二耦合電感1、2的漏電感 控制了第三二極體D3的電流的下降速率,避免第三二極體D3快速切換產生逆電流的情況,達到緩和第三二極體D3反向恢復問題。當,第三二極體D3的電流 下降至0,第三二極體D3轉態成不導通時,第一階段結束。 The first phase begins when the first switch S1 is switched to be on, and the presence of its leakage inductance Lk1 provides a current that rises linearly from zero, while the first switch S1 has a soft switching performance with zero current switching, reducing switching losses. As the leakage inductance current i LK1 rises, when Magnetizing inductance of the first coupled inductor 1 The stored energy is still transmitted to the secondary side group Ns1 by the primary side winding Np1, so only the third diode D3 remains in the conducting state, and the first diode D1, the second diode D2 and the first The quadrupole D4 is reverse biased and not turned on, due to the leakage inductance of the first and second coupled inductors 1, 2 with The falling rate of the current of the third diode D3 is controlled, and the reverse current of the third diode D3 is prevented from being switched rapidly, so as to alleviate the reverse recovery problem of the third diode D3. When, the current of the third diode D3 When the voltage drops to 0 and the third diode D3 turns into non-conduction, the first phase ends.

第二階段( ): second stage( ):

參閱圖5及圖7,第一開關S1導通,而第二開關S2導通,第一二極體D1不導通,第二二極體D2不導通,第三二極體D3由導通轉成不導通,第四二極體D4不導通。Referring to FIG. 5 and FIG. 7, the first switch S1 is turned on, and the second switch S2 is turned on, the first diode D1 is not turned on, the second diode D2 is not turned on, and the third diode D3 is turned on to be non-conductive. The fourth diode D4 is not conductive.

第二階段開始於,第三二極體轉態成不導通,所有二極體均為逆向偏壓而不導通。輸入電壓Vin跨於兩個耦合電感1、2的初級側,即跨於其磁化電感Lm1、Lm2以及漏電感Lk1、Lk2,使漏電感電流 呈線性上升,斜率均為 ,從能量觀點而言,該輸入電壓Vin對該第一及第二耦合電感1、2的初級側繞組Np1、Np2進行充電,也就是第一及第二耦合電感1、2的初級側繞組Np1、Np2在第二階段作儲存能量。當第二開關S2切換為不導通時,第二階段結束。 The second phase begins with the third diode turning into a non-conducting state, all of which are reverse biased and not conducting. The input voltage Vin crosses the primary side of the two coupled inductors 1, 2, that is, across its magnetizing inductances Lm1, Lm2 and the leakage inductances Lk1, Lk2, so that the leakage inductor current , Linear rise, slope is From an energy point of view, the input voltage Vin charges the primary side windings Np1, Np2 of the first and second coupled inductors 1, 2, that is, the primary side windings Np1 of the first and second coupled inductors 1, 2 Np2 stores energy in the second stage. When the second switch S2 is switched to be non-conducting, the second phase ends.

第三階段( ): The third stage( ):

參閱圖5及圖8,第一開關S1導通,而第二開關S2由導通轉成不導通,第一二極體D1不導通,第二二極體D2由不導通轉成導通,第三二極體D3不導通,第四二極體D4由不導通轉成導通。Referring to FIG. 5 and FIG. 8, the first switch S1 is turned on, and the second switch S2 is turned into non-conducting, the first diode D1 is not turned on, and the second diode D2 is turned from non-conducting to conducting, the third two The polar body D3 is not turned on, and the fourth diode D4 is turned from non-conducting to conducting.

第三階段開始於,第二開關S2切換為不導通,第二耦合電感2的漏電感電流 的連續性使得第二二極體D2轉態為導通,漏電感電流 流經第二二極體D2、第二電容C2和第一開關S1,對第二電容C2充電。第二耦合電感2的初級側繞組Np2的磁化電感 以傳送能量至次級側繞組Ns2使得第四二極體D4轉態為導通,第四二極體電流 對第四電容C4充電,第一開關S1保持為導通,此時漏電感電流 呈線性下降。當,漏電感Lk2儲存的能量完全釋放完畢,即 ,第二二極體D2轉態成不導通時,第三階段結束。由於流經第二二極體D2的電流i D2先降至0,第二二極體D2才轉態成不導通,因此第二二極體D2沒有反向恢復損失的問題。 The third phase begins with the second switch S2 switched to non-conducting, and the leakage inductance current of the second coupled inductor 2 Continuity of the second diode D2 is turned on, leakage inductance current The second capacitor C2 is charged by flowing through the second diode D2, the second capacitor C2, and the first switch S1. Magnetizing inductance of the primary side winding Np2 of the second coupled inductor 2 Transmitting energy to the secondary side winding Ns2 causes the fourth diode D4 to be turned on, and the fourth diode current Charging the fourth capacitor C4, the first switch S1 remains conductive, and the leakage current is current It decreases linearly. When the energy stored in the leakage inductance Lk2 is completely released, When the second diode D2 is turned into non-conduction, the third phase ends. Since the current i D2 flowing through the second diode D2 first drops to 0, the second diode D2 is turned into a non-conducting state, so the second diode D2 has no problem of reverse recovery loss.

第四階段( ): Fourth stage ):

參閱圖5及圖9,第一開關S1導通,而第二開關S2不導通,第一二極體D1不導通,第二二極體D2由導通轉成不導通,第三二極體D3不導通,第四二極體D4導通。Referring to FIG. 5 and FIG. 9, the first switch S1 is turned on, and the second switch S2 is not turned on, the first diode D1 is not turned on, the second diode D2 is turned on to be non-conductive, and the third diode D3 is not. Turned on, the fourth diode D4 is turned on.

第四階段開始於,此時漏電感的能量完全釋放到第二電容C2,第二二極體D2轉態成不導通。第二耦合電感2的磁化電感電流 完全由初級側繞組Np2反射到次級側繞組組Ns2,因此 ,第四二極體電流 對第四電容C4充電,此時流經第一開關S1的電流等於第一及第二耦合電感1、2的磁化電感Lm1、Lm2的電流總和,即 。當,第二開關S2切換為導通時,第四階段結束。 The fourth phase begins when the energy of the leakage inductance is completely released to the second capacitor C2, and the second diode D2 is turned into a non-conduction. Magnetizing inductor current of the second coupled inductor 2 Fully reflected by the primary side winding Np2 to the secondary side winding group Ns2, thus , the fourth diode current Charging the fourth capacitor C4, the current flowing through the first switch S1 is equal to the sum of the currents of the magnetizing inductances Lm1, Lm2 of the first and second coupled inductors 1, 2, that is, . When the second switch S2 is switched to be on, the fourth phase ends.

第五階段( ): The fifth stage ( ):

參閱圖5及圖10,第一開關S1導通,而第二開關S2由不導通轉成導通,第一二極體D1不導通,第二二極體D2不導通,第三二極體D3不導通,第四二極體D4導通。Referring to FIG. 5 and FIG. 10, the first switch S1 is turned on, and the second switch S2 is turned from non-conducting to conducting, the first diode D1 is not turned on, the second diode D2 is not turned on, and the third diode D3 is not. Turned on, the fourth diode D4 is turned on.

第五階段開始於,第二開關S2切換成導通,由於第二耦合電感2的漏電感Lk2的存在,使第二開關S2具有零電流切換的柔切性能,降低切換損失。漏電感電流 上升,當 時,第二耦合電感2的磁化電感Lm2的儲能仍然藉由初級側繞組Np2磁感應傳送次級側繞組Ns2,第四二極體D4仍保持如第四階段的導通狀態,流經第四二極體D4的電流 下降,第一二極體D1、第二二極體D2和第三二極體D3逆向偏壓而不導通。第一與第二耦合電感1、2的漏電感Lk1、Lk2控制了第四二極體電流 下降速率,因此可緩和第四二極體D4反向恢復問題。當,第四二極體電流 下降至0,第四二極體D4轉態成不導通,第五階段結束。 The fifth phase begins with the second switch S2 switched to be turned on. Due to the presence of the leakage inductance Lk2 of the second coupled inductor 2, the second switch S2 has a soft switching performance of zero current switching, reducing switching loss. Leakage inductor current Rise, when The energy storage of the magnetizing inductance Lm2 of the second coupled inductor 2 is still magnetically induced to transmit the secondary side winding Ns2 by the primary side winding Np2, and the fourth diode D4 remains in the fourth stage of conduction state, flowing through the fourth two Polar body D4 current Falling, the first diode D1, the second diode D2, and the third diode D3 are reverse biased and are not turned on. The leakage inductances Lk1, Lk2 of the first and second coupled inductors 1, 2 control the fourth diode current The rate of descent can therefore alleviate the problem of reverse recovery of the fourth diode D4. When, the fourth diode current Down to 0, the fourth diode D4 turns into a non-conducting state, and the fifth phase ends.

第六階段( ): The sixth stage ( ):

參閱圖5及圖11,第一開關S1導通,而第二開關S2導通,第一二極體D1不導通,第二二極體D2不導通,第三二極體D3不導通,第四二極體D4由導通轉不導通。Referring to FIG. 5 and FIG. 11, the first switch S1 is turned on, and the second switch S2 is turned on, the first diode D1 is not turned on, the second diode D2 is not turned on, and the third diode D3 is not turned on, the fourth two The pole body D4 is turned from conduction to non-conduction.

第六階段開始於,第四二極體D4轉態成不導通,所有二極體均為逆向偏壓而不導通,第一開關S1和第二開關S2皆為導通。輸入電壓Vin跨於第一及第二耦合電感1、2的初級側繞組Np1、Np2,即跨於其磁化電感Lm1、Lm2以及漏電感Lk1、Lk2,漏電感電流 呈線性上升,斜率均為 ,從能量觀點而言,第一及第二耦合電感1、2的初級側繞組Np1、Np2在第六階段作儲存能量。當,第一開關S1切換為不導通時,第六階段結束。 The sixth phase begins with the fourth diode D4 transitioning to non-conducting, all the diodes are reverse biased and not conducting, and the first switch S1 and the second switch S2 are both turned on. The input voltage Vin spans the primary side windings Np1, Np2 of the first and second coupled inductors 1, 2, that is, across its magnetizing inductances Lm1, Lm2 and the leakage inductances Lk1, Lk2, and the leakage inductance current , Linear rise, slope is From the energy point of view, the primary side windings Np1, Np2 of the first and second coupled inductors 1, 2 store energy in the sixth stage. When the first switch S1 is switched to be non-conducting, the sixth phase ends.

第七階段( ): The seventh stage ( ):

參閱圖5及圖12,第一開關S1由導通轉不導通,而第二開關S2導通,第一二極體D1不導通,第二二極體D2不導通,第三二極體D3導通,第四二極體D4不導通。Referring to FIG. 5 and FIG. 12, the first switch S1 is turned on and turned off, and the second switch S2 is turned on, the first diode D1 is not turned on, the second diode D2 is not turned on, and the third diode D3 is turned on. The fourth diode D4 is not conductive.

第七階段開始於,第一開關S1切換為不導通。第一耦合電感1的漏電感電流 的連續性使得第一二極體D1轉態為導通漏電感電流 流經第一電容C1和第一二極體D1,對第一電容C1充電,第一耦合電感1之磁化電感Lm1將能量由初級側繞組Np1傳送至次級側繞組Ns1使得第三二極體D3轉態為導通,第三二極體電流 對第三電容C3充電,第二開關S2保持為導通,此時漏電感電流 呈線性下降。當,漏電感Lk1儲存的能量完全釋放完畢,即 ,第一二極體D1轉態成不導通時,第七階段結束。由於流經第一二極體D1的電流i D1先降至0,第一二極體D1才轉態成不導通,因此第一二極體D1沒有反向恢復損失的問題。 The seventh phase begins with the first switch S1 switching to non-conducting. Leakage inductor current of the first coupled inductor 1 Continuity causes the first diode D1 to transition to a conduction leakage current Flowing through the first capacitor C1 and the first diode D1, charging the first capacitor C1, the magnetizing inductance Lm1 of the first coupling inductor 1 transfers energy from the primary side winding Np1 to the secondary side winding Ns1 such that the third diode D3 transition is conductive, third diode current Charging the third capacitor C3, the second switch S2 is kept conductive, and the leakage current is current It decreases linearly. When the energy stored in the leakage inductance Lk1 is completely released, When the first diode D1 transitions to non-conducting, the seventh phase ends. Since the current i D1 flowing through the first diode D1 first drops to zero, the first diode D1 is turned into non-conduction, so the first diode D1 has no problem of reverse recovery loss.

第八階段( ): The eighth stage ( ):

參閱圖5及圖13,第一開關S1不導通,而第二開關S2導通,第一二極體D1由導通轉不導通,第二二極體D2不導通,第三二極體D3導通,第四二極體D4不導通。Referring to FIG. 5 and FIG. 13 , the first switch S1 is not turned on, and the second switch S2 is turned on, the first diode D1 is turned on and turned off, the second diode D2 is not turned on, and the third diode D3 is turned on. The fourth diode D4 is not conductive.

第八階段開始於,此時漏電感的能量完全釋放到第一電容C1,第一二極體D1轉態成不導通。第一耦合電感1的磁化電感Lm1完全由其初級側繞組Np1反射到次級側繞組Ns1, ,因此第三二極體電流 對第三電容C3充電,此時流經第二開關S2的電流等於磁化電感Lm1、Lm2的電流總和,即 。當 ,第一開關S1切換為導通時,第八階段結束,進入下一個切換週期。 The eighth phase begins when the energy of the leakage inductance is completely released to the first capacitor C1, and the first diode D1 is turned into a non-conducting state. The magnetizing inductance Lm1 of the first coupled inductor 1 is completely reflected by its primary side winding Np1 to the secondary side winding Ns1, Therefore, the third diode current Charging the third capacitor C3, the current flowing through the second switch S2 is equal to the sum of the currents of the magnetizing inductors Lm1, Lm2, that is, . When the first switch S1 is switched to be on, the eighth phase ends and the next switching cycle is entered.

電壓增益分析:Voltage gain analysis:

由於第一及第二電容C1、C2的電壓可視為傳統升壓型轉換器的輸出電壓,因此根據第一及第二耦合電感1、2的磁化電感Lm1、Lm2滿足伏秒平衡定理,可推導得到第一及第二電容電壓 如式四。 Since the voltages of the first and second capacitors C1 and C2 can be regarded as the output voltage of the conventional boost converter, the magnetization inductances Lm1 and Lm2 of the first and second coupled inductors 1 and 2 satisfy the volt-second equilibrium theorem, and can be derived. Obtaining first and second capacitor voltages , As in the fourth.

…式四 ...four

第三及第四電容電壓 ,可藉由第一及第二耦合電感1、2的初級側電壓反射至次級測電壓推導而得到。在第七階段,第一開關S2不導通、第二開關S2導通、第三二極體D3導通,可推得第三電容電壓 如式五。 Third and fourth capacitor voltages , It can be obtained by deriving the primary side voltage of the first and second coupled inductors 1, 2 to the secondary measured voltage. In the seventh stage, the first switch S2 is not turned on, the second switch S2 is turned on, and the third diode D3 is turned on, and the third capacitor voltage can be derived. As in the fifth.

…式五 Five

其中,參數v Ns1、v Ns2分別為第一耦合電感1的次級側繞組Ns1上的第一次級側電壓、第二耦合電感2的次級側繞組Ns2上的第二次級側電壓,參數n為次級側繞組Np1、Np2與初級側繞組Ns1、Ns2的匝數比,參數k為第一及第二耦合電感1、2的耦合係數,參數Vin為輸入電壓,參數D為第一及第二開關S1、S2的導通比。 The parameters v Ns1 and v Ns2 are the first secondary side voltage on the secondary side winding Ns1 of the first coupled inductor 1 and the second secondary side voltage on the secondary side winding Ns2 of the second coupled inductor 2, respectively. The parameter n is the turns ratio of the secondary side windings Np1, Np2 and the primary side windings Ns1, Ns2, the parameter k is the coupling coefficient of the first and second coupled inductors 1, 2, the parameter Vin is the input voltage, and the parameter D is the first And the conduction ratio of the second switches S1, S2.

在第三階段,第一開關S1導通、第二開關S2不導通、第四二極體D4導通,第四電容電壓 如式六。 In the third stage, the first switch S1 is turned on, the second switch S2 is not turned on, the fourth diode D4 is turned on, and the fourth capacitor voltage is turned on. As in the sixth.

…式六 Equation six

而輸出電壓 等同第四電容電壓 如式七。 Output voltage Equivalent to the fourth capacitor voltage As in the seventh.

…式七 Equation seven

因此可推得本實施例的電壓增益 如式八。 Therefore, the voltage gain of the embodiment can be derived. As in the eighth.

…式八 Equation eight

參閱圖14為不同耦合係數 (k =1、0.95、0.9)和電壓增益 的關係曲線圖,當 時,由圖可知耦合係數 對電壓增益的影響非常小。若耦合係數 ,則電壓增益為如式九。 See Figure 14 for different coupling factors (k =1, 0.95, 0.9) and voltage gain Relationship graph, when When the figure shows the coupling coefficient The effect on voltage gain is very small. Coupling coefficient , the voltage gain is as shown in Equation 9.

…式九 Formula nine

從上式可知本實施例的電壓增益具有耦合電感匝數比和導通比兩個設計自由度,可藉由適當設計耦合電感的匝數比,達到高升壓比,且不必操作在極大的導通比。參閱圖15為對應於耦合電感匝數比及導通比的電壓增益曲線圖,由圖15可知當導通比 時,電壓增益為10倍;當 時,電壓增益為20倍。 It can be seen from the above equation that the voltage gain of the present embodiment has two design degrees of freedom of the coupled inductor turns ratio and the turn-on ratio, and the high boost ratio can be achieved by appropriately designing the turns ratio of the coupled inductor, and does not have to be operated in an extremely large conduction. ratio. Referring to FIG. 15 , a voltage gain graph corresponding to the coupled inductor turns ratio and the turn-on ratio is shown. FIG. 15 shows the turn-on ratio. , When the voltage gain is 10 times; , The voltage gain is 20 times.

由本實施例的第七階段及第三階段可知第一開關S1、第二開關S2的電壓應力如式十、式十一,第一二極體D1、第二二極體D2、第三二極體D3的電壓應力如式十二、式十三、式十四。It can be seen from the seventh stage and the third stage of the embodiment that the voltage stress of the first switch S1 and the second switch S2 is as shown in Equation 10 and Equation 11, the first diode D1, the second diode D2, and the third diode. The voltage stress of the body D3 is as shown in Equation 12, Equation 13, and Equation 14.

…式十 Ten

…式十一 Equation eleven

…式十二 Twelve

…式十三 Thirteen

……式十四 Fourteen

由於習知的交錯式升壓型轉換器的功率開關電壓應力為輸出電壓 ,而本實施例的開關電壓應力僅為輸出電壓 倍,因此可使用低額定耐壓具有較低導通電阻的金氧半產效電晶體來實現第一及第二開關S1、S2,可降低開關導通損失。且較低電壓應力的第一至第三二極體D1~D3可採用蕭特基二極體,因為蕭特基二極體典型的順向壓降為0.3 V,比一般的功率二極體導通壓降低,更降低導通損失。 Since the power switching voltage stress of the conventional interleaved boost converter is the output voltage The switching voltage stress of this embodiment is only the output voltage. of Therefore, the first and second switches S1 and S2 can be realized by using a metal oxide half-effective transistor having a low rated withstand voltage and a low on-resistance, which can reduce the switch conduction loss. The first to third diodes D1 to D3 with lower voltage stress can use Schottky diodes, because the typical forward voltage drop of the Schottky diode is 0.3 V, which is higher than the general power diode. The conduction voltage is reduced, and the conduction loss is further reduced.

實驗模擬:Experimental simulation:

關於本實施例的穩態特性分析,可假設第一及第二開關S1、S2、第一至第三二極體D1~D3導通壓降為零及忽略時間極短的暫態階段,包括第一、四、五及八階段,只考慮第二、三、六及七階段。第一至第四電容夠大,忽略電壓漣波,使得電容電壓在一個切換週期內視為常數。參閱圖16為開關S1、S2的驅動信號、輸入電壓Vin與輸出電壓Vo波形圖,當 ,則理論值導通比大約 ,模擬結果符合式九的電壓增益。 Regarding the steady-state characteristic analysis of the present embodiment, it can be assumed that the first and second switches S1 and S2, the first to third diodes D1 to D3 have a conduction voltage drop of zero and a transient phase with a very short time, including the first In the first, fourth, fifth and eighth stages, only the second, third, sixth and seventh stages are considered. The first to fourth capacitors are large enough to ignore voltage chopping so that the capacitor voltage is considered constant during a switching period. Refer to Figure 16 for the drive signals of the switches S1 and S2, the input voltage Vin and the output voltage Vo waveform. , , , the theoretical value conduction ratio is approximately The simulation result conforms to the voltage gain of Equation 9.

如圖17所示,為開關驅動信號與開關跨壓信號的圖,驗證了當第一開關S1或第二開關S2不導通時,其跨壓 都約為 ,僅為輸出電壓Vo= 的四分之一,符合式十、式十 一的分析結果,相較習知的升壓型轉換器的開關電壓應力為輸出電壓,本實施例的第一及第二開關S1、S2具有低電壓應力的優點。 As shown in FIG. 17, which is a diagram of the switch drive signal and the switch cross-voltage signal, it is verified that when the first switch S1 or the second switch S2 is not conducting, the voltage across the switch is verified. or All about , only the output voltage Vo= The first and second switches S1, S2 of the present embodiment have a lower value than the analysis result of Equation 10 and Equation 11, compared with the switching voltage stress of the conventional boost converter. The advantage of voltage stress.

如圖18所示,為第一及第二耦合電感1、2的漏電感電流 及輸入電流 的波形圖,由圖可知 的漣波電流大小大約 ,而輸入電流 的漣波電流大小僅為約 ,驗證了本實施例的交錯式操作具有降低漣波電流效用。 As shown in FIG. 18, the leakage inductance currents of the first and second coupled inductors 1, 2 , And input current Waveform diagram, as can be seen from the figure , The chopping current is about the same size And input current The chopping current is only about the same size It was verified that the interleaved operation of the present embodiment has a reduced chopping current utility.

圖19為第一及第二耦合電感1、2之磁化電感電流波形,驗證本實施例操作在連續導通模式(CCM)。Figure 19 shows the magnetizing inductor current waveforms of the first and second coupled inductors 1, 2, verifying that the present embodiment operates in a continuous conduction mode (CCM).

圖20是第一及第二二極體D1、D2的電流及電壓波形圖,由圖可知 都沒有反向恢復問題,因此沒有反向恢復損失。且第一二極體D1電壓應力為 ,只有輸出電壓的四分之一,第二二極體D2電壓應力大約為 ,只有輸出電壓Vo的二分之一,驗證本實施例符合式十二、式十三的分析結果。 20 is a waveform diagram of current and voltage of the first and second diodes D1 and D2, as shown in the figure. with There is no reverse recovery problem, so there is no reverse recovery loss. And the first diode D1 voltage stress is , only one quarter of the output voltage, the voltage stress of the second diode D2 is approximately Only one-half of the output voltage Vo is verified, and this embodiment is verified to conform to the analysis results of Equations 12 and 13.

圖21 是第三及第四二極體D3、D4的電流及電壓波形圖,由圖可知三及第四二極體D3和D4的電壓應力均為200V,驗證本實施例符合式十四的分析結果。第三及第四二極體D3和D4的電流之反向恢復電流是很小的,因為第一及第二耦合電感1、2中漏電感 的存在緩和了反向恢復問題。 21 is a current and voltage waveform diagram of the third and fourth diodes D3 and D4. It can be seen from the figure that the voltage stresses of the third and fourth diodes D3 and D4 are both 200V, and it is verified that the present embodiment conforms to the fourteenth embodiment. Analysis results. The reverse recovery current of the currents of the third and fourth diodes D3 and D4 is small because the leakage inductances of the first and second coupled inductors 1, 2 with The existence eases the reverse recovery problem.

如圖22所示,為第一及第二開關S1、S2零電流切換波形圖,由圖可看到第一及第二開關S1、S2跨壓先降至0,才有電流流經開關,因此達到零電流切換(ZCS)的柔切功效,可降低切換損失,驗證本本實施例具有功率開關零電流切換功效。As shown in FIG. 22, the first and second switches S1 and S2 have zero current switching waveform diagrams. It can be seen that the first and second switches S1 and S2 are first reduced to zero across the voltage, and current flows through the switch. Therefore, the soft-cutting effect of the zero current switching (ZCS) is achieved, the switching loss can be reduced, and the power switching zero current switching function of the present embodiment is verified.

綜上所述,上述實施例具有以下優點:In summary, the above embodiment has the following advantages:

1. 具有較高電壓增益,由式九可知由串接的第一及第二電容C1、C2,配合第一及第二耦合電感1、2的次級側繞組Ns1、Ns2串聯第三電容C3的電路架構,且更可調整第一及第二耦合電感1、2的匝數比擴增電壓增益,符合高電壓增益的需求同時無需操作在極大的導通比。1. With higher voltage gain, it can be known from Equation 9 that the first and second capacitors C1 and C2 are connected in series, and the third side capacitors C3 are connected in series with the secondary side windings Ns1 and Ns2 of the first and second coupled inductors 1, 2 The circuit architecture, and more adjustable the first and second coupled inductors 1, 2 turns ratio amplification voltage gain, meets the requirements of high voltage gain without the need to operate at a very large conduction ratio.

2.具有低電壓應力,由於第一及第二開關S1、S2的電壓應力只有輸出電壓Vo的四分之一,可以使用導通電阻較小的低額定耐壓電晶體,而由式十二到式十四可知第一至第四二極體D1~D4也具有低電壓應力,因此,能降低導通損失。2. With low voltage stress, since the voltage stress of the first and second switches S1, S2 is only one quarter of the output voltage Vo, a low-rated piezoelectric crystal with a small on-resistance can be used, and Equation 14 shows that the first to fourth diodes D1 to D4 also have low voltage stress, and therefore, the conduction loss can be reduced.

3. 具有零電流切換功效,第一及第二開關S1、S2具有零電流切換的柔切性能,而能降低切換損失。3. With zero current switching efficiency, the first and second switches S1, S2 have the soft cutting performance of zero current switching, and can reduce the switching loss.

4.無逆向電流功耗,第一及第二二極體D1、D2在轉態成不導通之前,其流經的電流先降為零,所以第一及第二二極體D1、D2沒有反向恢復功率損失問題。4. There is no reverse current power consumption. Before the first and second diodes D1 and D2 are turned into non-conducting, the current flowing through them is first reduced to zero, so the first and second diodes D1 and D2 are not. Reverse recovery power loss problem.

5. 避免了電壓突波的問題,當第一及第二開關S1、S2切換成不導通時,第一及第二耦合電感1、2的漏電感能量,能夠由初級側傳送至次級側,避免了造成電壓突波的問題。5. The problem of voltage surge is avoided. When the first and second switches S1 and S2 are switched to be non-conducting, the leakage inductance energy of the first and second coupled inductors 1, 2 can be transmitted from the primary side to the secondary side. To avoid the problem of voltage surge.

6.高轉換效率,由於降低第一及第二開關S1、S2、第一至第四二極體D1~D4的導通損失,與零電流切換功效、第一至第四二極體D1~D4無逆向電流功耗與避免了電壓突波,而能有效提升轉換效率。6. High conversion efficiency, due to lowering the conduction losses of the first and second switches S1, S2, the first to fourth diodes D1 to D4, and the zero current switching effect, the first to fourth diodes D1 to D4 No reverse current consumption and avoiding voltage surges, which can effectively improve conversion efficiency.

7. 降低輸入電流漣波,由於第一及第二耦合電感1、2的初級側繞組Np1、Np2的第一端並接於提供該輸入電流i in的輸入電壓源(如太陽能電池模組輸出端、燃料電池),且第一及第二開關S1、S2相差1/2切換週期的交錯式操作,使得分別流經第一及第二耦合電感1、2的初級側繞組Np1、Np2的電流漣波能相消,降低輸入電流i in的漣波大小,而能減少太陽能電池模組輸出端的電解電容數量與延長燃料電池的使用壽命,降低系統整體成本。 7. Decrease the input current chopping because the first ends of the primary side windings Np1, Np2 of the first and second coupled inductors 1, 2 are connected in parallel to an input voltage source (such as a solar cell module output) that provides the input current i in End, fuel cell), and the first and second switches S1, S2 are separated by an interval of 1/2 switching period, so that the current flows through the primary side windings Np1, Np2 of the first and second coupled inductors 1, 2, respectively The chopping wave can cancel, reduce the chopping size of the input current i in , and can reduce the number of electrolytic capacitors at the output end of the solar cell module and prolong the service life of the fuel cell, thereby reducing the overall cost of the system.

8.本案的磁性鐵芯的數量只有二個,不只容易設計第一及第二耦合電感1、2,且降低元件成本,又其他元件數目也少,例如開關的數目只有二個、二極體的數目只有四個、電容的數目只有四個。故確實能達成本發明之目的。8. The number of magnetic cores in this case is only two. It is not only easy to design the first and second coupling inductors 1, 2, but also reduce the component cost, and the number of other components is also small. For example, the number of switches is only two, and the number of the diodes is only two. The number is only four and the number of capacitors is only four. Therefore, the object of the present invention can be achieved.

惟以上所述者,僅為本發明之實施例而已,當不能以此限定本發明實施之範圍,凡是依本發明申請專利範圍及專利說明書內容所作之簡單的等效變化與修飾,皆仍屬本發明專利涵蓋之範圍內。 However, the above is only the embodiment of the present invention, and the scope of the invention is not limited thereto, and all the equivalent equivalent changes and modifications according to the scope of the patent application and the patent specification of the present invention are still The scope of the invention is covered.

1‧‧‧第一耦合電感 1‧‧‧First coupled inductor

Np1‧‧‧初級側繞組 Np1‧‧‧ primary side winding

Ns1‧‧‧次級側繞組 Ns1‧‧‧ secondary side winding

2‧‧‧第二耦合電感 2‧‧‧Second coupled inductor

Np2‧‧‧初級側繞組 Np2‧‧‧ primary side winding

Ns2‧‧‧次級側繞組 Ns2‧‧‧ secondary side winding

S1‧‧‧第一開關 S1‧‧‧ first switch

S2‧‧‧第二開關 S2‧‧‧ second switch

D1‧‧‧第一二極體 D1‧‧‧First Diode

D2‧‧‧第二二極體 D2‧‧‧ second diode

D3‧‧‧第三二極體 D3‧‧‧ third diode

3‧‧‧儲能元件 3‧‧‧ Energy storage components

C1‧‧‧第一電容 C1‧‧‧first capacitor

C2‧‧‧第二電容 C2‧‧‧second capacitor

C3‧‧‧次級側電容 C3‧‧‧Secondary side capacitor

4‧‧‧整流輸出級 4‧‧‧Rectified output stage

D4‧‧‧第四二極體 D4‧‧‧ fourth diode

C4‧‧‧第四電容 C4‧‧‧fourth capacitor

5‧‧‧控制單元 5‧‧‧Control unit

Lm1‧‧‧磁化電感 Lm1‧‧‧ Magnetized Inductance

Lm2‧‧‧磁化電感 Lm2‧‧‧ Magnetized Inductance

Lk1‧‧‧漏電感 Lk1‧‧‧ leakage inductance

Lk2‧‧‧漏電感 Lk2‧‧‧ leakage inductance

Vin‧‧‧輸入電壓 Vin‧‧‧Input voltage

Vo‧‧‧輸出電壓 Vo‧‧‧ output voltage

iin‧‧‧輸入電流 i in ‧‧‧Input current

iLk1‧‧‧漏電感電流 i Lk1 ‧‧‧Leakage inductor current

iLk2‧‧‧漏電感電流 i Lk2 ‧‧‧Draining inductor current

iD1‧‧‧流過第一二極體的電流 i D1 ‧‧‧current flowing through the first diode

iD2‧‧‧流過第二二極體的電流 i D2 ‧‧‧current flowing through the second diode

iD3‧‧‧流過第三二極體的電流 i D3 ‧‧‧current flowing through the third diode

iD4‧‧‧流過第四二極體的電流 i D4 ‧‧‧current flowing through the fourth diode

vD1‧‧‧第一二極體的跨壓 v D1 ‧‧‧The cross-pressure of the first diode

vD2‧‧‧第二二極體的跨壓 v D2 ‧‧‧Secondary voltage of the second diode

vD3‧‧‧第三二極體的跨壓 v D3 ‧‧‧Transverse pressure of the third diode

vD4‧‧‧第四二極體的跨壓 v D4 ‧‧‧Transverse pressure of the fourth diode

vC1‧‧‧第一電容的跨壓 v C1 ‧‧‧cross pressure of the first capacitor

vC2‧‧‧第二電容的跨壓 v C2 ‧‧‧cross-voltage of the second capacitor

vC3‧‧‧第三電容的跨壓 v C3 ‧‧‧cross-voltage of the third capacitor

vC4‧‧‧第四電容的跨壓 v C4 ‧‧‧cross voltage of the fourth capacitor

本發明之其他的特徵及功效,將於參照圖式的實施方式中清楚地呈現,其中: 圖1是習知的升壓轉換器的一電路圖; 圖2是習知的升壓轉換器的電壓增益對導通比的一關係曲線圖; 圖3是本發明交錯式高升壓直流轉換器之一實施例的一電路圖; 圖4是該實施例的一等效電路圖; 圖5是該實施例的一操作時序圖; 圖6是該實施例操作於第一階段的一電路圖; 圖7是該實施例操作於第二階段的一電路圖; 圖8是該實施例操作於第三階段的一電路圖; 圖9是該實施例操作於第四階段的一電路圖; 圖10是該實施例操作於第五階段的一電路圖; 圖11是該實施例操作於第六階段的一電路圖; 圖12是該實施例操作於第七階段的一電路圖; 圖13是該實施例操作於第八階段的一電路圖; 圖14是不同耦合係數和電壓增益的一關係曲線圖; 圖15是耦合電感匝數比及導通比的一電壓增益曲線圖; 圖16是開關的驅動信號、輸入電壓與輸出電壓的一波形圖; 圖17是開關驅動信號與開關跨壓信號的一波形圖; 圖18是第一及第二耦合電感的漏電感電流及總輸入電流的一波形圖; 圖19是第一及第二耦合電感之磁化電感電流的一波形圖; 圖20是第一及第二二極體的電流及電壓的一波形圖; 圖21是第三及第四二極體的電流及電壓的一波形圖;及 圖22是第一及第二開關零電流切換的一波形圖。Other features and effects of the present invention will be apparent from the following description of the drawings, wherein: Figure 1 is a circuit diagram of a conventional boost converter; Figure 2 is a conventional boost converter voltage Figure 3 is a circuit diagram of an embodiment of the interleaved high-boost DC converter of the present invention; Figure 4 is an equivalent circuit diagram of the embodiment; Figure 5 is an equivalent circuit diagram of the embodiment Figure 6 is a circuit diagram of the operation of the first stage of the embodiment; Figure 7 is a circuit diagram of the operation of the second stage of the embodiment; Figure 8 is a circuit diagram of the operation of the embodiment in the third stage; Figure 9 is a circuit diagram of the operation of the embodiment in the fourth stage; Figure 10 is a circuit diagram of the operation of the embodiment in the fifth stage; Figure 11 is a circuit diagram of the operation of the embodiment in the sixth stage; Figure 12 is a circuit diagram of the embodiment For example, a circuit diagram of the seventh stage is operated; FIG. 13 is a circuit diagram of the eighth stage of operation of the embodiment; FIG. 14 is a relationship diagram of different coupling coefficients and voltage gain; FIG. 15 is a coupled inductor turns ratio and conduction. Than one Gain graph; Figure 16 is a waveform diagram of the drive signal, input voltage and output voltage of the switch; Figure 17 is a waveform diagram of the switch drive signal and the switch across the voltage signal; Figure 18 is the leakage of the first and second coupled inductors FIG. 19 is a waveform diagram of magnetizing inductor currents of first and second coupled inductors; FIG. 20 is a waveform diagram of current and voltage of first and second diodes; 21 is a waveform diagram of current and voltage of the third and fourth diodes; and FIG. 22 is a waveform diagram of zero current switching of the first and second switches.

1‧‧‧第一耦合電感 1‧‧‧First coupled inductor

Np1‧‧‧初級側繞組 Np1‧‧‧ primary side winding

Ns1‧‧‧次級側繞組 Ns1‧‧‧ secondary side winding

2‧‧‧第二耦合電感 2‧‧‧Second coupled inductor

Np2‧‧‧初級側繞組 Np2‧‧‧ primary side winding

Ns2‧‧‧次級側繞組 Ns2‧‧‧ secondary side winding

S1‧‧‧第一開關 S1‧‧‧ first switch

S2‧‧‧第二開關 S2‧‧‧ second switch

D1‧‧‧第一二極體 D1‧‧‧First Diode

D2‧‧‧第二二極體 D2‧‧‧ second diode

D3‧‧‧第三二極體 D3‧‧‧ third diode

3‧‧‧儲能元件 3‧‧‧ Energy storage components

C1‧‧‧第一電容 C1‧‧‧first capacitor

C2‧‧‧第二電容 C2‧‧‧second capacitor

C3‧‧‧次級側電容 C3‧‧‧Secondary side capacitor

4‧‧‧整流輸出級 4‧‧‧Rectified output stage

D4‧‧‧第四二極體 D4‧‧‧ fourth diode

C4‧‧‧第四電容 C4‧‧‧fourth capacitor

5‧‧‧控制單元 5‧‧‧Control unit

Vin‧‧‧輸入電壓 Vin‧‧‧Input voltage

Vo‧‧‧輸出電壓 Vo‧‧‧ output voltage

Claims (10)

一種交錯式高升壓直流轉換器,包含: 一個第一耦合電感及一個第二耦合電感,每一個耦合電感具有一個初級側繞組及一個次級側繞組,每一個側繞組具有一第一端及一第二端,其中,該第一及第二耦合電感的初級側繞組的第一端電連接一起以接收一呈直流的輸入電壓,該第一耦合電感的次級側繞組的第二端電連接該第二耦合電感的次級側繞組的第二端; 一個第一開關,具有一電連接於該第一耦合電感的初級側繞組的第一端的第一端,及一第二端,且該第一開關受控制以切換於導通狀態和不導通狀態間,當該第一開關導通時,該第一耦合電感的初級側繞組接收一第一電流充電而產生一第一初級側電壓,當該第一開關不導通時,該第一耦合電感的次級側繞組磁感應而產生一正比於該第一初級側電壓的第一次級側電壓; 一個第二開關,具有一電連接於該第二耦合電感的初級側繞組的第一端的第一端,及一第二端,且該第二開關受控制以切換於導通狀態和不導通狀態間,當該第二開關導通時,該該第二耦合電感的初級側繞組接收一第二電流充電而產生一第二初級側電壓,當該第一開關不導通時,該第二耦合電感的次級側繞組磁感應而產生一正比於該第二初級側電壓的第二次級側電壓,其中,該第一開關與第二開關處於導通狀態的時間點存在一相位差; 一個第一二極體,具有一電連接該第一開關的第二端的陰極及一陽極; 一個第二二極體,具有一電連接該第二開關的第二端的陽極及一電連接該第二耦合電感的次級側繞組的第一端的陰極; 一個儲能元件,電連接於該第一開關的第一端、該第一二極體的陽極與該第二二極體的陰極間,當該第一二極體導通時,該儲能元件用以根據來自該第一與第二耦合電感的初級側繞組的放電,而產生一儲能電壓,該儲能電壓正比於該第一及第二初級側電壓的加總; 一個第三二極體,具有一電連接該第一二極體的陰極的陽極,及一陰極; 一個次級側電容,具有一電連接該第一耦合電感的次級側繞組的第一端的第一端,及一電連接該第三二極體的陰極第二端,該次級側電容用以根據來自該第一耦合電感的次級側繞組的放電,而產生一正比該第一次級側電壓的電容電壓;及 一個整流輸出級,電連接該次級側電容的第二端,用以根據來自該第二耦合電感的次級側繞組的放電、該儲能元件的放電與該次級側電容的放電產生一呈直流的輸出電壓,該輸出電壓正比於該儲能電壓、該電容電壓與該第二次級側電壓的加總。An interleaved high-boost DC converter comprising: a first coupled inductor and a second coupled inductor, each coupled inductor having a primary side winding and a secondary side winding, each side winding having a first end and a second end, wherein the first ends of the primary side windings of the first and second coupled inductors are electrically connected together to receive a DC input voltage, and the second end of the secondary side winding of the first coupled inductor is electrically a second end of the secondary side winding of the second coupled inductor; a first switch having a first end electrically coupled to the first end of the primary side winding of the first coupled inductor, and a second end, And the first switch is controlled to switch between the conductive state and the non-conductive state. When the first switch is turned on, the primary side winding of the first coupled inductor receives a first current charge to generate a first primary side voltage. When the first switch is not conducting, the secondary side winding of the first coupled inductor is magnetically induced to generate a first secondary side voltage proportional to the first primary side voltage; a second switch having an electrical connection a first end of the first end of the primary side winding of the second coupled inductor, and a second end, and the second switch is controlled to switch between a conducting state and a non-conducting state, when the second switch is turned on, The primary side winding of the second coupled inductor receives a second current charge to generate a second primary side voltage. When the first switch is non-conductive, the secondary side winding of the second coupled inductor is magnetically induced to produce a proportional a second secondary side voltage of the second primary side voltage, wherein a phase difference exists between a time when the first switch and the second switch are in an on state; a first diode having an electrical connection to the first switch a cathode of the second end and an anode; a second diode having an anode electrically connected to the second end of the second switch and a cathode electrically connected to the first end of the secondary side winding of the second coupled inductor; An energy storage component electrically connected between the first end of the first switch, the anode of the first diode, and the cathode of the second diode, when the first diode is turned on, the energy storage component Used to derive from the first and the first Discharging the primary side winding of the inductor to generate a stored voltage that is proportional to the sum of the first and second primary side voltages; a third diode having an electrical connection to the first two An anode of the cathode of the polar body, and a cathode; a secondary side capacitor having a first end electrically connected to the first end of the secondary side winding of the first coupled inductor, and an electrical connection to the third diode a second end of the cathode, the secondary side capacitor is configured to generate a capacitor voltage proportional to the first secondary side voltage according to the discharge from the secondary side winding of the first coupled inductor; and a rectified output stage, Connecting a second end of the secondary side capacitor for generating a DC output voltage according to a discharge from the secondary side winding of the second coupled inductor, a discharge of the energy storage element, and a discharge of the secondary side capacitor, The output voltage is proportional to the sum of the storage voltage, the capacitance voltage, and the second secondary side voltage. 如請求項1所述的交錯式高升壓直流轉換器,其中,該整流輸出級包括: 一個第四二極體,具有一電連接該次級側電容的第二端的陽極,及一陰極;及一個輸出電容,電連接於該第四二極體的陰極與該第一二極體的陽極之間,用以提供該輸出電壓。 The interleaved high-boost DC converter of claim 1, wherein the rectified output stage comprises: a fourth diode having an anode electrically connected to the second end of the secondary side capacitor, and a cathode; And an output capacitor electrically connected between the cathode of the fourth diode and the anode of the first diode to provide the output voltage. 如請求項1所述的交錯式高升壓直流轉換器,其中,該儲能元件包括:一個第一電容,具有一個電連接該第一開關的第一端的第一端,及一電連接該第一二極體的陽極的第二端;及一個第二電容,具有一個電連接該第一開關的第一端的第一端,及一電連接該第二二極體的陰極的第二端。 The interleaved high-boost DC converter of claim 1, wherein the energy storage component comprises: a first capacitor having a first end electrically connected to the first end of the first switch, and an electrical connection a second end of the anode of the first diode; and a second capacitor having a first end electrically connected to the first end of the first switch, and a second electrically connected to the cathode of the second diode Two ends. 如請求項1所述的交錯式高升壓直流轉換器,其中,每一初級側繞組的第一端是打點端,每一初級側繞組的第二端是非打點端。 The interleaved high-boost DC converter of claim 1, wherein the first end of each primary side winding is a striking end and the second end of each primary side winding is a non-tapping end. 如請求項1所述的交錯式高升壓直流轉換器,其中,每一次級側繞組的第一端是打點端,每一次級側繞組的第二端是非打點端。 The interleaved high-boost DC converter of claim 1, wherein the first end of each secondary side winding is a striking end and the second end of each secondary side winding is a non-tapping end. 如請求項1所述的交錯式高升壓直流轉換器,其中,該第一開關是一N型功率半導體電晶體,且該第一開關的第一端是汲極,該第一開關的第二端是源極。 The interleaved high-boost DC converter of claim 1, wherein the first switch is an N-type power semiconductor transistor, and the first end of the first switch is a drain, and the first switch The second end is the source. 如請求項1所述的交錯式高升壓直流轉換器,其中,該第二開關是一N型功率半導體電晶體,且該第一開關的第一端是汲極,該第一開關的第二端是源極。 The interleaved high-boost DC converter of claim 1, wherein the second switch is an N-type power semiconductor transistor, and the first end of the first switch is a drain, and the first switch The second end is the source. 如請求項1所述的交錯式高升壓直流轉換器,其中,該第一及第二開關的切換是零電流切換。 The interleaved high-boost DC converter of claim 1, wherein the switching of the first and second switches is a zero current switching. 如請求項1所述的交錯式高升壓直流轉換器,更包括一控制單元,該控制單元產生一切換該第一開關的第一脈波調變信號及一切換該第二開關的第二脈波調變信號,該第一脈波調變信號與該第二脈波調變信號具有相同的周期時間。 The interleaved high-boost DC converter according to claim 1, further comprising a control unit, wherein the control unit generates a first pulse modulation signal for switching the first switch and a second switch for switching the second switch a pulse wave modulation signal, the first pulse wave modulation signal having the same cycle time as the second pulse wave modulation signal. 如請求項9所述的交錯式高升壓直流轉換器,其中,該第一及第二脈波調變信號的相位差為周期時間的二分之一。 The interleaved high-boost DC converter of claim 9, wherein the phase difference of the first and second pulse-modulated signals is one-half of a cycle time.
TW105106061A 2016-03-01 2016-03-01 Staggered high boost DC converter TWI569565B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW105106061A TWI569565B (en) 2016-03-01 2016-03-01 Staggered high boost DC converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW105106061A TWI569565B (en) 2016-03-01 2016-03-01 Staggered high boost DC converter

Publications (2)

Publication Number Publication Date
TWI569565B true TWI569565B (en) 2017-02-01
TW201733255A TW201733255A (en) 2017-09-16

Family

ID=58608411

Family Applications (1)

Application Number Title Priority Date Filing Date
TW105106061A TWI569565B (en) 2016-03-01 2016-03-01 Staggered high boost DC converter

Country Status (1)

Country Link
TW (1) TWI569565B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112615535A (en) * 2020-11-30 2021-04-06 北京交通大学 Soft start circuit for interleaved DC converter and control method thereof
TWI764403B (en) * 2020-12-02 2022-05-11 遠東科技大學 Voltage conversion device

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI682617B (en) * 2018-06-28 2020-01-11 崑山科技大學 Interleaved ultra-high boost converter
TWI708472B (en) * 2020-03-31 2020-10-21 義守大學 Converter
TWI762396B (en) * 2021-08-02 2022-04-21 崑山科技大學 High voltage conversion ratio dc converter

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWM447043U (en) * 2012-05-04 2013-02-11 Allis Electric Co Ltd High efficient high step-up dc converter with interleaved soft switching mechanism
TW201507336A (en) * 2013-08-09 2015-02-16 Nat Univ Chin Yi Technology High voltage ratio interleaved converter with soft-switching using single auxiliary switch
US20150155782A1 (en) * 2013-12-03 2015-06-04 Em Microelectronic-Marin Sa Discontinuous mode dc-dc converter
TWI501531B (en) * 2014-03-18 2015-09-21 Univ Kun Shan Interleaved zero voltage switching converter

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWM447043U (en) * 2012-05-04 2013-02-11 Allis Electric Co Ltd High efficient high step-up dc converter with interleaved soft switching mechanism
TW201507336A (en) * 2013-08-09 2015-02-16 Nat Univ Chin Yi Technology High voltage ratio interleaved converter with soft-switching using single auxiliary switch
US20150155782A1 (en) * 2013-12-03 2015-06-04 Em Microelectronic-Marin Sa Discontinuous mode dc-dc converter
TWI501531B (en) * 2014-03-18 2015-09-21 Univ Kun Shan Interleaved zero voltage switching converter

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112615535A (en) * 2020-11-30 2021-04-06 北京交通大学 Soft start circuit for interleaved DC converter and control method thereof
CN112615535B (en) * 2020-11-30 2022-03-29 北京交通大学 Soft start circuit for interleaved DC converter and control method thereof
TWI764403B (en) * 2020-12-02 2022-05-11 遠東科技大學 Voltage conversion device

Also Published As

Publication number Publication date
TW201733255A (en) 2017-09-16

Similar Documents

Publication Publication Date Title
Andrade et al. Analysis and design of high-efficiency hybrid high step-up DC–DC converter for distributed PV generation systems
TWI569565B (en) Staggered high boost DC converter
Hasanpour et al. A novel full soft-switching high-gain DC/DC converter based on three-winding coupled-inductor
TWI584564B (en) Soft-switching and low input or output current ripple power inversion or rectifier circuit
TWI646768B (en) High boost converter
TWI580166B (en) Interleaved boost converter
TWI520472B (en) High efficiency wide range of output voltage of the DC power boost circuit
Wang et al. High efficiency high step-up isolated dc-dc converter for photovoltaic applications
TWI666863B (en) High boost DC converter
TW202207598A (en) High voltage gain converter that includes an input circuit, first and second transformers, first to third output diodes, and an output circuit
TWI501527B (en) High voltage ratio interleaved converter with soft-switching using single auxiliary switch
EP2680418B1 (en) A common-core power factor correction resonant converter
TW201332272A (en) High step-up DC-DC converter and method thereof
TW201644165A (en) High step-up DC power converter
Hwu et al. An isolated high step-up converter with continuous input current and LC snubber
TWI658684B (en) High buck converter
TW201703414A (en) Direct current power converter
TWI439034B (en) Zero voltage switching power converter
TWI441435B (en) Low voltage stress DC converter
TWI587618B (en) High buck converter
TWI580167B (en) Single stage buck converter
Kao et al. Zero voltage switching high step-up DC-DC converter with coupled-inductor
KR101721321B1 (en) Hybride type LED Power Supply
TWI762396B (en) High voltage conversion ratio dc converter
TWI665859B (en) Boost converter and boost system

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees