TW201507336A - High voltage ratio interleaved converter with soft-switching using single auxiliary switch - Google Patents

Abstract

A high voltage ratio interleaved converter with soft-switching using single auxiliary switch is disclosed. The converter includes a first boost circuit, a second boost circuit, a first block diode, a second block diode, a resonant inductor, an auxiliary switch, a resonant capacitor, an auxiliary switch diode, and an auxiliary diode. The first boost circuit includes a first main switch. The second boost circuit includes a second main switch, the second boost circuit is electrically connected to the first boost circuit. The first block diode is electrically connected to the first main switch. The second block diode is electrically connected to the second main switch. The auxiliary switch electrically connects the first and the second block diode through the resonate inductor. The auxiliary switch diode, the resonate capacitor, and the auxiliary diode respectively are electrically connected to the auxiliary switch for completing soft-switching.

Description

Interleaved high boost ratio soft-cut converter with single auxiliary switch

This invention relates to an interleaved high step-up ratio soft-cut converter, and more particularly to an interleaved high step-up ratio soft-cut converter that employs only a single auxiliary switch.

In recent years, renewable energy and clean energy have received more and more attention, but the output voltage of clean energy such as fuel cell (FC) or photovoltaic module is often unstable, and its output voltage will be actual. The operating conditions change, and the output voltage of the fuel cell is generally low, and various defects and demands are integrated. Therefore, a power converter is developed to boost the output voltage to a stable voltage for load or other applications.

The commonly used boost converter has the advantages of simple structure and easy control. Later, an interleaved boost converter was developed. The interleaved boost converter not only has the advantages of a boost converter, but also reduces switching components and inductors by an interleaved circuit architecture. (Inductor) current stress, so it has the advantage of reducing input current ripple.

Since the voltage gain ratio of the interleaved boost converter is the same as that of the boost converter, a circuit architecture such as a staggered double-voltage high boost ratio converter is proposed. The staggered doubling-type high step-up ratio converter achieves the same boosting effect with a lower duty cycle, thereby further reducing the conduction loss and switching loss of the switch.

However, the above-mentioned types of converters have traditionally used hard switching, and cannot immediately reduce the voltage or current across the switch to zero, thus causing a large switching loss, resulting in converter switching. The conversion efficiency is reduced. In addition, the high-frequency switching caused by the hard-switching switching element during the switching process also causes severe electromagnetic interference (EMI), which in turn affects the stability of the system.

Therefore, in order to improve the overall efficiency of the converter, a flexible switching technique has been developed to reduce the switching loss and switching stress of the switching elements. A variety of flexible switching technology architectures have been proposed, such as the architecture proposed by YCHsieh, TCHsueh, and HCYen in 2009 ("An Interleaved Boost Converter with Zero-Voltage Transition," IEEE Transaction on Power Electronics, Vol. No.4, pp.973-978, 2009.), and the architecture proposed by S. Park and S. Choi in 2010 ("Soft-Switched CCM Boost Converters with High Voltage Gain for High-Power Applications," IEEE Transaction on Power Electronics, Vol. 25, No. 5, pp. 1211-1217, 2010.), but the switching elements of these two architectures only have zero voltage switching, and cannot further reduce the switching loss of switching elements. .

In addition, the architecture proposed by CMde Oliveira Stein, JR Pinheiro and HL Hey in 2002 ("A ZCT Auxiliary Commutation Circuit for Interleaved Boost Converters Operating in Critical Conduction Mode," IEEE Transaction on Power Electronics, Vol. 17, No. 6, pp .954-962, 2002.) Although there is zero current switching, it does not have zero voltage switching and does not have a high boost ratio, so the switching loss of the switch cannot be effectively reduced.

Another example is the architecture proposed by G. Yao, A. Chen and X. He in 2007 ("Soft Switching Circuit for Interleaved Boost Converters," IEEE Transaction on Power Electronics, Vol. 22, No. 1, pp. 80-86, 2007.) Although there are zero voltage and zero current switching, this architecture requires multiple switches, so the control circuit is complicated, and the voltage rating of each switching element must be at least the output voltage rating of the converter. .

Another example is the architecture proposed by YTChen, SMShiu and RHLiang in 2012 ("Analysis and Design of a Zero-Voltage-Switching and Zero-Current-Switching Interleaved Boost Converter," IEEE Transaction on Power Electronics, Vol. 27, No. .1, pp.161-173, 2012.) Although only a single auxiliary switch can be used to achieve zero voltage and zero current, but does not have a high boost ratio, and the main switch of this architecture The withstand voltage of components such as (main switch), auxiliary switch, and capacitor must be greater than the rated value of the output voltage.

Therefore, how to use a simple circuit to effectively improve the efficiency of the converter, and has a high step-up ratio, the converter that achieves boost, regulation, high efficiency, low electromagnetic interference and high system stability has become an important and extremely important solved problem.

Accordingly, it is an object of the present invention to provide an interleaved high step-up ratio soft-cut converter with a single auxiliary switch that can achieve zero voltage switching of the main switching element of the converter using only a single auxiliary switch. , ZVS) and zero current switch (ZCS) flexible switching (flexible) characteristics, not only improve the efficiency of the converter, but also reduce the degree of electromagnetic interference, and without the need for complex circuits, can achieve high boost ratio.

According to an embodiment of the invention, the interleaved high step-up ratio flexible-cut converter of the single auxiliary switch comprises a first boosting circuit, a second boosting circuit, a first blocking diode, and a blocking diode. a second blocking diode, a resonant inductor, an auxiliary switch, a resonant capacitor, an auxiliary switching diode and an auxiliary diode, wherein the first boosting circuit comprises a first main switch and a second boosting circuit The second boosting circuit is electrically connected to the first boosting circuit, and the second boosting circuit includes a second main switch. One end of the first blocking diode is electrically connected to the first end of the first main switch, and the second blocking diode is electrically connected. One end is electrically connected to the first end of the second main switch, and the first end of the resonant inductor is electrically connected to the other end of the first blocking diode and the other end of the second blocking diode The first end of the auxiliary switch is electrically connected to the other end of the resonant inductor, and the two ends of the resonant capacitor are respectively electrically connected to the first end of the resonant inductor and the second end of the auxiliary switch, and the auxiliary switch diode and The auxiliary switch is connected in parallel, one end of the auxiliary diode is electrically connected to the first end of the auxiliary switch, and the other end of the auxiliary diode is electrically connected to the second boosting circuit.

The first step-up circuit further includes a first inductor, a first main switch diode, a first auxiliary capacitor, and a first a diode, wherein one end of the first inductor is electrically connected to the first end of the first main switch, the first main switch diode is connected in parallel with the first main switch, and the first auxiliary capacitor is connected in parallel with the first main switch, first One end of the diode is electrically connected to the first end of the first main switch. The second boosting circuit may further include a second inductor, a second main switch diode, a second auxiliary capacitor, a clamp capacitor, and a second diode. Electrically connected to the first end of the second main switch, the second main switch diode is connected in parallel with the second main switch, the second auxiliary capacitor is connected in parallel with the second main switch, and one end of the clamp capacitor and the second main switch The first end of the second diode is electrically connected to the other end of the second diode, and the other end of the first diode is electrically connected to the first end of the second diode. The second end of one of the second diodes is electrically connected to the auxiliary diode.

The resonant capacitor may be an external capacitor or an auxiliary switch parasitic capacitor. The first auxiliary capacitor may be an external capacitor or a parasitic capacitor of the first main switch, and the second auxiliary capacitor may be an external capacitor or a parasitic capacitor of the second main switch. .

According to the above-mentioned single auxiliary switch, the interleaved high step-up ratio flexible switching converter, wherein the other end of the first inductor and the second end of the first main switch can be electrically connected to an input voltage, and the second An output capacitor and an output resistor are electrically connected between the second end of the pole body and the second end of the second main switch, wherein the first main switch and the second main switch may be the same switching element.

The interleaved high-boost ratio soft-cut converter according to the above single auxiliary switch may further include a trigger signal generator, and the trigger signal generator is electrically connected to the first main switch, the second main switch and the auxiliary switch, and the trigger signal The generator is configured to delay turning on a first delay time of the first main switch, and turn on the auxiliary switch at the first delay time, the trigger signal generator can be used to delay turning on a second delay time of the second main switch, and in the second The delay time turns on the auxiliary switch. The trigger signal generator can turn on the auxiliary switch before the first main switch is turned on and the second main switch is turned on.

100‧‧‧First booster circuit

200‧‧‧second boost circuit

310‧‧‧First main switch original signal generator

320‧‧‧Second main switch original signal generator

410‧‧‧First retarder

420‧‧‧second retarder

510‧‧‧First reverse brake

520‧‧‧second reverse gate

610‧‧‧First Gate

620‧‧‧Second Gate

621‧‧‧First main switch control signal contact

630‧‧‧ Third Gate

640‧‧‧fourth gate

641‧‧‧Second main switch control signal contact

650‧‧‧ fifth gate

700‧‧‧ or gate

701‧‧‧Auxiliary switch control signal contact

C ₁ ‧‧‧Clamp Capacitor

C _o ‧‧‧output capacitor

C _r ‧‧‧resonance capacitor

C _r1 ‧‧‧First auxiliary capacitor

C _r2 ‧‧‧Second auxiliary capacitor

D ₁ ‧‧‧First Diode

D ₂ ‧‧‧Secondary

D _r ‧‧‧Auxiliary diode

D _r1 ‧‧‧first blocking diode

D _r2 ‧‧‧Second blocking diode

D _S1 ‧‧‧First main switch diode

D _S2 ‧‧‧Second main switch diode

D _Sr ‧‧‧Auxiliary Switch Diode

I _i ‧‧‧Input current

i _C1 ‧‧‧Clamp Capacitor Current

i _D1 ‧‧‧first diode current

i _D2 ‧‧‧Second diode current

i _Dr ‧‧‧Auxiliary Diode Current

i _L1 ‧‧‧first inductor current

i _L2 ‧‧‧second inductor current

i _Lr ‧‧‧Resonance inductor current

i _S1 ‧‧‧first main switch current

i _S2 ‧‧‧second main switch current

i _Sr ‧‧‧Auxiliary Switch Current

L ₁ ‧‧‧first inductance

L ₂ ‧‧‧second inductance

L _r ‧‧‧Resonance inductance

R _o ‧‧‧ output resistance

S ₁ ‧‧‧first main switch

S _1c ‧‧‧First main switch control signal

S ₂ ‧‧‧second main switch

S _2c ‧‧‧Second main switch control signal

S _r ‧‧‧Auxiliary switch

S _rc ‧‧‧Auxiliary switch control signal

V _i ‧‧‧ input voltage

v _C1 ‧‧‧Clamp Capacitor Voltage

v _Cr ‧‧‧resonant capacitor voltage

v _Cr1 ‧‧‧First auxiliary capacitor voltage

v _Cr2 ‧‧‧Second auxiliary capacitor voltage

v _D1 ‧‧‧first diode voltage

v _D2 ‧‧‧second diode voltage

v _Lr ‧‧‧Resonance inductor voltage

v _{dS1 ‧‧‧First} main switch diode voltage

v _{dS2 ‧‧‧Second} main switch diode voltage

v _o ‧‧‧output voltage

v _Sr ‧‧‧Auxiliary Switch Voltage

1 is a circuit diagram of an interleaved high step-up ratio soft-cut converter of a single auxiliary switch in accordance with an embodiment of the present invention.

Fig. 2 is a circuit diagram showing the trigger signal generator used in Fig. 1.

Fig. 3 is a schematic view showing the conduction state of the first mode in the first mode.

Fig. 4 is a view showing the conduction state of the first mode in the second mode.

Fig. 5 is a schematic view showing the conduction state of the first mode in the mode 3.

Fig. 6 is a schematic view showing the conduction state of the first mode in the mode 4.

Fig. 7 is a schematic view showing the conduction state of the first mode in the mode 5.

Fig. 8 is a schematic view showing the conduction state of the first mode in the mode 6.

Fig. 9 is a schematic view showing the conduction state of the first mode in the mode 7.

Fig. 10 is a schematic view showing the conduction state of the first mode in the mode 8.

Fig. 11 is a view showing the conduction state of the first mode in the mode 9.

Fig. 12 is a view showing the conduction state of the first mode in the first mode.

Fig. 13 is a view showing the conduction state of the first mode in the mode 11.

Fig. 14 is a view showing the conduction state of the first mode in the mode 12.

Fig. 15 is a waveform diagram showing the main elements in Fig. 1 in modes 1 to 12.

Figure 16 is a diagram showing an embodiment of the interleaved high-boost ratio flexible-cut converter of the single auxiliary switch according to Figure 1, operating at 300 W, the first main switch control signal, the voltage of the first main switch, and An analog waveform of the current of the first main switch.

Figure 17 is a diagram showing the analog waveforms of the second main switch control signal, the voltage of the second main switch, and the current of the second main switch when operating at 300 W in the above embodiment.

Figure 18 is a diagram showing the analog waveforms of the auxiliary switch control signal, the voltage of the auxiliary switch, and the current of the auxiliary switch when operating at 300 W in the above embodiment.

First, the basic structure

Please refer to FIG. 1 , which is a circuit diagram of an interleaved high boost ratio flexible cut converter of a single auxiliary switch according to an embodiment of the invention. Single auxiliary switch high boosting ratio of the interleaved soft-cut comprises a first boost converter circuit 100, a second boost circuit 200, a first block the diode _{Dr. 1,} a second block the diode Dr ₂ , a resonant inductor Lr , an auxiliary switch S _r , a resonant capacitor Cr , an auxiliary switching diode D _Sr and an auxiliary diode D _r . The auxiliary switch S _r has a contact 701 for receiving an auxiliary switch control signal, and the auxiliary switch control signal is used for controlling the opening or closing of the auxiliary switch S _r .

The first booster circuit 100 includes a first main switch S ₁ , a first inductor L ₁ , a first main switch diode D _S1 , a first auxiliary capacitor C _r1 and a first diode D _{1 .} . The first main switch S ₁ has a contact 621 for receiving a first main switch control signal, and the first main switch control signal is used for controlling the opening or closing of the first main switch S ₁ . One end of the first inductor L ₁ is electrically connected to the first end of the first main switch S ₁ , and the first main switch diode D _S1 is connected in parallel with the first main switch S ₁ , and the first auxiliary capacitor C _r1 and the first main The switch S _{1 is} connected in parallel, and one end of the first diode D ₁ is electrically connected to the first end of the first main switch S ₁ .

The second booster circuit 200 is electrically connected to the first booster circuit 100. The second booster circuit 200 includes a second main switch S ₂ , a second inductor L ₂ , and a second main switch diode D _{S2 .} a second auxiliary capacitor C _r2 , a clamp capacitor C ₁ and a second diode D ₂ . The second main switch S ₂ has a contact 641 for receiving a second main switch control signal, and the second main switch control signal is for controlling the opening or closing of the second main switch S ₂ . One end of the second inductor L ₂ is electrically connected to the first end of the second main switch S ₂ , the second main switch diode D _S2 is connected in parallel with the second main switch S ₂ , and the second auxiliary capacitor C _r2 and the second main The switch S _{2 is} connected in parallel, one end of the clamp capacitor C ₁ is electrically connected to the first end of the second main switch S _{2 , and} the first end of the second diode D ₂ and the other end of the clamp capacitor C ₁ are electrically connected. The other end of the first diode D ₁ is electrically connected to the first end of the second diode D ₂ .

Wherein one end of the first D _r1 block the diode and the first one of the primary switch S ₁ is electrically connected to a first end, a second block the diode Dr and the second end ₂ of the main switch S _2, one end of a first electrically The first end of the resonant inductor L _r is electrically connected to the other end of the first blocking diode D _{r1 and} the other end of the second blocking diode Dr ₂ , and the first end of the auxiliary switch S _r is The other end of the resonant inductor L _r is electrically connected, and the two ends of the resonant capacitor C _r are electrically connected to the first end of the resonant inductor L _{r and} the second end of the auxiliary switch S _r respectively, and the auxiliary switch diode D _Sr and auxiliary switch S _r in parallel, a first terminal electrically connected to an end of D _r and the auxiliary diode of the auxiliary switch S _r, D _r other end of the second auxiliary diode and a second boost circuit of the diode D 200 ₂ one of the second ends is electrically connected.

The other end of the first inductor L _{1 and} the second end of the first main switch S ₁ may be electrically connected to an input voltage V _i , and the second end and the second main body of the second diode D ₂ between one end of the second switch S ₂ may be used to electrically connect an output capacitor C _o and an output resistor R _o, the output capacitor C _o to the output resistor R _o connected in parallel, and the first main switch S ₁ is the second main switch and S ₂ can be the same switching element.

The first main switch S ₁ , the second main switch S ₂ and the auxiliary switch S _r can all adopt a metal oxide semiconductor field effect transistor (MOSFET), such as an enhancement mode MOSFET, but the first main switch S ₁ The second main switch S ₂ and the auxiliary switch S _r are not limited to use MOSFETs, and general switching elements such as insulated gate bipolar transistors (IGBT), bipolar transistors (BJT) or other switching elements may also be used as needed. .

According to the above-mentioned single auxiliary switch, the interleaved high step-up ratio flexible switching converter, wherein the resonant capacitor C _r can be a stray capacitor of the auxiliary switch S _r , and the resonant capacitor C _r can also be an external capacitor, the whole The effective resonant capacitance value is the parasitic capacitance value of the auxiliary switch S _r plus the capacitance value of the external resonant capacitor. Similarly, the first auxiliary capacitor C _r1 may be the parasitic capacitance of the first main switch S ₁ , or the first auxiliary capacitor C _r1 may be an external capacitor, and the overall effective first auxiliary capacitor value is the first main switch S _{1 .} The parasitic capacitance value plus the capacitance value of the external first auxiliary capacitor. Similarly, the second auxiliary capacitor C _r2 may be the parasitic capacitance of the second main switch S ₂ , or the second auxiliary capacitor C _r2 may be an external capacitor, and the overall effective second auxiliary capacitor value is the second main switch S _{2 .} The parasitic capacitance value plus the capacitance value of the external second auxiliary capacitor.

Therefore, the embodiment of FIG. 1 can form a resonant branch for implementing flexible switching, wherein the resonant branch includes an auxiliary switch S _r , a resonant inductor L _r , a first auxiliary capacitor C _{r1 ,} and a first The second auxiliary capacitor C _r2 , the resonant capacitor C _r and the auxiliary diode D _r , wherein the first auxiliary capacitor C _r1 can adopt the parasitic capacitance of the first main switch S ₁ , and the second auxiliary capacitor C _r2 can adopt the second main switch Parasitic capacitance of S ₂ . The working principle of the above-mentioned resonant branch is to perform the transient resonance after the resonant branch is transiently resonated by the turn-on and turn-off of the auxiliary switch S _r (the first main switch S ₁ Or switching of the second main switch S ₂ ), the auxiliary switch S _{r of} the interleaved high-boost ratio flexible-cut converter has zero voltage and zero current switching characteristics, thereby reducing the switching loss of the main switching element, At the same time, the excess energy storage on the auxiliary branch components can be released to the load to achieve the advantages of energy recovery and reuse, and improve the overall efficiency of the converter.

Second, the trigger signal generator

Referring to FIG. 2 at the same time, a circuit diagram of a trigger signal generator for each of the switching elements (the first main switch S ₁ , the second main switch S _{2 ,} and the auxiliary switch S _r ) of FIG. 1 is shown. A trigger signal generator electrically connected to the first main contacts 621 of the switch S _1, the second main contact point 701 contacts 641 of switch S ₂ and S _{R & lt} auxiliary switch, the main switch S ₁ when the first, the second main switch S ₂ and the auxiliary switch S _r are MOSFETs, and the contacts 621, 641, and 701 are respectively located at the gates of the first main switch S ₁ , the second main switch S _{2 ,} and the auxiliary switch S _r .

The trigger signal generator is configured to generate a first main switch control signal S _1c to the contact 621 of the first main switch S ₁ , a contact point 641 of the second main switch control signal S _2c to the second main switch S ₂ , and The auxiliary switch controls the signal S _rc to the junction 701 of the auxiliary switch S _r . The first main switch control signal S _{1c is} used to delay the first delay time of the first main switch S ₁ , and the second main switch control signal S _{2c is} used to delay the second delay time of the second main switch S ₂ . . Auxiliary switching control signal S _rc delay time for the first auxiliary switch S _r is turned on and the second delay time conducting auxiliary switch S _r, the auxiliary switching control signal S _rc and the first main switch S ₁ is turned on and the second main before the switch S ₂ is turned on, the pilot on the auxiliary switch S _r. The first delay time may be equal to the second delay time, and the same is a delay time t _d .

The trigger signal generator can have the first main switch control signal S _1c , the second main switch control signal S _2c and the auxiliary switch control signal S _{rc in} various possible implementation manners, and can be designed by a person _skilled in the art. Figure 2 below is one of the possible embodiments, which is described in detail below. The trigger signal generator in FIG. 2 may include a first main switch original signal generator 310, a second main switch original signal generator 320, a first delay unit 410, a second delay unit 420, and a first counter. Phase gate 510, a second reverse gate 520, a first gate 610, a second gate 620, a third gate 630, a fourth gate 640, a fifth gate 650 and a gate 700.

The first main switch original signal generator 310 is configured to generate a first main switch original signal S _1o , and one input end of the first delay unit 410 is electrically connected to the first main switch original signal generator 310 and used to be the first The main switch original signal S _{1o is} delayed by a delay time t _d , the second main switch original signal generator 320 is used to generate a second main switch original signal S _2o , and the input of one of the second delay 420 and the second main switch is original The signal generator 320 is electrically connected and used to delay the second main switch original signal S _2o by a delay time t _d . An input end of the first inverting gate 510 is electrically connected to an output end of the first retarder 410, and an input end of the second inverting gate 520 is electrically connected to an output end of the second retarder 420.

The input terminals of the first and the gates 610 are electrically connected to the output ends of the first main switch original signal generator 310 and the first inverting gate 510, respectively, and the second input ends of the second and second gates 620 are respectively electrically connected to the first end. The main switch is the output of the original signal generator 310 and the first delay 410. One input end of the third sum gate 630 is electrically connected to one output end of the second and second gates 620, and the two input ends of the fourth and second gates 640 are electrically connected to the second main switch original signal generator 320 and the second retarder 420, respectively. The output end of the fourth and gate 640 is electrically connected to the other input terminal of the third and gate 630. The input terminals of the fifth and second gates 650 are electrically connected to the output ends of the second main switch original signal generator 320 and the second inverting gate 520, respectively. Or the input terminals of the gate 700 are electrically connected to one of the output terminals of the first and the gates 610, the output of one of the third and third gates 630, and the output of one of the fifth and the gates 650, or one of the outputs of the gate 700. The switch control signal S _rc is electrically connected to the contact 701 of the auxiliary switch S _r . The output of one of the second gate 620 outputs a first main switch control signal S _1c and is electrically connected to the contact 621 of the first main switch S ₁ , and the output of one of the fourth and gate 640 outputs a second main switch control The signal S _2c is electrically connected to the contact 641 of the second main switch S ₂ .

Therefore, the control signal generator as shown in FIG. 2 can re-trigger the original control signal including the first main switch original signal S _1o and the second main switch original signal S _2o by a delay time t _d , and assist The switch S _{r is} turned on first, so that the resonant inductor L _r , the first auxiliary capacitor C _r1 , the second auxiliary capacitor C _r2 , and the resonant capacitor C _r form a resonant circuit loop, thereby enabling the main switch (including the first main switch) S ₁ and the second main switch S ₂₎ reach zero voltage and zero current switching.

Third, the work mode analysis

The interleaved high-boost ratio soft-cut converter of the single auxiliary switch as shown in Fig. 1 and Fig. 2 can be subdivided into several modes according to the switching of each switching element and the diode on and off states. (mode) for analysis, and to make the analysis of each mode clearer and easier to understand, thus simplifying the analysis process, the following analysis is based on the following assumptions:

(1) Each of the switching elements and each of the diode elements is an ideal element without a conduction voltage drop.

(2) The switching time and the time of resonance are extremely short, so the current on the first inductor L ₁ and the second inductor L ₂ used for energy storage can be regarded as a certain current source, that is, i _L1 = I _L1 , i _L2 = I _L2 . Wherein i _L1 is the current flowing through the first inductor L _1, I _L1 is regarded as a constant current source, through a first constant current inductor L _1, i _L2 of a current flowing through the second inductor L _2, I _L2 is considered The constant current source flows through the constant current of the second inductor L ₂ .

(3) It is assumed that both the clamp capacitor C ₁ and the output capacitor C _{o are} relatively large, and the voltage of the clamp capacitor C ₁ and the output capacitor C _o are maintained at a constant value, that is, v _C1 = V _C1 , v _o = V _o . Wherein v _C1 is the voltage across the clamp capacitor C _1, V _C1 to maintain the voltage across the clamp capacitor C ₁ to a given value, v _o output capacitor C _o is the voltage across, V _o to maintain the set value A voltage across the output capacitor C _o .

(4) The first auxiliary capacitor C _r1 is the parasitic capacitance of the first main switch S ₁ , and the second auxiliary capacitor C _r2 is the parasitic capacitance of the second main switch S ₂ , and adopts C _r1 = C _r2 .

(5) The overall effective value C _rs of the resonant capacitor is the sum of the parasitic capacitance of the auxiliary switch S _r and the external resonant capacitor C _r , that is, C _rs = C _r + C _r1 = C _r + C _r2 .

Mode 1 (time t ₀ ~ t ₁ )

Please refer to FIG. 3, which is a schematic diagram of the conduction state of the first mode in the first mode. Before entering this mode, the first main switch S ₁ and the auxiliary switch S _r are both in a turn-off state, and the second main switch S ₂ and the first diode D ₁ are in a turn-on state. At this time, the voltage across the first main switch S ₁ and the auxiliary switch S _r is V _o /2 , respectively.

When the time t = t ₀ , the mode 1 is entered, at which time the first main switch S _{1 is} delayed in conduction, the auxiliary switch S _{r is} turned on first, and the second main switch S ₂ is maintained in the on state, at which time the resonant inductor L _r is on. The voltage across the voltage is V _o /2 and the current flowing through the resonant inductor L _r rises linearly from zero.

The governing equation at mode 1 is as shown in equation (1).

When the resonant inductor L _r i _Lr current rises to I _{L 1,} a first diode D ₁ of the current I _{D 1} drops to 0, then mode 1 ends, when the voltage across the resonant capacitor C _r V _o remains of /2. The time interval of mode 1 can be solved by equation (1) as equation (2).

Mode 2 (time t ₁ ~ t ₂ )

Please refer to FIG. 4, which is a schematic diagram of the conduction state of the first mode in the second mode. When time t = t ₁ , enter mode 2, the current of the resonant inductor L _r rises to I _{L 1} , the voltage of the resonant capacitor C _r is V _o /2, the first diode D ₁ is off, and the auxiliary switch S _r is maintained turned on, the resonant inductor L _r and the resonant capacitor C _r form a loop. At this time, the current of the resonant inductor L _r continues to rise, and the resonant capacitor voltage v _Cr gradually decreases to zero. When the resonant capacitor voltage v _Cr drops to zero, that is, when v _Cr ( t ₂ )=0, the mode ends at time. t ₂ .

The dominant equation of mode 2 can be expressed as equation (3), and the current of the resonant inductor and the voltage of the resonant capacitor can be obtained by arranging equation (3), as shown in equation (4).

Wherein, the resonance impedance Z ₁ is Resonant frequency ω ₁ is The time interval of mode 2 can be solved by equation (4) as shown in equation (5):

Mode 3 (time t ₂ ~ t ₃ )

Please refer to FIG. 5, which is a schematic diagram of the conduction state of the first mode in the mode 3. At time t = t ₂ , the circuit enters mode 3 operation. At this time, since the voltage of the resonant capacitor C _r has dropped to a small negative voltage, the first main switch diode D _S1 is connected to the first main switch S ₁ . The anti-parallel diodes, at this time, the first main switching diode D _{S1 is} turned on, so the voltage across the first main switch S ₁ is zero. If this seasonal first main switch S ₁ is turned on to cause the first main switch S ₁ is switched to zero voltage.

The dominant equation for Mode 3 is shown in Equation (6):

It can be known from equations (2) and (5) that if the first main switch S _{1 is} to be switched to zero voltage, the first delay time t _{d 1} must satisfy at least the condition of equation (7). To ensure that the first main switch S ₁ can be switched to zero voltage, the peak I _{L 1,max} of the current I _{L 1} of the first inductor L ₁ is substituted into equation (7) to calculate t _{D 1} . Further, it is considered that the first main switch S _{1 is} completely turned on and the auxiliary switch S _{r is} completely turned off. Therefore, a margin time t _{τ is set} to ensure that the above condition is satisfied, so that the equation (7) can be corrected to the equation (8).

When the time t = t ₃ , the second main switch S ₂ can be turned off without current passing, so the second main switch S ₂ has zero current switching, and the second main switch S ₂ achieves the condition of zero current switching as the formula ( 9), while the auxiliary switch S _r is turned on and turned off, and mode 3 ends. In order to ensure that the second main switch S ₂ can be switched to zero current, the minimum value I _L1,min of the first inductor L ₁ current I _{L 1} is substituted into the equation (9), and the equation (9) can be corrected to Formula (10).

Mode 4 (time t ₃ ~ t ₄ )

Please refer to FIG. 6 , which is a schematic diagram of the conduction state of FIG. 1 in mode 4. When entering the mode 4, the first main switch S ₁ is turned on, the auxiliary switch S _r and the second main switch S ₂ is turned off, this time is stored in the energy resonant inductor L _r, with the secondary of the diode D _r It is turned on and released to the load, so the current i _Lr of the resonant inductor L _r decreases linearly, and the resonant capacitor C _{r is} in the energy storage state, and the voltage across the auxiliary diode S _r is V due to the conduction of the auxiliary diode D _r . _o , and the voltage across the resonant inductor L _r is - V _o .

When time t = t ₄ , the current i _{Lr of the} resonant inductor L _{r drops} to 0, while the current i _{S1 of the} first main switch S ₁ rises to I _{L 1} , at which point mode 4 ends. The dominant equation of the mode 4 is as shown in the formula (11), and the current i _{Lr of} the resonant inductor L _r and the voltage v _{Cr of the} resonant capacitor C _r are obtained by the equation (11), as shown in the formula (12).

Wherein, the resonance impedance Z ₂ is Resonant frequency ω ₂ is

Further, since the parasitic capacitance of the first main switch S ₁ is equal to the parasitic capacitance of the second main switch S ₂ , that is, C _{r 1} = C _{r 2} , Z = Z ₁ = Z ₂ , ω = ω ₁ = ω ₂ . The time interval of mode 4 can be solved by equation (12) as equation (13):

Mode 5 (time t ₄ ~ t ₅ )

Please refer to FIG. 7 , which is a schematic diagram showing the conduction state of FIG. 1 in mode 5. During mode 5, the first main switch S ₁ is turned on is maintained, and the auxiliary switch S _r and the second main switch S ₂ is turned off, the second inductor L current i _{2 L 2} of the resonant capacitor C _r of the continuous charging, then The voltage v _Cr of the resonant capacitor C _r rises linearly, while the voltage v _{D 2 of the} second diode D ₂ decreases linearly from V _o /2. When the voltage v _{Cr of the} resonant capacitor C _r rises to V _o /2, mode 5 ends, at which time t = t ₅ .

The dominant equation during mode 5 is as shown in equation (14). After the equation (14) is arranged, the voltage v _{Cr of} the resonant capacitor C _r can be obtained as shown in the formula (15). The time interval of this mode 5 can be obtained as in (16):

Mode 6 (time t ₅ ~ t ₆ )

Please refer to FIG. 8 , which is a schematic diagram showing the conduction state of FIG. 1 in mode 6. After entering mode 6, the switching states of the respective switching elements (including the first main switch S ₁ , the second main switch S ₂ and the auxiliary switch S _r ) are the same as the mode 5, and the second diode D ₂ is in an on state, The energy of the clamp capacitor C ₁ and the second inductor L _{2 are} simultaneously released to the load.

The circuit conduction state equation of mode 6 can be expressed as equation (17). When the time t = t ₆ , the auxiliary switch S _r enters the conduction state by the off state, then the mode 6 ends and the circuit enters the next operation mode. Where equation (17) is as follows:

Mode 7 (time t ₆ ~ t ₇ )

Please refer to FIG. 9 , which is a schematic diagram showing the conduction state of FIG. 1 in mode 7. During mode 7, the first main switch S ₁ and the auxiliary switch S _{r are} turned on, and the second main switch S _{2 is} turned off. At this time, the voltage across the second main switch S ₂ , the resonant capacitor C _r and the clamp capacitor C ₁ is V _o /2.

When the time t = t ₆ , the second main switch S _{2 is} delayed in conduction, and the auxiliary switch S _{r is} turned on first, and the first main switch S _{1 is} maintained in an on state, at which time the voltage across the resonant inductor L _r is V _o /2, and the current i _{Lr of the} resonant inductor L _r rises linearly from zero, and the dominant equation of mode 7 is as shown in equation (18):

When the resonant inductor L _r i _Lr current rises to I _{L 2,} flows through the second diode D ₂ of the current I _{D 2} falls to zero, the end of the mode 7, the voltage across the resonant capacitor C _r remains V _o /2. The time interval of mode 7 can be solved by equation (18) as shown in equation (19):

Mode 8 (time t ₇ ~ t ₈ )

Please refer to FIG. 10, which is a schematic diagram showing the conduction state of the first mode in the mode 8. When the time t = t ₇ , the current i _{Lr of the} resonant inductor L _r rises to I _{L 2} , the voltage v _Cr of the resonant capacitor C _r is V _o /2, the second diode D ₂ is off, and the auxiliary switch S _r maintains conduction, and forms a resonant circuit with the resonant inductor L _r and the resonant capacitor C _r . At this time, the current i _{Lr of the} resonant inductor L _r continuously rises, and the voltage v _{Cr of the} resonant capacitor C _r gradually decreases to zero. When v _Cr drops to zero, then mode 8 ends, at this time time t = t ₈ .

The dominant equation of mode 8 can be expressed as equation (20), and then the equation (20) can be collated to obtain the current i _{Lr of} the resonant inductor L _r and the voltage v _{Cr of the} resonant capacitor C _r , as shown in equation (21): The time interval of mode 8 can be obtained by equation (21) as shown in equation (22):

Mode 9 (time t ₈ ~ t ₉ )

Please refer to FIG. 11 , which is a schematic diagram showing the conduction state of FIG. 1 in mode 9. At this time, since the voltage v _{Cr of the} resonant capacitor C _r has dropped to a small negative voltage, the backing diode of the second main switch S ₂ (ie, the second main switching diode D _S2 ) is turned on. The voltage across the second main switch S ₂ is zero, and the second main switch S ₂ can perform zero voltage switching.

The dominant equation for Mode 9 is shown in Equation (23):

Further, from equations (19) and (22), if the second main switch S _{2 is} to be switched to zero voltage, the second delay time t _{d 2} must satisfy at least the condition of equation (24). To ensure that the second main switch S ₂ can be switched to zero voltage, the peak I _{L 2,max} of the current I _{L 2} of the second inductance L ₂ is substituted into equation (24) to calculate t _{D 2} . In addition, considering that the second main switch S _{2 is} completely turned on and the auxiliary switch S _{r is} completely turned off, a margin time t _τ can be set to ensure that the above conditions are satisfied, so that the equation (24) can be corrected to the equation (25). ,as follows:

When the time t = t _9, can make the first main switch S ₁ is turned off in the absence of current through, and therefore having a first main switch S ₁ is zero current switching, the first main switch S ₁ is reached zero current switching condition of the formula ( 25), while the auxiliary switch S _r is turned on and turned off, and mode 9 ends. In order to ensure that the first main switch S ₁ can achieve zero current switching, the minimum value I _{L2 , min} of the current I _{L 2} of the second inductor L ₂ can be substituted into the equation (26), and the equation (26) can be corrected to (27):

Mode 10 (time t ₉ ~ t ₁₀ )

Please refer to FIG. 12, which is a schematic diagram of the conduction state of the first mode in the mode 10. When entering mode 10, the second main switch S _{2 is} turned on, and the auxiliary switch S _r and the first main switch S ₁ are in an off state, and the energy stored in the resonant inductor L _r is at this time, by the auxiliary diode D _r When it is turned on and released to the load, the current i _Lr of the resonant inductor L _r decreases linearly, and the resonant capacitor C _{r is} in the energy storage state, and the voltage of the auxiliary switch S _r is V due to the conduction of the auxiliary diode D _r . _o , and the voltage across the resonant inductor L _r is - V _o .

When the time t = t _10, the current of the resonant inductor L _r i _Lr is reduced to zero, while the second main switch S ₂ of the current I ₂ raised to _S I _{L 2,} pattern 10 ends at this time. The dominant equation of mode 10 is as shown in equation (28). If equation (28) is collated, the current i _{Lr of} the resonant inductor L _r and the voltage v _{Cr of the} resonant capacitor C _r can be obtained as shown in equation (29): The time interval of mode 10 can be obtained by equation (29) as shown in equation (30):

Mode 11 (time t ₁₀ ~ t ₁₁ )

Please refer to FIG. 13 , which is a schematic diagram showing the conduction state of the first mode in the mode 11 . During mode 11, the second main switch S ₂ is turned on and the first switch S ₁ is the main and auxiliary switch S _r to the OFF state, the current of the first inductor L ₁ I _{L 1} Length of the resonant capacitor C _r charge, of a resonant The voltage v _Cr of the capacitor C _r rises linearly, and the voltage v _{D 1 of the} first diode D ₁ decreases linearly from V _o /2. Mode 11 ends when the voltage v _{Cr of the} resonant capacitor C _r rises to V _o /2.

The dominant equation of mode 11 is as shown in equation (31). After the equation (31) is arranged, the voltage v _{Cr of} the resonant capacitor C _r can be obtained as shown in the formula (32). The time interval of mode 11 can be obtained as in equation (33):

Mode 12 (time t ₁₁ ~ t ₁₂ )

Please refer to FIG. 14 , which is a schematic diagram of the conduction state of FIG. 1 in mode 12. After entering the mode 12, the respective switching elements (including the first main switches S _1, S ₂ of the second main switch and auxiliary switch S _r) of the same switching state and Mode 11, and a first diode D ₁ is conductive state, such that The energy of the first inductor L ₁ is released to the clamp capacitor C ₁ .

12 a circuit pattern of the conductive state equation can be expressed as formula (34), when the time t = t ₁₂ Analysis of a complete switching period (switching period) of. It is worth noting that when the time t = t ₁₂ , the state of each component of the interleaved high boost ratio soft-switching converter of the single auxiliary switch returns to the state like time t = t ₀ , thus completing a switching cycle. . Where formula (34) is as follows:

Fourth, the switching characteristics of each switching element

Please refer to Fig. 15 and the above description. Fig. 15 is a waveform diagram showing the main elements in Fig. 1 in the above modes 1 to 12. According to the analysis of the above working modes, the first main switch S ₁ , the second main switch S ₂ , the auxiliary switch S _r , the first diode D ₁ , and the second diode D ₂ according to the embodiment can be known. The switching characteristics of the first blocking diode D _{r 1} , the second blocking diode D _{r 2} and the auxiliary diode D _r in a switching cycle are listed in Table 1 below.

V. Example of component design

According to an embodiment of the above embodiment, each component can be designed as shown in Table 2 below.

The design of the first inductor L ₁ , the second inductor L ₂ , the clamp capacitor C ₁ , and the output capacitor C _o can be referred to the derivation formula proposed by GRWalker and PCSernia in 2004 (“Cascaded DC-DC Converter Connection of Photovoltaic Modules,” IEEE Available on Industrial Electronics , Vol.19, No.4, pp.1130-1139, 2004.). It can be seen from the above mode analysis that if the zero voltage and zero current switching of the first main switch S ₁ and the second main switch S _{2 are} to be achieved, the equations (8), (10), (25) and 27) The equation, wherein the first delay time t _{D 1} and the second delay time t _{D 2 of the} equations (8) and (25) are relatively small with respect to the switching period, so that t _{D 1} = t _{D 2} = t _D =0.015T=1 u s, and t _τ =0.015T=1 u s. From the above formula proposed by GRWalker and PCSernia in 2004, it can be deduced that I _{L , max} is about 8.5A and I _{L , min} is about 3.9A, and let I _{L ,max} = I _{L 1,max} = I _{L 2,max} , I _{L ,min} = I _{L 1,min} = I _{L 2,min} , then I _{L ,max} and I _{L ,min are} substituted into equations (8), (10), (25) and (27), The maximum resonant inductance value L _r can be determined to be approximately 5.8 u H, so the resonant inductor L _r can be selected to be 5 u H. If the inductance value of the resonant inductor L _r is returned to the original equation, the capacitance of the resonant capacitor C _r should be C _rs = 42.5 n F ( C _rs = C _r + C _{r 1} = C _r + C _{r 2} And the parasitic capacitance values of the first main switch S ₁ and the second main switch S ₂ can be C _{r 1} = C _{r 2} = 870 p F, so C _r can be 0.047 u F. The remaining components can also be obtained from the literature mentioned in the above-mentioned GRWalker and PCSernia in 2004, and will not be described here.

Sixth, the simulation results

The simulation of the interleaved high step-up ratio soft-cut converter of the single auxiliary switch according to the present invention can be performed with the PSIM simulation software to verify the above effects.

Please refer to FIGS. 16~18, and FIGS. 16-18 illustrate an interleaved high step-up ratio flexible-cut converter according to the single auxiliary switch of FIG. 1 , and apply the foregoing component design embodiment, and operate at 300 W. Figure 16 illustrates a first main switch control signal S _1c, an analog waveform diagram of a current i _S1 of the first main voltage v _ds1 and the switch S ₁ is the first main switch S ₁ is in, FIG. 17 shows a second main switch control signal S _2c, the second main switch voltage v _{ds2 2} S and the second main switch S analog waveform current i _S2 in FIG. _2. Figure 18 shows the auxiliary switching control signal S _rc, i _Sr analog waveform diagram of a current and a voltage v _sr auxiliary switch S _r S _r of the auxiliary switch.

As can be seen from FIGS. 16 and 17, the first main switch S ₁ and the second main switch S ₂ both have zero voltage conduction and zero current cutoff characteristics, and the first main switch S ₁ and the second main switch S ₂ The withstand voltage is also only half of the output voltage V _o . It can be seen from Fig. 18 that the auxiliary switch S _r has a zero current switching characteristic when turned on and a zero voltage switching characteristic when turned off. It has been verified that in accordance with an embodiment of the present invention, an interleaved high step-up ratio soft-cut converter can be accomplished with a single auxiliary switch.

It will be apparent from the above-described embodiments of the present invention that the application of the present invention has the following advantages.

1. Switching loss is small. According to the staggered high-boost ratio soft-cut converter of the single auxiliary switch according to the present invention, each of the main switches (ie, the first main switch and the second main switch) has zero current and zero voltage switching characteristics, thereby improving The switching loss caused by the traditional hard-cut switching mode.

2. The switching stress is small. Similarly, according to the staggered high-boost ratio soft-cut converter of the single auxiliary switch of the present invention, each of the main switches (ie, the first main switch and the second main switch) can have zero current and zero voltage switching characteristics. Therefore, the disadvantage of large switching stress caused by the conventional hard-cut switching mode can be improved.

3. High efficiency and good stability. Due to the application of the invention, the switching loss is small and the switching stress is small, so the system is stable and reduces Switching loss of switching elements. In addition, the excess energy storage on the auxiliary branch components can be released to the load to achieve energy recovery and reuse, further improving the overall efficiency of the converter.

4. The circuit is simple and reduces the implementation cost. The flexible switching of the interleaved high-boost ratio soft-cut converter can be achieved with a single auxiliary switch, while featuring high boost ratio, saving circuit components and reducing the cost of practical applications, resulting in superior business value.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and the present invention can be modified and modified without departing from the spirit and scope of the present invention. The scope is subject to the definition of the scope of the patent application attached.

100‧‧‧First booster circuit

200‧‧‧second boost circuit

621‧‧‧First main switch control signal contact

641‧‧‧Second main switch control signal contact

701‧‧‧Auxiliary switch control signal contact

C ₁ ‧‧‧Clamp Capacitor

C _r ‧‧‧resonance capacitor

C _r2 ‧‧‧Second auxiliary capacitor

C _r1 ‧‧‧First auxiliary capacitor

C _o ‧‧‧output capacitor

D ₁ ‧‧‧First Diode

D ₂ ‧‧‧Secondary

D _r ‧‧‧Auxiliary diode

D _r1 ‧‧‧first blocking diode

D _r2 ‧‧‧Second blocking diode

D _S1 ‧‧‧First main switch diode

D _S2 ‧‧‧Second main switch diode

D _Sr ‧‧‧Auxiliary Switch Diode

L ₁ ‧‧‧first inductance

L ₂ ‧‧‧second inductance

L _r ‧‧‧Resonance inductance

R _o ‧‧‧ output resistance

S ₁ ‧‧‧first main switch

S ₂ ‧‧‧second main switch

S _r ‧‧‧Auxiliary switch

V _i ‧‧‧ input voltage

Claims (10)

An interleaved high step-up ratio soft-cut converter for a single auxiliary switch, comprising: a first boosting circuit comprising a first main switch; and a second boosting circuit comprising a second main switch, The second boosting circuit is electrically connected to the first boosting circuit; a first blocking diode is electrically connected to one end of the first main switch; and a second blocking diode is One end is electrically connected to the first end of the second main switch; a resonant inductor, the first end of the resonant inductor and the other end of the first blocking diode and the other end of the second blocking diode Electrically connected; an auxiliary switch, a first end of the auxiliary switch is electrically connected to the other end of the resonant inductor; a resonant capacitor, the two ends of which are respectively connected to the first end of the resonant inductor and one of the auxiliary switches The second end is electrically connected; an auxiliary switch diode is connected in parallel with the auxiliary switch; and an auxiliary diode has one end electrically connected to the first end of the auxiliary switch, and the auxiliary diode is another One end is electrically connected to the second boosting circuit. An interleaved high step-up ratio soft-cut converter of the single auxiliary switch of claim 1, wherein the resonant capacitor is an external capacitor or a parasitic capacitance of the auxiliary switch. The interleaved high-boost ratio flexible-cut converter of claim 1, wherein the first boosting circuit further comprises: a first inductor, one end of which is electrically connected to the first end of the first main switch a first main switch diode connected in parallel with the first main switch; a first auxiliary capacitor connected in parallel with the first main switch; and a first diode, one end and the first The first end of the main switch is electrically connected. An interleaved high step-up ratio soft-cut converter as claimed in claim 3, wherein the first auxiliary capacitor is an external capacitor or a parasitic capacitance of the first main switch. The interleaved high-boost ratio flexible-cut converter of claim 3, wherein the second boosting circuit further comprises: a second inductor, one end of which is electrically connected to the first end of the second main switch a second main switch diode, which is connected in parallel with the second main switch; a second auxiliary capacitor connected in parallel with the second main switch; a clamp capacitor, one end of which is connected to the second main switch The first end is electrically connected to the other end; and the second end of the second diode is electrically connected to the other end of the clamping capacitor; wherein the other end of the first diode is The first of the second diode The second end of the second diode is electrically connected to the auxiliary diode. An interleaved high step-up ratio soft-cut converter of the single auxiliary switch of claim 5, wherein the second auxiliary capacitor is an external capacitor or a parasitic capacitance of the second main switch. The interleaved high-boost ratio flexible-cut converter of the single auxiliary switch of claim 5, wherein the other end of the first inductor and the second end of the first main switch are electrically connected to an input The voltage is connected between the second end of the second diode and the second end of the second main switch to electrically connect an output capacitor and an output resistor. An interleaved high step-up ratio soft-cut converter of the single auxiliary switch of claim 1, wherein the first main switch and the second main switch are the same switching element. The interleaved high-boost ratio soft-switching converter of the single auxiliary switch of claim 1 further includes a trigger signal generator electrically connected to the first main switch, the second main switch, and the An auxiliary switch, wherein the trigger signal generator is configured to delay turning on a first delay time of the first main switch, and turn on the auxiliary switch at the first delay time, the trigger signal generator is configured to delay turn on the second main switch One of the second delay times, and the auxiliary switch is turned on during the second delay time. The interleaved high step-up ratio soft-cut converter of claim 9, wherein the trigger signal generator is configured to turn on the auxiliary switch before the first main switch is turned on and the second main switch is turned on.