TW201916111A - 耐高溫之化合物半導體基板之背面金屬改良結構 - Google Patents

耐高溫之化合物半導體基板之背面金屬改良結構 Download PDF

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TW201916111A
TW201916111A TW106132979A TW106132979A TW201916111A TW 201916111 A TW201916111 A TW 201916111A TW 106132979 A TW106132979 A TW 106132979A TW 106132979 A TW106132979 A TW 106132979A TW 201916111 A TW201916111 A TW 201916111A
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metal layer
compound semiconductor
semiconductor substrate
equal
layer
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TW106132979A
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TWI681447B (zh
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花長煌
陳淑貞
王皇文
華特 東尼 福摩斯
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穩懋半導體股份有限公司
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Priority to TW106132979A priority Critical patent/TWI681447B/zh
Priority to US15/813,596 priority patent/US10374129B2/en
Publication of TW201916111A publication Critical patent/TW201916111A/zh
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Abstract

一種耐高溫之化合物半導體基板之背面金屬改良結構，包括：一正面金屬層係形成於一化合物半導體基板之一上表面；至少一基板通孔係貫穿化合物半導體基板，基板通孔具有一內表面之一頂部係為正面金屬層；至少一種子金屬層、至少一背面金屬層以及至少一擴散阻礙層係依序係形成覆蓋於化合物半導體基板之一下表面以及每一基板通孔之內表面，種子金屬層係藉由基板通孔與正面金屬層電性連接；以及一晶粒黏著金屬層係形成於基板通孔之一鄰近區域之外及基板通孔之外之擴散阻礙層之一下表面。藉由擴散阻礙層以防止背面金屬層擴散至晶粒黏著金屬層。

Description

耐高溫之化合物半導體基板之背面金屬改良結構
本發明係有關一種耐高溫之化合物半導體基板之背面金屬改良結構，尤指一種具有擴散阻礙層之耐高溫之化合物半導體基板之背面金屬改良結構。
請參閱第9圖，其係為習知技術之化合物半導體基板之背面金屬結構之一具體實施例之剖面示意圖。習知技術之化合物半導體基板之背面金屬結構包括：一化合物半導體基板90、一正面金屬層91、一背面金屬層92、一擴散阻礙層93、一晶粒黏著金屬層94、複數條街道狀凹槽95以及複數個基板通孔96。其中化合物半導體基板90係為一碳化矽(SiC)或是一氮化鎵(GaN)基板。其中正面金屬層91係形成於化合物半導體基板90之一上表面902。其中複數個基板通孔96係經由蝕刻化合物半導體基板90之一下表面901而形成複數個基板通孔96。其中每一個基板通孔96具有一內表面。其中基板通孔96之內表面包括一側面961以及一頂部962。其中基板通孔96之內表面之側面961係由化合物半導體基板90所定義。其中基板通孔96之內表面之頂部962係由正面金屬層91所定義。其中背面金屬層92係形成覆蓋於化合 物半導體基板90之下表面901、基板通孔96之內表面之側面961以及基板通孔96之內表面之頂部962，使得背面金屬層92與正面金屬層91於基板通孔96之內表面之頂部962處電性連接。其中背面金屬層92係由金(Au)所構成。其中背面金屬層92具有一外表面921。其中擴散阻礙層93係形成覆蓋於基板通孔96之一鄰近區域97之背面金屬層92之外表面921以及基板通孔96內之背面金屬層92之外表面921。其中擴散阻礙層93係由氧化鋁(Al2O3)、二氧化矽(SiO2)或氮化矽(SiN)所構成。其中晶粒黏著金屬層94係形成覆蓋於基板通孔96之鄰近區域97之外以及基板通孔96之外之背面金屬層92之外表面921。其中擴散阻礙層93與晶粒黏著金屬層94係於基板通孔96之鄰近區域97之一外緣處971相連接。其中晶粒黏著金屬層94係由金與錫(Sn)之合金所構成，其中金與錫之比例係分別為重量百分比80%以及重量百分比20%。其中複數條街道狀凹槽95係自晶粒黏著金屬層94之一下表面941開始蝕刻晶粒黏著金屬層94以及背面金屬層92，且使蝕刻終止於化合物半導體基板90之下表面901。
請參閱第10圖，其係為習知技術之化合物半導體基板之背面金屬結構之另一具體實施例之剖面示意圖。將第9圖之實施例沿著複數條街道狀凹槽95切割，可切割成複數個晶粒9。其中第10圖所示係為一單一晶粒9。取一載板98，於載板98之一上表面形成一防氧化層99。再將晶粒9置於載板98之防氧化層99之上。自晶粒9之上方施以一向下之壓力，並將晶粒9及載板98(及防氧化層99)加熱至280℃至320℃。請參閱第11圖，其係為金錫二元相圖。利用晶粒黏著金屬層94之金與錫之比例係分別為重量百分比80%以及重量百分比20%，當加熱至超過278℃時，晶粒黏著金屬層94就會相變為 液相。晶粒黏著金屬層94之金與錫會互熔在一起，而於降溫之後形成金錫合金。藉此，使得晶粒黏著金屬層94固定於載板98之防氧化層99之上，且晶粒黏著金屬層94係具有導電以及導熱之功能。
然而，習知技術之晶粒黏著金屬層94(其中金重量百分比80%、錫重量百分比20%)係形成在背面金屬層92(係由金所構成)之外表面921。因此，背面金屬層92之金很容易就擴散進入晶粒黏著金屬層94，使得晶粒黏著金屬層94之金的重量百分比超過80%。然而由金錫二元相圖得知，若是晶粒黏著金屬層94之金與錫之重量百分比之比例在局部區域有些許改變，尤其是當金之重量百分比在局部區域有提高些許時，則該局部區域之晶粒黏著金屬層94相變為液相之溫度將會急遽提高，因此在正常之製程溫度之下，該局部區域之晶粒黏著金屬層94將因加熱溫度不足而無法相變為液相，於是形成一些局部缺陷。這些局部缺陷可能造成化合物半導體元件之導電不良或導熱不良，不僅造成化合物半導體元件之效能降低，使得化合物半導體元件無法通過可靠度試驗，甚至還可能因此造成化合物半導體元件之損害。
再者，晶粒黏著金屬層94係可自基板通孔96之鄰近區域97之外緣處971，從背面金屬層92以及擴散阻礙層93之間遷移(migrate)進入基板通孔96內之背面金屬層92以及擴散阻礙層93之間。甚至更嚴重時，晶粒黏著金屬層94所含之錫係可遷移(migrate)並擴散(diffuse)至基板通孔96之內表面之頂部962，而與正面金屬層91相接觸，造成對形成於化合物半導體基板90之上表面902之化合物半導體元件之損害。
此外，請參閱第10圖之實施例，當從晶粒9之上方施以向下 之壓力，並將晶粒9及載板98(及防氧化層99)加熱至280℃至320℃之過程中，晶粒黏著金屬層94就會相變為液相，因此晶粒9四周之晶粒黏著金屬層94會被擠壓出來，而形成如第10圖所示之晶粒黏著金屬層94之一溢流部942。然而，晶粒黏著金屬層94之溢流部942無法黏著在化合物半導體基板90(碳化矽基板或氮化鎵基板)之下表面901，對於晶粒9四周之晶粒黏著金屬層94之溢流部942之結構強度造成不良之影響。
有鑑於此，發明人開發出簡便組裝的設計，能夠避免上述的缺點，安裝方便，又具有成本低廉的優點，以兼顧使用彈性與經濟性等考量，因此遂有本發明之產生。
本發明所欲解決之技術問題有三：一、防止背面金屬層擴散至晶粒黏著金屬層，造成晶粒黏著金屬層中金與錫之重量百分比之比例之改變；二、防止晶粒黏著金屬層遷移(migrate)進入基板通孔內之背面金屬層以及擴散阻礙層之間；三、避免晶粒四周之晶粒黏著金屬層之溢流部之結構強度不良之影響。
為解決前述問題，以達到所預期之功效，本發明提供一種耐高溫之化合物半導體基板之背面金屬改良結構，包括：一化合物半導體基板、一正面金屬層、至少一基板通孔、至少一種子金屬層、至少一背面金屬層、至少一擴散阻礙層以及一晶粒黏著金屬層。其中正面金屬層係形成於化合物半導體基板之一上表面。其中每一基板通孔係分別貫穿化合物半導體基板，其中每一基板通孔具有一內表面，其中內表面之一頂部係由正 面金屬層所定義。其中至少一種子金屬層係形成覆蓋於化合物半導體基板之一下表面以及每一基板通孔之內表面，其中至少一種子金屬層係藉由至少一基板通孔與正面金屬層電性連接。其中至少一背面金屬層係形成覆蓋於種子金屬層之一外表面。其中至少一擴散阻礙層係形成覆蓋於至少一背面金屬層之一外表面。其中晶粒黏著金屬層，係形成於至少一基板通孔之一鄰近區域之外及至少一基板通孔之外之至少一擴散阻礙層之一下表面。其中藉由至少一擴散阻礙層以防止至少一背面金屬層擴散至晶粒黏著金屬層。
於一實施例中，前述之耐高溫之化合物半導體基板之背面金屬改良結構，其中構成每一至少一擴散阻礙層之材料係包括選自以下群組之至少一者：鎳(Ni)或鎳合金、釩(V)或釩合金以及鈀(Pd)。
於一實施例中，前述之耐高溫之化合物半導體基板之背面金屬改良結構，其中構成每一至少一擴散阻礙層之材料係為鎳釩合金。
於一實施例中，前述之耐高溫之化合物半導體基板之背面金屬改良結構，其中構成化合物半導體基板之材料係包括選自以下群組之一者：砷化鎵(GaAs)、碳化矽(SiC)、氮化鎵(GaN)、藍寶石(Sapphire)以及磷化銦(InP)。
於一實施例中，前述之耐高溫之化合物半導體基板之背面金屬改良結構，其中構成每一至少一種子金屬層之材料係包括選自以下群組之至少一者：鈀(Pd)、鈦(Ti)以及鈦鎢合金(TiW)。
於一實施例中，前述之耐高溫之化合物半導體基板之背面金屬改良結構，其中構成每一至少一背面金屬層之材料係包括選自以下群組 之至少一者：金以及金之合金。
於一實施例中，前述之耐高溫之化合物半導體基板之背面金屬改良結構，其中構成晶粒黏著金屬層之材料係包括選自以下群組之一者：錫以及錫合金。
於一實施例中，前述之耐高溫之化合物半導體基板之背面金屬改良結構，其中構成晶粒黏著金屬層之材料係為金錫合金。
於一實施例中，前述之耐高溫之化合物半導體基板之背面金屬改良結構，其中金錫合金中金與錫之重量百分比係為80%：20%。
於一實施例中，前述之耐高溫之化合物半導體基板之背面金屬改良結構，其更包括複數條街道狀凹槽，其中每一複數條街道狀凹槽之一頂部係由至少一種子金屬層所定義，每一複數條街道狀凹槽之周圍係由至少一背面金屬層以及至少一擴散阻礙層所定義。
於一實施例中，前述之耐高溫之化合物半導體基板之背面金屬改良結構，其中每一複數條街道狀凹槽之周圍係由至少一背面金屬層、至少一擴散阻礙層以及晶粒黏著金屬層所定義。
於一實施例中，前述之耐高溫之化合物半導體基板之背面金屬改良結構，其中至少一擴散阻礙層具有一厚度，至少一擴散阻礙層之厚度係大於或等於1000Å且小於或等於20000Å。
於一實施例中，前述之耐高溫之化合物半導體基板之背面金屬改良結構，其中至少一種子金屬層具有一厚度，至少一種子金屬層之厚度係大於或等於100Å且小於或等於10000Å。
於一實施例中，前述之耐高溫之化合物半導體基板之背面金 屬改良結構，其中晶粒黏著金屬層具有一厚度，晶粒黏著金屬層之厚度係大於或等於5μm且小於或等於20μm。
於一實施例中，前述之耐高溫之化合物半導體基板之背面金屬改良結構，其中至少一背面金屬層具有一厚度，至少一背面金屬層之厚度係大於或等於1μm且小於或等於10μm。
於一實施例中，前述之耐高溫之化合物半導體基板之背面金屬改良結構，其中構成化合物半導體基板之材料係包括選自以下群組之一者：碳化矽、氮化鎵以及藍寶石，其中構成每一至少一種子金屬層之材料係包括選自以下群組之至少一者：鈦以及鈦鎢合金。
於一實施例中，前述之耐高溫之化合物半導體基板之背面金屬改良結構，其中構成化合物半導體基板之材料係包括選自以下群組之一者：砷化鎵，其中構成每一至少一種子金屬層之材料係包括鈀。
為進一步了解本發明，以下舉較佳之實施例，配合圖式、圖號，將本發明之具體構成內容及其所達成的功效詳細說明如下。
1‧‧‧化合物半導體晶粒
10‧‧‧化合物半導體基板
101‧‧‧化合物半導體基板之下表面
102‧‧‧化合物半導體基板之上表面
11‧‧‧光阻層
11’‧‧‧光阻層
12‧‧‧基板通孔
121‧‧‧基板通孔之內表面之側面
122‧‧‧基板通孔之內表面之頂部
13‧‧‧基板通孔之鄰近區域
14‧‧‧條街道狀凹槽
20‧‧‧正面金屬層
30‧‧‧種子金屬層
301‧‧‧種子金屬層之外表面
40‧‧‧背面金屬層
401‧‧‧背面金屬層之外表面
50‧‧‧擴散阻礙層
501‧‧‧擴散阻礙層之下表面
60‧‧‧晶粒黏著金屬層
601‧‧‧晶粒黏著金屬層之下表面
602‧‧‧晶粒黏著金屬層之溢流部
70‧‧‧載板
71‧‧‧抗氧化層
9‧‧‧晶粒
90‧‧‧化合物半導體基板
901‧‧‧化合物半導體基板之下表面
902‧‧‧化合物半導體基板之上表面
91‧‧‧正面金屬層
92‧‧‧背面金屬層
921‧‧‧背面金屬層之外表面
93‧‧‧擴散阻礙層
94‧‧‧晶粒黏著金屬層
941‧‧‧晶粒黏著金屬層之下表面
942‧‧‧晶粒黏著金屬層之溢流部
95‧‧‧街道狀凹槽
96‧‧‧基板通孔
961‧‧‧基板通孔之內表面之側面
962‧‧‧基板通孔之內表面之頂部
97‧‧‧基板通孔之鄰近區域
971‧‧‧基板通孔之鄰近區域之外緣處
98‧‧‧載板
99‧‧‧防氧化層
第1圖係為本發明一種耐高溫之化合物半導體基板之背面金屬改良結構之一具體實施例之製程步驟之剖面示意圖。
第2圖係為本發明一種耐高溫之化合物半導體基板之背面金屬改良結構之一具體實施例之製程步驟之剖面示意圖。
第3圖係為本發明一種耐高溫之化合物半導體基板之背面金屬改良結 構之一具體實施例之製程步驟之剖面示意圖。
第4圖係為本發明一種耐高溫之化合物半導體基板之背面金屬改良結構之一具體實施例之剖面示意圖。
第5圖係為本發明一種耐高溫之化合物半導體基板之背面金屬改良結構之一具體實施例之製程步驟之剖面示意圖。
第6圖係為本發明一種耐高溫之化合物半導體基板之背面金屬改良結構之一具體實施例之製程步驟之剖面示意圖。
第7圖係為本發明一種耐高溫之化合物半導體基板之背面金屬改良結構之又一具體實施例之剖面示意圖。
第8圖係為本發明一種耐高溫之化合物半導體基板之背面金屬改良結構之再一具體實施例之剖面示意圖。
第9圖係為習知技術之化合物半導體基板之背面金屬結構之一具體實施例之剖面示意圖。
第10圖係為習知技術之化合物半導體基板之背面金屬結構之另一具體實施例之剖面示意圖。
第11圖係為金錫二元相圖。
請參閱第1圖，其係為本發明一種耐高溫之化合物半導體基板之背面金屬改良結構之一具體實施例之製程步驟之剖面示意圖。形成如第1圖所示之結構之製程包括以下步驟：於一化合物半導體基板10之一上表面102之上形成一正面金屬層20，其中構成化合物半導體基板10之材料係包 括選自以下群組之一者：砷化鎵(GaAs)、碳化矽(SiC)、氮化鎵(GaN)、藍寶石(Sapphire)以及磷化銦(InP)；圖形化正面金屬層20；以及自化合物半導體基板10之一下表面101蝕刻化合物半導體基板10以形成複數個基板通孔12，其中每一個基板通孔12具有一內表面，其中基板通孔12之內表面包括一側面121以及一頂部122，其中基板通孔12之內表面之側面121係由化合物半導體基板10所定義，其中基板通孔12之內表面之頂部122係由正面金屬層20所定義。請參閱第2圖，其係為本發明一種耐高溫之化合物半導體基板之背面金屬改良結構之一具體實施例之製程步驟之剖面示意圖。第1圖中所示之結構經一些製程步驟可形成如第2圖所示之結構，其中包括以下步驟：形成至少一種子金屬層30，其中至少一種子金屬層30係形成覆蓋於化合物半導體基板10之下表面101以及每一基板通孔12之內表面(包括基板通孔12之內表面之側面121以及基板通孔12之內表面之頂部122)，其中正面金屬層20係藉由基板通孔12與至少一種子金屬層30電性連接(於基板通孔12之內表面之頂部122電性連接)，其中構成每一至少一種子金屬層30之材料係包括選自以下群組之至少一者：鈀(Pd)、鈦(Ti)以及鈦鎢合金(TiW)，其中至少一種子金屬層30具有一厚度，至少一種子金屬層30之厚度係大於或等於100Å且小於或等於10000Å；在一較佳之實施例中，至少一種子金屬層30係以沈積之方式形成覆蓋於化合物半導體基板10之下表面101以及每一基板通孔12之內表面；形成至少一背面金屬層40，其中至少一背面金屬層40係形成覆蓋於至少一種子金屬層30之一外表面301(包括形成覆蓋於基板通孔12內之至少一種子金屬層30之外表面301)，其中構成每一至少一背面金屬層40之材料係包括選自以下群組之至少一者：金以及金之合金，其中至少一背 面金屬層40具有一厚度，至少一背面金屬層40之厚度係大於或等於1μm且小於或等於10μm；在一較佳之實施例中，至少一背面金屬層40係以電鍍之方式形成覆蓋於至少一種子金屬層30之一外表面301；形成至少一擴散阻礙層50，其中至少一擴散阻礙層50係形成覆蓋於至少一背面金屬層40之一外表面401(包括形成覆蓋於基板通孔12內之至少一背面金屬層40之外表面401)，其中構成每一至少一擴散阻礙層50之材料係包括選自以下群組之至少一者：鎳(Ni)或鎳合金、釩(V)或釩合金、鎳釩合金以及鈀(Pd)，其中至少一擴散阻礙層50具有一厚度，至少一擴散阻礙層50之厚度係大於或等於1000Å且小於或等於20000Å；在一較佳之實施例中，至少一擴散阻礙層50係以電鍍之方式形成覆蓋於至少一背面金屬層40之一外表面401；形成一光阻層11，並蝕刻光阻層11，使得未被蝕刻之光阻層11係形成覆蓋於每一基板通孔12之內(並填滿每一基板通孔12)、每一基板通孔12之一鄰近區域13以及複數條街道狀凹槽之區域(請參閱第4圖之複數條街道狀凹槽14)之至少一擴散阻礙層50之一下表面501。請參閱第3圖，其係為本發明一種耐高溫之化合物半導體基板之背面金屬改良結構之一具體實施例之製程步驟之剖面示意圖。第2圖中所示之結構經一些製程步驟可形成如第3圖所示之結構，其中包括以下步驟：形成一晶粒黏著金屬層60，其中一晶粒黏著金屬層60係以形成於光阻層11之外之至少一擴散阻礙層50之下表面501(亦即，每一基板通孔12之外、每一基板通孔12之鄰近區域13之外以及複數條街道狀凹槽之區域之外之至少一擴散阻礙層50之下表面501)，其中構成晶粒黏著金屬層60之材料係包括選自以下群組之一者：錫、錫合金以及金錫合金，其中晶粒黏著金屬層60具有一厚度，晶粒黏著金屬層60之厚度係大於或等於5μm 且小於或等於20μm。在一較佳之實施例中，構成晶粒黏著金屬層60之材料係為金錫合金，其中金錫合金中金與錫之重量百分比係分別為：金重量百分比80%：錫重量百分比20%。在一較佳之實施例中，晶粒黏著金屬層60係以電鍍之方式形成於光阻層11之外之至少一擴散阻礙層50之下表面501(亦即，至少一基板通孔12之外、至少一基板通孔12之鄰近區域13之外以及複數條街道狀凹槽之區域之外之至少一擴散阻礙層50之下表面501)。在一較佳之實施例中，晶粒黏著金屬層60之厚度係大於或等於6μm且小於或等於8μm。請參閱第4圖，其係為本發明一種耐高溫之化合物半導體基板之背面金屬改良結構之一具體實施例之剖面示意圖。第4圖所示之實施例之主要結構係與第3圖所示之實施例大致相同，惟，其更包括複數條街道狀凹槽14，其中每一複數條街道狀凹槽14之一頂部係由至少一種子金屬層30之外表面301所定義，而每一複數條街道狀凹槽14之周圍係由至少一背面金屬層40、至少一擴散阻礙層50以及晶粒黏著金屬層60所定義。第3圖中所示之結構經一些製程步驟可形成如第4圖所示之結構，其中包括以下步驟：移除光阻層11；以及自至少一擴散阻礙層50之下表面501蝕刻複數條街道狀凹槽之區域之至少一擴散阻礙層50以及至少一背面金屬層40，使蝕刻終止於至少一種子金屬層30之外表面301，以形成複數條街道狀凹槽14。其中藉由至少一擴散阻礙層50以防止背面金屬層40擴散至晶粒黏著金屬層60，防止背面金屬層40擴散至晶粒黏著金屬層60，造成晶粒黏著金屬層60中金與錫之重量百分比之比例之改變。此外，也防止了晶粒黏著金屬層60遷移(migrate)進入基板通孔12內之背面金屬層40以及擴散阻礙層50之間，更避免晶粒黏著金屬層60所含之錫遷移(migrate)並擴散(diffuse)至基板通孔12之內表面之頂部122，而與 正面金屬層20相接觸，造成對形成於化合物半導體基板10之上表面102之化合物半導體元件之損害。
在一些實施例中，其中構成化合物半導體基板10之材料係包括選自以下群組之一者：碳化矽、氮化鎵以及藍寶石，其中構成每一至少一種子金屬層30之材料係包括選自以下群組之至少一者：鈦以及鈦鎢合金，其中構成每一至少一背面金屬層40之材料係包括選自以下群組之至少一者：金以及金之合金，其中構成每一至少一擴散阻礙層50之材料係包括選自以下群組之至少一者：鎳或鎳合金、釩或釩合金、以及鎳釩合金，其中構成晶粒黏著金屬層60之材料係包括選自以下群組之一者：錫、錫合金以及金錫合金；其中至少一種子金屬層30之厚度係大於或等於2000Å且小於或等於4000Å；其中至少一背面金屬層40之厚度係大於或等於4μm且小於或等於6μm；其中至少一擴散阻礙層50之厚度係大於或等於7000Å且小於或等於13000Å；其中晶粒黏著金屬層60之厚度係大於或等於6μm且小於或等於8μm。
在一些實施例中，其中構成化合物半導體基板10之材料係包括選自以下群組之一者：砷化鎵，其中構成每一至少一種子金屬層30之材料係包括鈀，其中構成每一至少一背面金屬層40之材料係包括選自以下群組之至少一者：金以及金之合金，其中構成每一至少一擴散阻礙層50之材料係包括選自以下群組之至少一者：鈀，其中構成晶粒黏著金屬層60之材料係包括選自以下群組之一者：錫、錫合金以及金錫合金；其中至少一種子金屬層30之厚度係大於或等於1500Å且小於或等於3500Å；其中至少一背面金屬層40之厚度係大於或等於1.5μm且小於或等於2.5μm；其中至少一擴 散阻礙層50之厚度係大於或等於1500Å且小於或等於3500Å；其中晶粒黏著金屬層60之厚度係大於或等於6μm且小於或等於8μm。
在一些實施例中，其中晶粒黏著金屬層60之厚度係大於或等於5μm且小於或等於7μm、大於或等於5μm且小於或等於8μm、大於或等於5μm且小於或等於9μm、大於或等於5μm且小於或等於10μm、大於或等於5μm且小於或等於11μm、大於或等於5μm且小於或等於12μm、大於或等於5μm且小於或等於20μm、大於或等於6μm且小於或等於20μm、大於或等於7μm且小於或等於20μm、大於或等於8μm且小於或等於20μm、大於或等於9μm且小於或等於20μm、大於或等於10μm且小於或等於20μm、或大於或等於6μm且小於或等於9μm。
在一些實施例中，其中至少一擴散阻礙層50之厚度係大於或等於1200Å且小於或等於20000Å、大於或等於1400Å且小於或等於20000Å、大於或等於1600Å且小於或等於20000Å、大於或等於1800Å且小於或等於20000Å、大於或等於2000Å且小於或等於20000Å、大於或等於2500Å且小於或等於20000Å、大於或等於3000Å且小於或等於20000Å、大於或等於1000Å且小於或等於18000Å、大於或等於1000Å且小於或等於16000Å、大於或等於1000Å且小於或等於14000Å、大於或等於1000Å且小於或等於12000Å、大於或等於1000Å且小於或等於10000Å、大於或等於1000Å且小於或等於8000Å、大於或等於1000Å且小於或等於7000Å、大於或等於1000Å且小於或等於6000Å、或大於或等於1000Å且小於或等於5000Å。
在一些實施例中，其中至少一背面金屬層40之厚度係大於或等於1.2μm且小於或等於10μm、大於或等於1.5μm且小於或等於10μm、 大於或等於1.7μm且小於或等於10μm、大於或等於2μm且小於或等於10μm、大於或等於2.2μm且小於或等於10μm、大於或等於2.5μm且小於或等於10μm、大於或等於3μm且小於或等於10μm、大於或等於1μm且小於或等於9.5μm、大於或等於1μm且小於或等於9μm、大於或等於1μm且小於或等於8.5μm、大於或等於1μm且小於或等於8μm、大於或等於1μm且小於或等於7.5μm、大於或等於1μm且小於或等於7μm、大於或等於1μm且小於或等於6.5μm、或大於或等於1μm且小於或等於6μm。
在一些實施例中，其中至少一種子金屬層30之厚度係大於或等於150Å且小於或等於10000Å、大於或等於200Å且小於或等於10000Å、大於或等於250Å且小於或等於10000Å、大於或等於300Å且小於或等於10000Å、大於或等於350Å且小於或等於10000Å、大於或等於400Å且小於或等於10000Å、大於或等於500Å且小於或等於10000Å、大於或等於600Å且小於或等於10000Å、大於或等於700Å且小於或等於10000Å、大於或等於800Å且小於或等於10000Å、大於或等於900Å且小於或等於10000Å、大於或等於100Å且小於或等於9000Å、大於或等於100Å且小於或等於8000Å、大於或等於100Å且小於或等於7000Å、大於或等於100Å且小於或等於6000Å、大於或等於100Å且小於或等於5000Å、大於或等於100Å且小於或等於4000Å、或大於或等於100Å且小於或等於3000Å。
第4圖中所示之結構係可由不同於上述之製程步驟所形成。請參閱第5圖，其係為本發明一種耐高溫之化合物半導體基板之背面金屬改良結構之一具體實施例之製程步驟之剖面示意圖。第1圖中所示之結構經一些製程步驟可形成如第5圖所示之結構，其中包括以下步驟：形成至少一種 子金屬層30，其中至少一種子金屬層30係形成覆蓋於化合物半導體基板10之下表面101以及每一基板通孔12之內表面(包括基板通孔12之內表面之側面121以及基板通孔12之內表面之頂部122)，其中正面金屬層20係藉由基板通孔12與至少一種子金屬層30電性連接(於基板通孔12之內表面之頂部122電性連接)，其中構成每一至少一種子金屬層30之材料係包括選自以下群組之至少一者：鈀(Pd)、鈦(Ti)以及鈦鎢合金(TiW)，其中至少一種子金屬層30具有一厚度，至少一種子金屬層30之厚度係大於或等於100Å且小於或等於10000Å；在一較佳之實施例中，至少一種子金屬層30係以沈積之方式形成覆蓋於化合物半導體基板10之下表面101以及每一基板通孔12之內表面；形成一光阻層11，並蝕刻光阻層11，使得未被蝕刻之光阻層11係形成覆蓋於複數條街道狀凹槽之區域(請參閱第4圖之複數條街道狀凹槽14)之至少一種子金屬層30之一外表面301；形成至少一背面金屬層40，其中至少一背面金屬層40係形成覆蓋於光阻層11之外(亦即複數條街道狀凹槽之區域之外)之至少一種子金屬層30之外表面301(包括形成覆蓋於基板通孔12內之至少一種子金屬層30之外表面301)，其中構成每一至少一背面金屬層40之材料係包括選自以下群組之至少一者：金以及金之合金，其中至少一背面金屬層40具有一厚度，至少一背面金屬層40之厚度係大於或等於1μm且小於或等於10μm；在一較佳之實施例中，至少一背面金屬層40係以電鍍之方式形成覆蓋於光阻層11之外(亦即複數條街道狀凹槽之區域之外)之至少一種子金屬層30之外表面301；以及形成至少一擴散阻礙層50，其中至少一擴散阻礙層50係形成覆蓋於光阻層11之外(亦即複數條街道狀凹槽之區域之外)之至少一背面金屬層40之一外表面401(包括形成覆蓋於基板通孔12內 之至少一背面金屬層40之外表面401)，其中構成每一至少一擴散阻礙層50之材料係包括選自以下群組之至少一者：鎳(Ni)或鎳合金、釩(V)或釩合金、鎳釩合金以及鈀(Pd)，其中至少一擴散阻礙層50具有一厚度，至少一擴散阻礙層50之厚度係大於或等於1000Å且小於或等於20000Å；在一較佳之實施例中，至少一擴散阻礙層50係以電鍍之方式形成覆蓋於光阻層11之外(亦即複數條街道狀凹槽之區域之外)之至少一背面金屬層40之外表面401。請參閱第6圖，其係為本發明一種耐高溫之化合物半導體基板之背面金屬改良結構之一具體實施例之製程步驟之剖面示意圖。第5圖中所示之結構經一些製程步驟可形成如第6圖所示之結構，其中包括以下步驟：移除光阻層11；形成一光阻層11’，並蝕刻光阻層11’，使得未被蝕刻之光阻層11’係形成覆蓋於每一基板通孔12之內(並填滿每一基板通孔12)以及每一基板通孔12之一鄰近區域13之至少一擴散阻礙層50之一下表面501、以及複數條街道狀凹槽之區域之至少一種子金屬層30之外表面301；以及形成一晶粒黏著金屬層60，其中一晶粒黏著金屬層60係以形成於光阻層11之外之至少一擴散阻礙層50之下表面501(亦即，每一基板通孔12之外、每一基板通孔12之一鄰近區域13之外以及複數條街道狀凹槽之區域之外之至少一擴散阻礙層50之下表面501)，其中構成晶粒黏著金屬層60之材料係包括選自以下群組之一者：錫、錫合金以及金錫合金，其中晶粒黏著金屬層60具有一厚度，晶粒黏著金屬層60之厚度係大於或等於5μm且小於或等於20μm。在一較佳之實施例中，構成晶粒黏著金屬層60之材料係為金錫合金，其中金錫合金中金與錫之重量百分比係分別為：金重量百分比80%：錫重量百分比20%。在一較佳之實施例中，晶粒黏著金屬層60係以電鍍之方式形成於光阻層11之外 之至少一擴散阻礙層50之下表面501(亦即，至少一基板通孔12之外、至少一基板通孔12之鄰近區域13之外以及複數條街道狀凹槽之區域之外之至少一擴散阻礙層50之下表面501)。在一較佳之實施例中，晶粒黏著金屬層60之厚度係大於或等於6μm且小於或等於8μm。其中第6圖中所示之結構再經一移除光阻層11’之製程步驟即可形成如第4圖所示之結構。
請參閱第7圖，其係為本發明一種耐高溫之化合物半導體基板之背面金屬改良結構之又一具體實施例之剖面示意圖。第4圖中所示之結構經一些製程步驟可形成如第7圖所示之結構，其中包括以下步驟：將第4圖之實施例沿著複數條街道狀凹槽14切割，可切割成複數個化合物半導體晶粒1，其中第7圖所示係為一單一化合物半導體晶粒1；取一載板70，於載板70之一上表面形成一抗氧化層71，再將化合物半導體晶粒1置於載板70之抗氧化層71之上，並將載板70(及抗氧化層71)預先加熱至200℃；自化合物半導體晶粒1之上方施以一向下之壓力，並將化合物半導體晶粒1以及載板70(及抗氧化層71)加熱至280℃至320℃，使得晶粒黏著金屬層60相變為液相，其中晶粒黏著金屬層60之金與錫會互熔在一起，而於降溫之後形成金錫合金，使得化合物半導體晶粒1固定於載板70之抗氧化層71之上。其中當從化合物半導體晶粒1之上方施以向下之壓力，並將化合物半導體晶粒1以及載板70(及抗氧化層71)加熱至280℃至320℃之過程中，晶粒黏著金屬層60相變為液相，因此化合物半導體晶粒1四周之晶粒黏著金屬層60會被擠壓出來，而形成如晶粒黏著金屬層60之一溢流部602。由於本發明之晶粒黏著金屬層60係可良好黏著於至少一種子金屬層30之外表面301，因此可增強化合物半導體晶粒1四周之晶粒黏著金屬層60之溢流部602之結構強度。
第8圖係為本發明一種耐高溫之化合物半導體基板之背面金屬改良結構之再一具體實施例之剖面示意圖。第8圖所示之實施例之主要結構係與第4圖所示之實施例大致相同，惟，其中複數條街道狀凹槽14於定義其周圍之晶粒黏著金屬層60之部分具有較寬之寬度，而複數條街道狀凹槽14於定義其周圍之至少一背面金屬層40以及至少一擴散阻礙層50之部分具有較窄之寬度。在第7圖所示之實施例中，在化合物半導體晶粒1四周會有晶粒黏著金屬層60溢出之溢流部602。而第8圖之實施例係可減少如第7圖之實施例中之化合物半導體晶粒1四周之晶粒黏著金屬層60之溢流部602之溢出量。
以上所述乃是本發明之具體實施例及所運用之技術手段，根據本文的揭露或教導可衍生推導出許多的變更與修正，仍可視為本發明之構想所作之等效改變，其所產生之作用仍未超出說明書及圖式所涵蓋之實質精神，均應視為在本發明之技術範疇之內，合先陳明。
綜上所述，依上文所揭示之內容，本發明確可達到發明之預期目的，提供一種耐高溫之化合物半導體基板之背面金屬改良結構，極具產業上利用之價植，爰依法提出發明專利申請。

Claims (17)

  1. 一種耐高溫之化合物半導體基板之背面金屬改良結構，包括：一化合物半導體基板；一正面金屬層，係形成於該化合物半導體基板之一上表面；至少一基板通孔，其中每一基板通孔係分別貫穿該化合物半導體基板，其中每一基板通孔具有一內表面，其中該內表面之一頂部係由該正面金屬層所定義；至少一種子金屬層，係形成覆蓋於該化合物半導體基板之一下表面以及每一基板通孔之該內表面，其中該至少一種子金屬層係藉由該至少一基板通孔與該正面金屬層電性連接；至少一背面金屬層，係形成覆蓋於該種子金屬層之一外表面；至少一擴散阻礙層，係形成覆蓋於該至少一背面金屬層之一外表面；以及一晶粒黏著金屬層，係形成於該至少一基板通孔之一鄰近區域之外及該至少一基板通孔之外之該至少一擴散阻礙層之一下表面；其中藉由該至少一擴散阻礙層以防止該至少一背面金屬層擴散至該晶粒黏著金屬層。
  2. 如申請專利範圍第1項所述之耐高溫之化合物半導體基板之背面金屬改良結構，其中構成每一該至少一擴散阻礙層之材料係包括選自以下群組之至少一者：鎳或鎳合金、釩或釩合金、以及鈀。
  3. 如申請專利範圍第2項所述之耐高溫之化合物半導體基板之背面金屬改良結構，其中構成每一該至少一擴散阻礙層之材料係為鎳釩合金。
  4. 如申請專利範圍第1項所述之耐高溫之化合物半導體基板之背面金屬改良結構，其中構成該化合物半導體基板之材料係包括選自以下群組之一者：砷化鎵、碳化矽、氮化鎵、藍寶石以及磷化銦。
  5. 如申請專利範圍第1項所述之耐高溫之化合物半導體基板之背面金屬改良結構，其中構成每一該至少一種子金屬層之材料係包括選自以下群組之至少一者：鈀、鈦以及鈦鎢合金。
  6. 如申請專利範圍第1項所述之耐高溫之化合物半導體基板之背面金屬改良結構，其中構成每一該至少一背面金屬層之材料係包括選自以下群組之至少一者：金以及金之合金。
  7. 如申請專利範圍第1項所述之耐高溫之化合物半導體基板之背面金屬改良結構，其中構成該晶粒黏著金屬層之材料係包括選自以下群組之一者：錫以及錫合金。
  8. 如申請專利範圍第7項所述之耐高溫之化合物半導體基板之背面金屬改良結構，其中構成該晶粒黏著金屬層之材料係為金錫合金。
  9. 如申請專利範圍第8項所述之耐高溫之化合物半導體基板之背面金屬改良結構，其中金錫合金中金與錫之重量百分比係為80%：20%。
  10. 如申請專利範圍第1項所述之耐高溫之化合物半導體基板之背面金屬改良結構，其更包括複數條街道狀凹槽，其中每一該複數條街道狀凹槽之一頂部係由該至少一種子金屬層所定義，每一該複數條街道狀凹槽之周圍係由該至少一背面金屬層以及該至少一擴散阻礙層所定義。
  11. 如申請專利範圍第10項所述之耐高溫之化合物半導體基板之背面金屬改良結構，其中每一該複數條街道狀凹槽之周圍係由該至少一背面金屬 層、該至少一擴散阻礙層以及該晶粒黏著金屬層所定義。
  12. 如申請專利範圍第1項所述之耐高溫之化合物半導體基板之背面金屬改良結構，其中該至少一擴散阻礙層具有一厚度，該至少一擴散阻礙層之該厚度係大於或等於1000Å且小於或等於20000Å。
  13. 如申請專利範圍第1項所述之耐高溫之化合物半導體基板之背面金屬改良結構，其中該至少一種子金屬層具有一厚度，該至少一種子金屬層之該厚度係大於或等於100Å且小於或等於10000Å。
  14. 如申請專利範圍第1項所述之耐高溫之化合物半導體基板之背面金屬改良結構，其中該晶粒黏著金屬層具有一厚度，該晶粒黏著金屬層之該厚度係大於或等於5μm且小於或等於20μm。
  15. 如申請專利範圍第1項所述之耐高溫之化合物半導體基板之背面金屬改良結構，其中該至少一背面金屬層具有一厚度，該至少一背面金屬層之該厚度係大於或等於1μm且小於或等於10μm。
  16. 如申請專利範圍第1項所述之耐高溫之化合物半導體基板之背面金屬改良結構，其中構成該化合物半導體基板之材料係包括選自以下群組之一者：碳化矽、氮化鎵以及藍寶石，其中構成每一該至少一種子金屬層之材料係包括選自以下群組之至少一者：鈦以及鈦鎢合金。
  17. 如申請專利範圍第1項所述之耐高溫之化合物半導體基板之背面金屬改良結構，其中構成該化合物半導體基板之材料係包括選自以下群組之一者：砷化鎵，其中構成每一該至少一種子金屬層之材料係包括鈀。
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