JP7468828B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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JP7468828B2
JP7468828B2 JP2020083020A JP2020083020A JP7468828B2 JP 7468828 B2 JP7468828 B2 JP 7468828B2 JP 2020083020 A JP2020083020 A JP 2020083020A JP 2020083020 A JP2020083020 A JP 2020083020A JP 7468828 B2 JP7468828 B2 JP 7468828B2
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metal layer
solder
resin film
forming
film
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JP2021180205A (ja
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慶太 松田
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Sumitomo Electric Device Innovations Inc
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Sumitomo Electric Device Innovations Inc
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Priority to JP2020083020A priority Critical patent/JP7468828B2/ja
Priority to US17/237,776 priority patent/US11594507B2/en
Priority to CN202110441202.XA priority patent/CN113643993A/zh
Priority to TW110115517A priority patent/TW202205458A/zh
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Description

本開示は半導体装置の製造方法に関するものである。
半導体装置を基板などにフリップチップ実装するため、ボールグリッドアレイ(Ball Grid Array:BGA)のパッケージが用いられることがある。こうした半導体装置の上には半田ボールが形成される。例えば特許文献1には、補強層を含む複数の金属膜で形成された電極の上に半田バンプを有する半導体装置が記載されている。
半田の配線層への拡散を抑制するため、配線層の上に金属層(アンダーバンプメタル、UBM:Under Bump Metal)を設け、その上に半田ボールを設けることがある。また、水分などから半導体層を保護するため、半導体層の上に例えばポリイミドなどで形成された絶縁膜を設ける。
特開2006-120803号公報
金属層の熱膨張係数は絶縁膜の熱膨張係数とは異なるため、半田ボールを設ける際の温度変化に起因して、金属層と絶縁膜との密着性が低下する。金属層と絶縁膜との間に隙間が生じることがある。この隙間に半田が回り込み、配線層に到達することがある。半田が配線層とマイグレーションを起こし、半導体装置の信頼性が低下する。そこで、半田の回り込みを抑制することが可能な半導体装置の製造方法を提供することを目的とする。
本開示に係る半導体装置の製造方法は、第1金属層の上に熱硬化性の樹脂膜を形成する工程と、前記樹脂膜に開口部を形成する工程と、前記樹脂膜の開口部から露出する前記第1金属層の上面から、前記樹脂膜の上面まで第2金属層を形成する工程と、前記第2金属層を形成する工程の後、前記樹脂膜が硬化する温度以上の温度で熱処理する工程と、前記熱処理する工程の後に、前記樹脂膜の上面および前記第2金属層の側面を覆うカバー膜を形成する工程と、前記カバー膜を形成する工程の後に、前記カバー膜の開口部から露出する前記第2金属層の上面に、半田を形成する工程と、を有する。
本開示によれば半田の回り込みを抑制することが可能である。
図1Aは実施形態に係る半導体装置を例示する平面図である。 図1Bは図1Aの線A-Aに沿った断面図である。 図2Aは半導体装置の製造方法を例示する断面図である。 図2Bは半導体装置の製造方法を例示する断面図である。 図2Cは半導体装置の製造方法を例示する断面図である。 図2Dは半導体装置の製造方法を例示する断面図である。 図3Aは半導体装置の製造方法を例示する断面図である。 図3Bは半導体装置の製造方法を例示する断面図である。 図3Cは半導体装置の製造方法を例示する断面図である。 図4は比較例に係る半導体装置の製造方法を例示する断面図である。
[本開示の実施形態の説明]
最初に本開示の実施形態の内容を列記して説明する。
本開示の一形態は、(1)第1金属層の上に熱硬化性の樹脂膜を形成する工程と、前記樹脂膜に開口部を形成する工程と、前記樹脂膜の開口部から露出する前記第1金属層の上面から、前記樹脂膜の上面まで第2金属層を形成する工程と、前記第2金属層を形成する工程の後、前記樹脂膜が硬化する温度以上の温度で熱処理する工程と、前記熱処理する工程の後に、前記樹脂膜の上面および前記第2金属層の側面を覆うカバー膜を形成する工程と、前記カバー膜を形成する工程の後に、前記カバー膜の開口部から露出する前記第2金属層の上面に、半田を形成する工程と、を有する半導体装置の製造方法である。熱処理によって第2金属層と樹脂膜との間に隙間が生じる。カバー膜が隙間をふさぐことで、半田を形成する工程において、半田の回り込みを抑制することができる。
(2)前記樹脂膜はポリイミド膜でもよい。熱処理によって樹脂膜が収縮し、第2金属層との間に隙間が形成される。カバー膜が隙間をふさぐことで、半田の回り込みを抑制することができる。
(3)前記第2金属層を形成する工程は、前記樹脂膜の開口部から露出する前記第1金属層の上面から前記樹脂膜の上面まで第3金属層を形成する工程と、前記第3金属層の上面から前記樹脂膜の上面のうち前記第3金属層の外側の部分まで第4金属層を形成する工程と、を含んでもよい。第2金属層は、第3金属層および第4金属層を含み、半田の第1金属層への拡散を抑制するバリアとして機能する。
(4)前記第1金属層は金を含み、前記第3金属層はパラジウムを含み、前記第4金属層を形成する工程は、無電解メッキ処理により、ニッケルを含む前記第4金属層を形成する工程でもよい。第2金属層は、第3金属層および第4金属層を含み、半田の第1金属層への拡散を抑制するバリアとして機能する。熱処理によって第4金属層に応力がかかり、樹脂膜との密着性が低下する。カバー膜によって半田の回り込みを抑制することができる。
(5)前記カバー膜の半田への濡れ性は、前記第2金属層の濡れ性よりも低くてもよい。半田の回り込みを効果的に抑制することができる。
(6)前記カバー膜を形成する工程は、前記樹脂膜の上面から前記第2金属層の上面までを覆う前記カバー膜を形成する工程でもよい。カバー膜がはがれにくくなり、半田の回り込みを効果的に抑制することができる。
(7)前記熱処理する工程における温度は半田の融点以上でもよい。半田を形成する工程の前に、半田の融点以上の温度で熱処理を行うことで、あらかじめ第2金属層と樹脂膜との間に隙間を形成する。半田ボールを形成する工程においてカバー膜に応力がかかりにくくなる。カバー膜が隙間をふさぐことで、半田の回り込みを抑制することができる。
[本開示の実施形態の詳細]
本開示の実施形態に係る半導体装置の製造方法の具体例を、以下に図面を参照しつつ説明する。なお、本開示はこれらの例示に限定されるものではなく、特許請求の範囲によって示され、特許請求の範囲と均等の意味および範囲内でのすべての変更が含まれることが意図される。
(半導体装置)
図1Aは実施形態に係る半導体装置100を例示する平面図である。図1Aに示すように、半導体装置100は基板10の表面に設けられた複数の半田ボール22を有するBGAタイプの半導体装置である。複数の半田ボール22は基板10の1つの面にグリッド状に配列され、半導体装置100と外部機器との電気的な接続に用いられるパッドである。
図1Bは図1Aの線A-Aに沿った断面図である。図1Bに示すように、半導体装置100は基板10、半導体層12、絶縁膜13、樹脂膜16、配線層14(第1金属層)、UBM19(第2金属層)、カバー膜20および半田ボール22を備える。
基板10は例えば炭化シリコン(SiC)またはサファイアなど絶縁体で形成された絶縁基板である。半導体層12は基板10の上面に設けられている。半導体層12は、例えば窒化ガリウム(GaN)のチャネル層、窒化アルミニウムガリウム(AlGaN)の電子供給層などを含み、電界効果トランジスタ(Field Effect Transistor:FET)が形成されている。
絶縁膜13は、例えば厚さ0.1~0.5μmの窒化シリコン(SiN)などの無機絶縁体、またはポリイミドなどの有機絶縁膜であり、半導体層12の上面を覆うパッシベーション膜である。
配線層14は絶縁膜13の上面に設けられ、例えば金(Au)などの金属で形成されている。絶縁膜13は不図示の開口部を有し、配線層14は当該開口部を通じて半導体層12と電気的に接続される。
樹脂膜16は絶縁膜13の上面に設けられ、例えば厚さ5μmのポリイミドまたはベンゾシクロブテン(BCB)など、熱硬化性樹脂で形成された層間膜である。樹脂膜16は配線層14の上に開口部16aを有する。
UBM19は下地層17(第3金属層)とメッキ層18(第4金属層)とを有する。下地層17は例えば厚さ15nmであり、チタン(Ti)層とパラジウム(Pd)層との積層体である。下地層17は、開口部16aから露出する配線層14の上面、開口部16aの内壁および樹脂膜16の上面のうち開口部16a付近の部分に設けられている。メッキ層18は例えば無電解メッキ処理で形成され、厚さ3.5nmのニッケル-リン(Ni-P)などで形成され、下地層17の上面および側面、樹脂膜16の上面に設けられている。UBM19の下面と樹脂膜16の上面との間には隙間15が生じている。
カバー膜20は、樹脂膜16の上面、UBM19の側面、およびUBM19の上面の周縁部を覆う。カバー膜20はUBM19および隙間15を囲み、隙間15をふさいでいる。カバー膜20は例えば亜鉛(Zn)、クロム(Cr)、ニッケルクロム合金(Ni/Cr)、チタン(Ti)、モリブデン(Mo)、アルミニウム(Al)、鉄(Fe)などの金属、およびこれら金属の酸化物などで形成されてもよいし、SiNまたはSiOなどの絶縁体、ポリイミドなどの樹脂で形成されてもよい。カバー膜20の厚さT1は隙間15をふさぐことができる程度であればよい。ポリイミドのカバー膜20の厚さT1は例えば5μmである。金属または絶縁体のカバー膜20の厚さT1は例えば1.5μmである。ポリイミドのカバー膜20は複数のUBM19の間を覆い、カバー膜20のうち樹脂膜16と接する部分の幅W1は例えば200μmである。金属または絶縁体のカバー膜20の幅W1は例えば1.5μmである。カバー膜20のうちメッキ層18と接する部分の幅W2は例えば1.5μmである。カバー膜20は開口部20aを有する。
半田ボール22は、例えば錫および金の合金(Sn-Au)、錫および銀の合金(Sn-Ag)、錫、銀および銅の合金(Sn-Ag-Cu)などの金属により形成されている。半田ボール22は、カバー膜20の開口部20aから露出するUBM19のメッキ層18の上面に接触している。
(製造方法)
図2Aから図3Cは半導体装置100の製造方法を例示する断面図であり、図1Bに対応する断面を図示している。図2Aの工程の前に、例えば有機金属化学気相成長法(MOCVD:Metal Organic Chemical Vapor Deposition)などにより、基板10の上面に半導体層12をエピタキシャル成長する。例えば化学気相成長(Chemical Vapor Deposition:CVD)法などにより、半導体層12の上面に、SiNの絶縁膜13を形成する。
図2Aに示すように、電解メッキ処理などにより、絶縁膜13の上面に配線層14を形成する。図2Bに示すように、絶縁膜13の上面に樹脂膜16を形成する。図2Cに示すように、樹脂膜16の上面に感光性のフォトレジストを設け、レジストパターニングを行い、レジストマスク24を設ける。レジストマスク24を用いて樹脂膜16をエッチングすることで、樹脂膜16に開口部16aを形成する。開口部16aからは配線層14が露出する。エッチングの後、レジストマスク24は除去する。
図2Dに示すように、真空蒸着およびリフトオフにより、下地層17を配線層14の上面から、樹脂膜16の上面のうち開口部16a付近の部分まで形成する。図3Aに示すように、例えば下地層17をシードメタルとして用いる無電解メッキ処理により、メッキ層18を形成する。メッキ層18は下地層17の上面から、樹脂膜16の上面のうち下地層17の外側の部分まで設けられる。下地層17およびメッキ層18は、樹脂膜16の上面に接触する。
メッキ層18の形成後、例えば30分間、温度を350℃に保つことで熱処理を行う。樹脂膜16は例えばポリイミドなど熱硬化性の樹脂であるため、熱処理により収縮する。メッキ層18には応力がかかり、UBM19と樹脂膜16との密着性が低下する。この結果、図3Bに示すように、UBM19と樹脂膜16との間に隙間15が生じる。
図3Cに示すように、熱処理後、真空蒸着・リフトオフ、またはメッキ処理などにより、カバー膜20を形成する。カバー膜20は、樹脂膜16の上面からメッキ層18の上面のうち外周部までを覆い、隙間15をふさぐ。カバー膜20の開口部20aからは、メッキ層18の上面が露出する。
カバー膜20を設けた後、開口部20aから露出するメッキ層18の上面にフラックスを塗布する。メッキ層18の上面に半田ペーストを配置し、例えば260℃など半田の融点以上の温度まで昇温し、リフロー処理を行う。リフロー処理により、メッキ層18の上に半田ボール22を形成する。以上の工程で半導体装置100を形成する。
(比較例)
図4は比較例に係る半導体装置の製造方法を例示する断面図である。図2Aから図3Aまでの工程は比較例でも行われる。比較例においては、UBM19の形成後、熱処理およびカバー膜20の形成を行わずに、リフロー処理を行う。図4に示すように、半田ボール22が形成される。リフロー処理では、温度を半田の融点以上である260℃まで高める。UBM19と樹脂膜16との熱膨張係数の違いによって、UBM19のメッキ層18に応力がかかる。応力によって、メッキ層18と樹脂膜16との間に隙間26が生じる。このためメッキ層18の半田に対するバリアとしての機能が低下する。
図4に矢印で示すように、溶融した半田の一部は、隙間26に回り込み、例えば下地層17を通じて配線層14に拡散する。また、例えば下地層17と樹脂膜16との界面から配線層14まで侵入する。半田が配線層14のAuと反応し、マイグレーションが発生する。この結果、半導体装置の寿命が短くなってしまう。
これに対し、本実施形態によれば、配線層14の上面および樹脂膜16の上面までUBM19を設けた後、熱処理を行う。樹脂膜16がポリイミドなどの熱硬化性樹脂であるため、熱処理により収縮し、樹脂膜16とUBM19との間にあらかじめ隙間15を形成することができる。熱処理の後、UBM19の側面を覆うカバー膜20を設け、半田ボール22を形成する。熱処理で生じた隙間15をカバー膜20でふさぐことにより、半田の隙間15への回り込みを抑制することができる。この結果、半田と配線層14とのマイグレーションも抑制することができる。半導体装置100の寿命の劣化が抑制される。
熱処理によって樹脂膜16とUBM19との間にあらかじめ隙間15を形成する。リフロー処理において昇温した際に、カバー膜20に応力が加わることを抑制し、カバー膜20の剥離、損傷などを抑制することができる。樹脂膜16は、例えばポリイミドなどの樹脂で形成され、水分などから半導体装置100を保護する保護膜である。
UBM19は、半田の配線層14への拡散を抑制するバリアとして機能する。例えばUBM19は、順に積層された下地層17およびメッキ層18を含む。半田へのバリア性を高めるため、下地層17はPdを含み、メッキ層18はNiを含むことが好ましい。メッキ層18は例えば無電解メッキ処理で形成されるNi-Pd膜であり、蒸着で形成する金属層に比べて緻密で、バリアとして高い性能を有する。
その一方で、メッキ層18は樹脂膜16の上面に接触しており、かつメッキ層18の熱膨張係数は樹脂膜16の熱膨張係数とは異なる。したがって温度変化によってメッキ層18に応力がかかる。無電解Ni-Pメッキ層であるメッキ層18に大きな応力が発生し、ポリイミドの樹脂膜16との密着性が低下しやすい。実施形態によれば、カバー膜20によってメッキ層18の側面を覆うため、半田の回り込みを抑制することができる。下地層17はPd以外に例えばCuなどの金属で形成されてもよい。メッキ層18はNi以外に例えばニッケルおよび金の積層構造(Ni/Au)、ニッケルおよび銀の積層構造(Ni/Ag)などの金属で形成されている。また、メッキ層18に代えて、スパッタリングで積層したTi/NiV/Agの層を用いてもよい。
リフロー処理の前にメッキ層18の表面にフラックスを塗布し、表面の酸化膜を除去することで、半田濡れ性を高めることが好ましい。メッキ層18の表面に、例えばAuなどNiよりも半田濡れ性の高い金属の膜を設けることで、半田濡れ性を向上することができる。しかし、メッキ層18とUBM19との界面の半田濡れ性が高くなり、半田が侵入する恐れがある。メッキ層18をNiなど半田濡れ性の低い金属とし、メッキ層18の表面にフラックスを塗ることで、半田濡れ性の向上と、半田の侵入の抑制を両立することができる。なお、ここでの濡れ性とは、半田の搭載面と半田表面とが交わる領域の角度(接触角)の大小で評価することができる。角度が大きいほど濡れ性が低く、角度が小さいほど濡れ性が高いと判断する。
半田の融点は例えば250℃以下であり、リフロー処理における温度は融点以上の260℃とする。熱処理における温度は半田の融点以上である。熱処理において、例えば、20分以上40分以下の時間にわたって温度を300℃以上、400℃以下とする。温度は350℃以上、400℃以下でもよい。熱処理でリフロー処理の温度以上の温度まで昇温することで、UBM19と樹脂膜16との間にあらかじめ隙間15を形成することができる。カバー膜20で隙間15をふさぎ、半田の回り込みを抑制することができる。熱処理により既にUBM19の一部が樹脂膜16からはがれているため、リフロー処理において剥離が発生しにくい。したがってリフロー処理においてカバー膜20に応力がかかりにくくなる。
カバー膜20と樹脂膜16との密着性は、UBM19と樹脂膜16との密着性より高いことが好ましい。カバー膜20の半田濡れ性は例えばUBM19よりも低いことが好ましい。例えば、カバー膜20は例えばZn、Cr、Ti、Mo、AlおよびFeで形成されているか、これらの金属の少なくとも1つを含む合金などで形成されている。半田がカバー膜20の表面に広がりにくく、半田の回り込み、および複数の半田ボール22間のショートを抑制することができる。電気信号の損失を抑制するため、カバー膜20の電気抵抗は、例えばUBM19、配線層14および半田ボールより高いことが好ましい。
カバー膜20は、樹脂膜16の上面、UBM19の側面および上面を覆う。カバー膜20がUBM19の上面に乗り上げているため、カバー膜20がはがれにくくなり、半田の回り込みを効果的に抑制することができる。カバー膜20はUBM19を完全に囲むことが好ましい。
半導体装置100のパッドの配置は図1AのようなBGAでもよいし、BGA以外でもよい。基板10はSiC、シリコン(Si)、サファイア、GaNなどの絶縁体で形成される。半導体層12は、例えば窒化物半導体または砒素系半導体などで形成された化合物半導体層である。窒化物半導体とは、窒素(N)を含む半導体であり、例えばGaN、AlGaN、窒化インジウムガリウム(InGaN)、窒化インジウム(InN)、および窒化アルミニウムインジウムガリウム(AlInGaN)などがある。砒素系半導体とはガリウム砒素(GaAs)など砒素(As)を含む半導体である。半導体層12にはFET以外の半導体素子が形成されてもよい。
以上、本開示の実施形態について詳述したが、本開示は係る特定の実施形態に限定されるものではなく、特許請求の範囲に記載された本開示の要旨の範囲内において、種々の変形・変更が可能である。
10 基板
12 半導体層
13 絶縁膜
14 配線層
15、26 隙間
16 樹脂膜
16a 開口部
17 下地層
18 メッキ層
19 UBM
20 カバー膜
22 半田ボール
24 レジストマスク
100 半導体装置

Claims (7)

  1. 第1金属層の上に熱硬化性の樹脂膜を形成する工程と、
    前記樹脂膜に開口部を形成する工程と、
    前記樹脂膜の開口部から露出する前記第1金属層の上面から、前記樹脂膜の上面まで第2金属層を形成する工程と、
    前記第2金属層を形成する工程の後、前記樹脂膜が硬化する温度以上の温度で熱処理する工程と、
    前記熱処理する工程の後に、少なくとも前記樹脂膜の上面から前記第2金属層の側面までを覆うカバー膜を形成する工程と、
    前記カバー膜を形成する工程の後に、前記カバー膜の開口部から露出する前記第2金属層の上面に、半田を形成する工程と、を有する半導体装置の製造方法。
  2. 前記樹脂膜はポリイミド膜である請求項1に記載の半導体装置の製造方法。
  3. 前記第2金属層は第3金属層と第4金属層とを含み、
    前記第2金属層を形成する工程は、前記樹脂膜の開口部から露出する前記第1金属層の上面から前記樹脂膜の上面まで前記第3金属層を形成する工程と、
    前記第3金属層の上面から前記樹脂膜の上面のうち前記第3金属層の外側の部分まで前記第4金属層を形成する工程と、を含み、
    前記カバー膜の前記半田への濡れ性は、前記第4金属層の表面の前記半田への濡れ性よりも低い請求項1または請求項2に記載の半導体装置の製造方法。
  4. 前記第1金属層は金を含み、
    前記第3金属層はパラジウムを含み、
    前記第4金属層を形成する工程は、無電解メッキ処理により、ニッケルを含む前記第4金属層を形成する工程である請求項3に記載の半導体装置の製造方法。
  5. 前記カバー膜の前記半田への濡れ性は、前記第2金属層の表面の前記半田への濡れ性よりも低い請求項1から請求項4のいずれか一項に記載の半導体装置の製造方法。
  6. 前記カバー膜を形成する工程は、前記樹脂膜の上面から前記第2金属層の上面のうち外周部までを覆う前記カバー膜を形成する工程であり、
    前記カバー膜を形成する工程の後であって前記半田を形成する前において、前記第2金属層の上面の一部は、前記カバー膜から露出する請求項1から請求項5のいずれか一項に記載の半導体装置の製造方法。
  7. 前記熱処理する工程における温度は前記半田の融点以上である請求項1から請求項6のいずれか一項に記載の半導体装置の製造方法。
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JP2012505555A (ja) 2008-12-19 2012-03-01 インテル コーポレイション 集積回路のバンプ応力緩和層
JP2017228583A (ja) 2016-06-20 2017-12-28 住友電工デバイス・イノベーション株式会社 半導体装置の製造方法

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JP2006120803A (ja) 2004-10-20 2006-05-11 Fujitsu Ltd 半導体装置及び半導体装置の製造方法

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Publication number Priority date Publication date Assignee Title
JP2012505555A (ja) 2008-12-19 2012-03-01 インテル コーポレイション 集積回路のバンプ応力緩和層
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