TW201911533A - 參考電壓電路以及半導體裝置 - Google Patents
參考電壓電路以及半導體裝置 Download PDFInfo
- Publication number
- TW201911533A TW201911533A TW107116355A TW107116355A TW201911533A TW 201911533 A TW201911533 A TW 201911533A TW 107116355 A TW107116355 A TW 107116355A TW 107116355 A TW107116355 A TW 107116355A TW 201911533 A TW201911533 A TW 201911533A
- Authority
- TW
- Taiwan
- Prior art keywords
- transistor
- reference voltage
- voltage circuit
- transistors
- semiconductor device
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 23
- 230000005484 gravity Effects 0.000 claims description 17
- 239000011347 resin Substances 0.000 abstract description 6
- 229920005989 resin Polymers 0.000 abstract description 6
- 238000005538 encapsulation Methods 0.000 abstract 1
- 238000007789 sealing Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/205—Substrate bias-voltage generators
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/26—Current mirrors
- G05F3/262—Current mirrors using field-effect transistors only
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/24—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/26—Current mirrors
- G05F3/265—Current mirrors using bipolar transistors only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/0883—Combination of depletion and enhancement field effect transistors
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Automation & Control Theory (AREA)
- Electromagnetism (AREA)
- Radar, Positioning & Navigation (AREA)
- Nonlinear Science (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Control Of Electrical Variables (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
本發明藉由多個電晶體來構成空乏型電晶體或/及增強型電晶體,並將空乏型電晶體與增強型電晶體以共形心(共重心)的方式進行配置,從而製成規避了由半導體裝置的樹脂密封等的應力帶來的特性變動的影響的、產品差異少的參考電壓電路。
Description
本發明是有關於一種參考電壓電路以及半導體裝置。
作為參考電壓電路已知有如圖7所示般的組合有空乏型電晶體及增強型電晶體的參考電壓電路700(例如,參照日本專利特表2012-531825號專利文獻1)。
參考電壓電路700包括:空乏型的電晶體710、增強型的電晶體720以及輸出參考電壓VREF的端子730。
參照圖8對參考電壓電路700的動作進行說明。若將電晶體710的臨限值電壓設為VTND,則所述電晶體710的電壓與電流的關係如特性801所示。若將電晶體720的臨限值電壓設為VTNE,則所述電晶體720的電壓與電流的關係如特性802所示。將與特性801的切片的值相等的電流流入至增強型電晶體720而產生的電壓作為參考電壓VREF而輸出至端子730。 [現有技術文獻] [專利文獻]
[專利文獻1]日本專利特表2012-531825號公報
[發明所欲解決之課題]
一般而言,已知半導體裝置會因樹脂密封(封裝(packaging))產生的應力的影響而發生特性變動。 例如,若於對沿x軸方向配置有電晶體710及電晶體720的半導體裝置進行樹脂密封時沿x軸方向施加應力,則有可能於電晶體710及電晶體720的特性變動中產生偏差。即,特性801及特性802有可能與偏離期望的特性產生偏差。
本發明提供一種具有參考電壓電路的半導體裝置,所述參考電壓電路是為了規避由半導體裝置的樹脂密封等的應力帶來的特性變動的影響而成,並且產品差異少。 [解決課題之手段]
本發明的參考電壓電路的特徵在於:藉由多個電晶體來構成空乏型電晶體或/及增強型電晶體,並將空乏型電晶體與增強型電晶體以共形心(common centroid)(共重心)的方式配置。 [發明的效果]
根據本發明的參考電壓電路,能夠提供一種具有規避由半導體裝置的樹脂密封等的應力帶來的特性變動的影響,並且產品差異少的參考電壓電路的半導體裝置。
圖1是表示本發明的第一實施形態的參考電壓電路的說明圖。 參考電壓電路100包括:空乏型的電晶體110、增強型的電晶體120以及輸出參考電壓VREF的端子130。
電晶體110藉由串聯連接兩個空乏型的電晶體111與112而構成。電晶體120藉由串聯連接兩個電晶體121及122而構成。
參考電壓電路100的動作與藉由一般的空乏型的電晶體110與增強型的電晶體120構成的參考電壓電路相同,將參考電壓VREF輸出至端子130。
此處,參考電壓電路100中,將電晶體111與電晶體112設為相同尺寸(寬度(Width,W)長與長度(Length,L)長),並將電晶體121與電晶體122設為相同尺寸(W長與L長)。並且,電晶體111、電晶體112、電晶體121、電晶體122如圖1所示般以大致共形心(共重心)的方式配置於半導體裝置上。 即,電晶體111、電晶體112、電晶體121、電晶體122以點對稱的方式配置,從而實現了共形心(共重心)。
如上所述般配置的參考電壓電路100中,即便因樹脂封裝等的應力而電晶體的特性於x軸方向或y軸方向發生變化,電晶體110與電晶體120亦會受到相同的影響。從而,電晶體110與電晶體120產生相同的特性變動,因此具有可減小經變動的特性與期望的電壓電流特性的偏差的效果。
如以上所說明般,參考電壓電路100中,將電晶體110與電晶體120以大致共形心的方式配置於半導體裝置上,因此能夠提供一種具有規避由半導體裝置的樹脂密封等的應力帶來的特性變動的影響,並且產品差異少的參考電壓電路的半導體裝置。
圖2是表示第一實施形態的參考電壓電路的另一例的說明圖。 參考電壓電路200分別藉由三個電晶體來構成空乏型的電晶體210及增強型的電晶體220。
電晶體210藉由串聯連接三個空乏型的電晶體211、212及213而構成。電晶體220藉由串聯連接三個電晶體221、222及223而構成。
此處,將各電晶體以與參考電壓電路100同樣的方式構成,並如圖2所示般以大致共形心(共重心)的方式配置於半導體裝置上。如此構成的參考電壓電路200亦可獲得同樣的效果。
而且,參考電壓電路200亦可如圖3所示般以大致共形心(共重心)的方式配置於半導體裝置上。即,藉由將電晶體211、電晶體212、電晶體223與電晶體213、電晶體221、電晶體222以線對稱的方式配置而實現了共形心(共重心)。
圖4是表示第一實施形態的參考電壓電路的另一例的說明圖。 參考電壓電路400分別藉由兩個電晶體來構成空乏型的電晶體410及增強型的電晶體420。
電晶體410藉由並聯連接兩個空乏型的電晶體411、412而構成。電晶體420藉由並聯連接兩個電晶體421、422而構成。
參考電壓電路400與圖1的參考電壓電路100同樣地,以大致共形心(共重心)的方式配置於半導體裝置上。如此構成的參考電壓電路400亦可獲得同樣的效果。
另外,參考電壓電路400中,以並聯連接兩個電晶體的方式來構成了各電晶體,但亦可並聯連接兩個以上,並將它們以大致共形心(共重心)的方式配置於半導體裝置上。
圖5是表示第一實施形態的參考電壓電路的另一例的說明圖。 參考電壓電路500包括:空乏型的電晶體110、增強型的電晶體120以及輸出參考電壓VREF的端子130。電晶體120藉由串聯連接兩個電晶體121及122而構成。
圖1的參考電壓電路100中,以串聯連接兩個空乏型的電晶體111及112的方式來構成了空乏型的電晶體110,但即便如圖5所示般藉由一個電晶體來構成,亦能夠以大致共形心(共重心)的方式配置於半導體裝置上。
另外,於圖5的參考電壓電路500中,對空乏型的電晶體110包括一個電晶體的示例進行了說明,亦可藉由一個電晶體來構成增強型的電晶體120。
以上所說明的第一實施形態的參考電壓電路是藉由一個至三個電晶體來構成了各電晶體,但亦可串聯或並聯連接三個以上,並將它們以大致共形心(共重心)的方式配置於半導體裝置上。
圖6是表示本發明的第二實施形態的參考電壓電路的說明圖。 參考電壓電路600包括:空乏型的電晶體610、增強型的電晶體620以及構成電流反射鏡電路的電晶體640及電晶體650。參考電壓電路600是藉由利用電流反射鏡電路將電晶體610與電晶體620結合而構成,基本的動作與第一實施形態的參考電壓電路相同。參考電壓電路600與第一實施形態的參考電壓電路同樣地藉由多個電晶體而構成。
電晶體610藉由串聯連接兩個空乏型的電晶體611及612而構成。電晶體620藉由串聯連接兩個電晶體621及622而構成。電晶體640藉由串聯連接兩個電晶體641及642而構成。電晶體650藉由串聯連接兩個電晶體651及652而構成。
各電晶體與第一實施形態的參考電壓電路同樣地構成。並且,例如與參考電壓電路100同樣地將電晶體610與電晶體620以大致共形心(共重心)的方式配置於半導體裝置上,並將電晶體640與電晶體650以大致共形心(共重心)的方式配置於半導體裝置上。如此構成的參考電壓電路600亦可獲得同樣的效果。
另外,第二實施形態的參考電壓電路600是藉由兩個電晶體來構成了各電晶體,但亦可與第一實施形態同樣地,串聯或並聯連接兩個以上,並將它們以大致共形心(共重心)的方式配置於半導體裝置上。
100、200、400、500、600、700‧‧‧參考電壓電路
110、111、112、120、121、122、210、211、212、213、220、221、222、223、410、411、412、420、421、422、610、620、621、622、611、612、640、641、642、650、651、652、710、720‧‧‧電晶體
130、730‧‧‧端子
801、802‧‧‧特性
VDD‧‧‧電源電壓
VSS‧‧‧接地電壓
VREF‧‧‧參考電壓
VTND、VTNE‧‧‧臨限值電壓
圖1是表示本發明的第一實施形態的參考電壓電路的說明圖。 圖2是表示第一實施形態的參考電壓電路的另一例的說明圖。 圖3是表示第一實施形態的參考電壓電路的另一例的說明圖。 圖4是表示第一實施形態的參考電壓電路的另一例的說明圖。 圖5是表示第一實施形態的參考電壓電路的另一例的說明圖。 圖6是表示本發明的第二實施形態的參考電壓電路的說明圖。 圖7是表示一般的參考電壓電路的電路圖。 圖8是圖7的參考電壓電路的動作說明圖。
Claims (10)
- 一種參考電壓電路,包括作為電流源的空乏型電晶體及作為負載的增強型電晶體,所述參考電壓電路的特徵在於: 所述空乏型電晶體或/及所述增強型電晶體是藉由多個電晶體而構成, 所述空乏型電晶體與所述增強型電晶體以共形心(共重心)的方式配置。
- 如申請專利範圍第1項所述的參考電壓電路,其中,所述空乏型電晶體與所述增強型電晶體以點對稱的方式配置。
- 如申請專利範圍第1項所述的參考電壓電路,其中,所述空乏型電晶體與所述增強型電晶體以線對稱的方式配置。
- 如申請專利範圍第1項所述的參考電壓電路,其中,所述空乏型電晶體與所述增強型電晶體經由電流反射鏡電路而連接。
- 如申請專利範圍第2項所述的參考電壓電路,其中,所述空乏型電晶體與所述增強型電晶體經由電流反射鏡電路而連接。
- 如申請專利範圍第3項所述的參考電壓電路,其中,所述空乏型電晶體與所述增強型電晶體經由電流反射鏡電路而連接。
- 如申請專利範圍第4項所述的參考電壓電路,其中, 構成所述電流反射鏡電路的電晶體是藉由多個電晶體而構成, 所述多個電晶體是以共形心(共重心)的方式配置。
- 如申請專利範圍第5項所述的參考電壓電路,其中, 構成所述電流反射鏡電路的電晶體是藉由多個電晶體而構成, 所述多個電晶體是以共形心(共重心)的方式配置。
- 如申請專利範圍第6項所述的參考電壓電路,其中, 構成所述電流反射鏡電路的電晶體是藉由多個電晶體而構成, 所述多個電晶體是以共形心(共重心)的方式配置。
- 一種半導體裝置,具有如申請專利範圍第1項至第9項中任一項所述的參考電壓電路。
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2017-109043 | 2017-06-01 | ||
JP2017109043 | 2017-06-01 | ||
JP2018060317A JP7075172B2 (ja) | 2017-06-01 | 2018-03-27 | 基準電圧回路及び半導体装置 |
JP2018-060317 | 2018-03-27 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW201911533A true TW201911533A (zh) | 2019-03-16 |
TWI751335B TWI751335B (zh) | 2022-01-01 |
Family
ID=64458282
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW107116355A TWI751335B (zh) | 2017-06-01 | 2018-05-15 | 參考電壓電路以及半導體裝置 |
Country Status (3)
Country | Link |
---|---|
KR (1) | KR102430853B1 (zh) |
CN (1) | CN108983857A (zh) |
TW (1) | TWI751335B (zh) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102130322B1 (ko) * | 2019-01-03 | 2020-07-06 | 청주대학교 산학협력단 | 박막 트랜지스터 논리회로 및 그 제조방법 |
JP2020177393A (ja) * | 2019-04-17 | 2020-10-29 | エイブリック株式会社 | 定電流回路及び半導体装置 |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2034937B (en) * | 1978-11-14 | 1983-01-06 | Philips Electronic Associated | Regulated power supply |
US6005378A (en) * | 1998-03-05 | 1999-12-21 | Impala Linear Corporation | Compact low dropout voltage regulator using enhancement and depletion mode MOS transistors |
JP3523521B2 (ja) * | 1998-04-09 | 2004-04-26 | 松下電器産業株式会社 | Mosトランジスタ対装置 |
US6265857B1 (en) * | 1998-12-22 | 2001-07-24 | International Business Machines Corporation | Constant current source circuit with variable temperature compensation |
US6552603B2 (en) * | 2000-06-23 | 2003-04-22 | Ricoh Company Ltd. | Voltage reference generation circuit and power source incorporating such circuit |
CN100543999C (zh) * | 2000-09-01 | 2009-09-23 | 精工电子有限公司 | Cmos半导体器件及其制造方法 |
JP4397211B2 (ja) * | 2003-10-06 | 2010-01-13 | 株式会社リコー | 基準電圧発生回路及びそれを用いた電源装置 |
JP2008004796A (ja) * | 2006-06-23 | 2008-01-10 | Matsushita Electric Ind Co Ltd | 半導体装置および回路素子レイアウト方法 |
JP5157289B2 (ja) * | 2007-07-11 | 2013-03-06 | ミツミ電機株式会社 | Mosトランジスタ及びこれを用いたmosトランジスタ回路 |
CN100492245C (zh) * | 2007-07-11 | 2009-05-27 | 中国电子科技集团公司第二十四研究所 | 一种高电源抑制比的nmos基准电压源 |
KR101465598B1 (ko) * | 2008-06-05 | 2014-12-15 | 삼성전자주식회사 | 기준 전압 발생 장치 및 방법 |
JP5511166B2 (ja) * | 2008-09-10 | 2014-06-04 | セイコーインスツル株式会社 | 半導体装置 |
US7772920B1 (en) * | 2009-05-29 | 2010-08-10 | Linear Technology Corporation | Low thermal hysteresis bandgap voltage reference |
EP2446337A4 (en) | 2009-06-26 | 2016-05-25 | Univ Michigan | REFERENCE VOLTAGE GENERATOR HAVING A TWO-TRANSISTOR DESIGN |
JP2014187082A (ja) * | 2013-03-22 | 2014-10-02 | Hitachi Ltd | 半導体装置 |
CN104181971B (zh) * | 2013-05-24 | 2015-11-25 | 比亚迪股份有限公司 | 一种基准电压源 |
JP6193771B2 (ja) * | 2014-01-28 | 2017-09-06 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US9960620B2 (en) * | 2014-09-16 | 2018-05-01 | Navitas Semiconductor, Inc. | Bootstrap capacitor charging circuit for GaN devices |
-
2018
- 2018-05-15 TW TW107116355A patent/TWI751335B/zh active
- 2018-05-30 KR KR1020180061873A patent/KR102430853B1/ko active IP Right Grant
- 2018-05-30 CN CN201810535941.3A patent/CN108983857A/zh active Pending
Also Published As
Publication number | Publication date |
---|---|
TWI751335B (zh) | 2022-01-01 |
KR20180131980A (ko) | 2018-12-11 |
KR102430853B1 (ko) | 2022-08-09 |
CN108983857A (zh) | 2018-12-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW201911533A (zh) | 參考電壓電路以及半導體裝置 | |
JP2007005509A (ja) | 半導体集積回路装置及びこれを用いたレギュレータ | |
CN106887425A (zh) | 用于电熔丝的静电放电保护结构 | |
JP7007564B2 (ja) | レギュレータ用半導体集積回路 | |
JP7075172B2 (ja) | 基準電圧回路及び半導体装置 | |
US20090323236A1 (en) | Semiconductor device | |
TWI358894B (zh) | ||
JP2012195454A (ja) | 半導体装置 | |
US9852830B2 (en) | Apparatus and methods for generating a precise resistor | |
TW201706749A (zh) | 溫度補償電路 | |
US9418960B2 (en) | Semiconductor chip and semiconductor package | |
US10205031B2 (en) | Semiconductor device having resistance voltage dividing circuit | |
US10217717B2 (en) | Distribution of electronic circuit power supply potentials | |
JP2017055033A (ja) | 半導体装置、半導体チップ及び半導体装置の製造方法 | |
JPH03234063A (ja) | 半導体集積回路 | |
US9524961B2 (en) | Semiconductor device | |
TW201913887A (zh) | 積體電路結構 | |
TW201806125A (zh) | 半導體裝置 | |
TWI622155B (zh) | 靜電保護電路 | |
JP2020177393A (ja) | 定電流回路及び半導体装置 | |
JP2020088173A (ja) | 集積回路及びそれを備えた電子回路 | |
JP2007324291A (ja) | 半導体集積装置 | |
KR20040008495A (ko) | 집적회로의 지연장치 | |
JP2013172091A (ja) | 保護回路 | |
JP2014145676A (ja) | センサ回路 |