TW201903195A - 使用沉積-處理-蝕刻製程之矽的選擇性沉積 - Google Patents

使用沉積-處理-蝕刻製程之矽的選擇性沉積 Download PDF

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TW201903195A
TW201903195A TW107119106A TW107119106A TW201903195A TW 201903195 A TW201903195 A TW 201903195A TW 107119106 A TW107119106 A TW 107119106A TW 107119106 A TW107119106 A TW 107119106A TW 201903195 A TW201903195 A TW 201903195A
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plasma
film
silicon
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程睿
非 王
亞伯希吉特巴蘇 馬禮克
羅伯特詹 維瑟爾
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美商應用材料股份有限公司
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Abstract

說明一種用於在基板上選擇性沉積矽薄膜之方法,基板包含第一表面及第二表面。更具體而言,說明沉積薄膜、處理薄膜以改變某些薄膜特性及從基板的各種表面選擇性蝕刻薄膜的製程。可重複沉積、處理及蝕刻以在兩個基板表面之一者上選擇性沉積薄膜。

Description

使用沉積-處理-蝕刻製程之矽的選擇性沉積
本揭露案大致關於選擇性沉積矽薄膜之方法。具體而言,本揭露案關於以多重階段沉積-處理-蝕刻製程選擇性沉積矽層之製程。
藉由氣體的化學反應在基板上形成薄膜為现代半導體裝置之製作中的一個主要步驟。此等沉積製程包括化學氣相沉積(CVD)以及與傳統CVD技術的電漿連結使用的電漿強化化學氣相沉積(PECVD)。
因為對半導體圖案化應用之需求而更頻繁地利用選擇性沉積製程。傳統上,在微電子工業中的圖案化已使用各種光刻及蝕刻製程來完成。然而,因為光刻變得加倍複雜且昂貴,選擇性沉積之使用以沉積特徵變得更加具有吸引力。
隨著裝置尺寸持續減少至小於10nm的範圍,使用光照光刻技術的傳統圖案化製程變得更具挑戰性。非精確的圖案化及降級的裝置效能在較低裝置尺寸處更加突顯。此外,多重圖案化技術亦使得製作製程複雜化且更昂貴。
因次,本領域需要一種在一個表面而非不同表面上選擇性沉積薄膜之方法。
本揭露案的一或更多實施例導向一種選擇性沉積薄膜之方法,其中包括提供具有第一表面及第二表面的基板。將基板暴露至矽烷及沉積電漿,以在第一表面及第二表面上沉積矽薄膜,矽薄膜在第一表面上及第二表面上具有不同的特性。將矽薄膜暴露至處理電漿,以在第一表面或第二表面之一或更多者上修改矽薄膜的結構、組成物或型態,處理電漿包含Ar、He或H2 之一或更多者的電漿。從第一表面及第二表面蝕刻薄膜,以從第二表面實質上移除所有的薄膜,且在第一表面上留下至少某些矽薄膜。重複沉積、處理及蝕刻之步驟,以選擇性地在第一表面上而非在第二表面上形成薄膜。
本揭露案的額外實施例導向一種選擇性沉積薄膜之方法,其中包含提供基板,此基板具有基本上以矽組成的第一表面,及包含至少一個不同材料的第二表面。將基板暴露至SiH4 及氫電漿,以在第一表面及第二表面上沉積矽薄膜,矽薄膜在第一表面上及第二表面上具有不同的特性。將矽薄膜暴露至處理電漿,以在第一表面或第二表面之一或更多者上修改矽薄膜的結構、組成物或型態,處理電漿包含Ar、He或H2 之一或更多者的電漿。以熱蝕刻從第一表面及第二表面蝕刻薄膜,以從第二表面實質上移除所有的薄膜,且在第一表面上留下至少某些矽薄膜。重複沉積、處理及蝕刻之步驟,以選擇性地在第一表面上而非在第二表面上形成薄膜。
本揭露案的進一步實施例導向一種選擇性沉積薄膜之方法,其中包含提供基板,此基板具有基本上以矽組成的第一表面,及包含至少一個不同材料的第二表面。將基板暴露至SiH4 及氫電漿,以在第一表面及第二表面上沉積矽薄膜,矽薄膜在第一表面上及第二表面上具有不同的特性。將矽薄膜暴露至處理電漿,以在第一表面或第二表面之一或更多者上修改矽薄膜的結構、組成物或型態,處理電漿包含Ar、He或H2 之一或更多者的電漿。以電漿蝕刻從第一表面及第二表面蝕刻薄膜,以從第二表面實質上移除所有的薄膜,且在第一表面上留下至少某些矽薄膜。重複沉積、處理及蝕刻之步驟,以選擇性地在第一表面上而非在第二表面上形成薄膜。
在說明本發明之數個範例實施例之前,應理解本發明並非限於以下說明書中提及的構造或製程步驟之細節。本發明含括其他實施例且可以各種方式實施或執行。
如此處所使用的「基板」代表任何基板,或形成於基板上而在製造製程期間實行薄膜製程於其上的材料表面。舉例而言,取決於應用,製程可實行於其上的基板表面包括諸如矽、氧化矽、應變矽、絕緣體上矽(SOI)、碳摻雜的氧化矽、非晶型矽、摻雜矽、鍺、砷化鎵、玻璃、藍寶石,及諸如金屬、金屬氮化物、合金的任何其他材料,及其他導電材料。基板非限制性地包括半導體晶圓。基板可暴露至預處理製程,以拋光、蝕刻、還原、氧化、羥化、退火、UV固化、e束固化及/或烘烤基板表面。除了在基板本身的表面上直接進行薄膜製程之外,在本發明中,所揭露的薄膜製程之任何步驟亦可如以下更加詳細地揭露而實行在基板上所形成的下層上,且「基板表面」一詞意圖包括如上下文所指示的此下層。因此,舉例而言,當薄膜/層或部分的薄膜/層已沉積於基板表面上時,新沉積的薄膜/層之暴露的表面變成基板表面。
本揭露案的實施例提供在具有各種表面組成物的基板上選擇性沉積薄膜(例如,矽)之方法。某些實施例有利地提供可在集叢工具環境中實行而牽涉循環沉積-處理-蝕刻製程的方法。某些實施例有利地在矽表面而非其他表面上沉積矽薄膜。
在不會被操作之任何特定理論限制之下,相信材料(例如,Si)的晶核在不同表面上為不同的。因此,在薄膜上具有不同程度的結晶化之晶核將為不同的。此外,材料(例如,Si)的蝕刻率在不同表面上將為不同的。某些實施例有利地提供使用電漿而在某些表面上比其他表面上更快地蝕刻材料(例如,Si)的方法。某些實施例有利地在不同的表面上使用不同的蝕刻率,以藉由沉積-處理-蝕刻製程的循環來建立矽薄膜的選擇性沉積。
圖式根據本揭露案的一或更多實施例,顯示範例製程方法100。於110處,提供具有第一表面及第二表面之基板用於製程。如此處所使用,「提供」一詞代表放置基板至位置或環境中用於進一步的製程。第一表面及第二表面為不同的材料。舉例而言,一個表面可為矽且另一個表面為金屬。在某些實施例中,第一表面及第二表面具有相同的化學組成物,但具有不同的物理特性(例如,結晶度)。
第一表面可為任何適合的材料,例如但非限於金屬薄膜。在某些實施例中,第一表面為金屬的,包含矽、鎢、鈷、銅、釕、鈀、鉑、鎳、鉻、錳、鐵、鋯、鉬、鈮、銀、鉿、鉭或鑭系元素之一或更多者。在某些實施例中,第一表面基本上以矽組成。如此處所使用,「基本上之組成」代表按原子計表面為大於或等於約95%、98%或99%的矽。
第二表面可為不同於第一表面的任何適合的表面。在第一表面及第二表面之間的差異可基於薄膜組成物或薄膜的某些物理特性。在某些實施例中,第二表面包含金屬硼化物、金屬氧化物、金屬氮化物、金屬碳化物、金屬碳氧化物、金屬氧氮化物、金屬硼氧化物、金屬硼氮化物、金屬硼碳化物、金屬碳氮化物、金屬碳氮氧化物、金屬硼碳氮化物、金屬硼氮氧化物或此等之結合。在某些實施例中,第二表面包含具有低介電常數(k<5)或者高介電常數(k>=5)之任一者的介電材料。在某些實施例中,第二表面包含氧化矽、氮化矽之一或更多者。
在某些實施例中,第一表面包含金屬表面,且第二表面包含類似於第一表面之金屬而具有相較於第一表面不同的結晶度。在某些實施例中,第一表面及第二表面包含介電材料,而具有不同的結晶結構、密度及/或表面終止狀態。
儘管在圖式中製程的說明以具有包含矽的第一表面及包含氧化矽或氮化矽之一或更多者的第二表面之基板來呈現,本領域中技藝人士將理解此僅為一個可能配置的代表,且其他結合亦在本揭露案的範疇之中。於120處,基板暴露至矽烷及沉積電漿。為了本揭露案之目的,此暴露稱為沉積。在某些實施例中,矽烷包含具有通式為Sin H2n+2 的至少一物質。在某些實施例中,矽烷基本上以SiH4 組成。在某些實施例中,矽烷基本上以Si2 H6 組成。在某些實施例中,矽烷基本上以二氯矽烷組成,SiH2 Cl2 。如此處所使用,「基本上之組成」一詞代表以重量計矽烷為大於或等於約95%、98%或99%的所述物質。在某些實施例中,矽烷包含鹵化矽物質,其中鹵素原子包含Cl、Br及I之一或更多者。在某些實施例中,鹵化矽實質上不包含氟原子。如此處所使用,「實質上無氟原子」代表鹵素物質之組成物以原子計具有小於或等於約95%、98%或99%的氟。
在某些實施例中,沉積電漿包含Ar、He、H2 或N2 之一或更多者。在某些實施例中,沉積電漿基本上以Ar組成。在某些實施例中,沉積電漿基本上以He組成。在某些實施例中,沉積電漿基本上以H2 組成。在某些實施例中,沉積電漿基本上以N2 組成。如此處所使用,「基本上之組成」一詞代表以原子計沉積電漿為大於或等於約95%、98%或99%的所述物質。
沉積電漿可為傳導耦合電漿(CCP)或電感耦合電漿(ICP),且可為直接電漿或遠端電漿。在某些實施例中,沉積電漿具有在約0W至約2000W之範圍中的功率。在某些實施例中,最小電漿功率為大於0W、10W、50W或100W。
在沉積120期間的溫度取決於例如所使用的前驅物及/或沉積電漿,而可為任何適合的溫度。在某些實施例中,沉積溫度在約100ºC至500ºC之範圍中,或在約150ºC至約450ºC之範圍中,或在約200ºC至約400ºC之範圍中。
在沉積120期間的製程腔室壓力可在約100 mTorr至300 Torr之範圍中,或在約200 mTorr至約250 Torr之範圍中,或在約500 mTorr至約200 Torr之範圍中,或在約1 Torr至約150 Torr之範圍中。
如先前所述,在第一表面及第二表面上矽薄膜的晶核,可能受到於120處在第一表面及第二表面上暴露矽烷/電漿的結果,而影響沉積薄膜的厚度以及物理特性。在某些實施例中,沉積在第一表面及第二表面上矽薄膜的結晶度,在沉積之後為不同的。
所沉積的薄膜在移動至處理製程之前可為任何適合的厚度。在某些實施例中,於移動至處理製程之前,沉積的薄膜之厚度為大於或等於5 Å、10 Å、15 Å、20 Å或25 Å。在某些實施例中,於移動至處理製程之前,沉積的薄膜之厚度為小於或等於100 Å、90 Å、80 Å、70 Å、60 Å或50 Å。
在沉積之後,於130處,基板暴露至處理電漿,以修改第一表面及/或第二表面上矽薄膜的結構、組成物或型態。為了本揭露案之目的,此暴露稱為處理。
在某些實施例中,處理電漿包含Ar、He或H2 之一或更多者。在某些實施例中,處理電漿基本上以Ar組成。在某些實施例中,處理電漿基本上以He組成。在某些實施例中,處理電漿基本上以H2 組成。如此處所使用,「基本上之組成」一詞代表按原子計處理電漿為大於或等於約95%、98%或99%的所述物質。在某些實施例中,處理電漿為與沉積電漿相同。在某些實施例中,處理電漿不同於沉積電漿。
處理電漿可為傳導耦合電漿(CCP)或電感耦合電漿(ICP),且可為直接電漿或遠端電漿。在某些實施例中,電漿具有在約0W至約2000W之範圍中的功率。在某些實施例中,最小電漿功率為大於0W、10W、50W或100W。
在處理130期間的溫度取決於例如所使用的處理電漿,而可為任何適合的溫度。在某些實施例中,處理溫度在約100ºC至500ºC之範圍中,或在約150ºC至約450ºC之範圍中,或在約200ºC至約400ºC之範圍中。
在處理130期間的製程腔室壓力可在約100 mTorr至300 Torr之範圍中,或在約200 mTorr至約250 Torr之範圍中,或在約500 mTorr至約200 Torr之範圍中,或在約1 Torr至約150 Torr之範圍中。
如先前所述,受到於130處的處理電漿暴露之結果,在第一表面及第二表面上矽薄膜的結構、組成物或型態將為不同的。在某些實施例中,於處理之後第一表面及第二表面上矽薄膜的結晶度為不同的。在某些實施例中,於處理之前第一表面及第二表面上矽薄膜的結晶度為不同的,且在處理之後結晶度的差異比在處理之前更大。
在處理之後,於140處蝕刻基板,以從第二表面實質上移除所有的矽薄膜,且在第一表面上留下至少某些矽薄膜。如此處所使用,「實質上所有的」一詞代表已從第二表面移除足夠的薄膜,以提供晶核延遲用於後續的沉積製程。在某些實施例中,從第二表面移除實質上所有的薄膜代表至少約95%、98%或99%的薄膜已從第二表面蝕刻或移除。
在某些實施例中,薄膜以熱蝕刻製程來蝕刻。為了本揭露案之目的,熱蝕刻製程可利用蝕刻劑作為熱蝕刻製程中的反應物。在某些實施例中,熱蝕刻製程以包含H2 的蝕刻劑來實行。在某些實施例中,於熱蝕刻製程期間將惰性氣體與蝕刻劑一起流動。
在某些實施例中,薄膜以電漿蝕刻製程來蝕刻。為了本揭露案之目的,在電漿蝕刻製程中所利用的電漿稱為蝕刻電漿。在某些實施例中,蝕刻電漿包含H2 、HCl、Cl2 或NF3 之一或更多者。在某些實施例中,蝕刻電漿基本上以H2 組成。在某些實施例中,蝕刻電漿基本上以HCl組成。在某些實施例中,蝕刻電漿基本上以Cl2 組成。在某些實施例中,蝕刻電漿基本上以NF3 組成。如此處所使用,「基本上之組成」一詞代表按原子計蝕刻電漿為大於或等於約95%、98%或99%的所述物質。在某些實施例中,於電漿蝕刻製程期間將惰性氣體與蝕刻電漿一起流動。
蝕刻電漿可為傳導耦合電漿(CCP)或電感耦合電漿(ICP),且可為直接電漿或遠端電漿。在某些實施例中,電漿具有在約0W至約2000W之範圍中的功率。在某些實施例中,最小電漿功率為大於0W、10W、50W或100W。
在蝕刻130期間的溫度取決於例如所使用的蝕刻製程、蝕刻劑及/或蝕刻電漿,而可為任何適合的溫度。在某些實施例中,蝕刻溫度在約100ºC至500ºC之範圍中,或在約150ºC至約450ºC之範圍中,或在約200ºC至約400ºC之範圍中。
在蝕刻140期間的製程腔室壓力可在約100 mTorr至300 Torr之範圍中,或在約200 mTorr至約250 Torr之範圍中,或在約500 mTorr至約200 Torr之範圍中,或在約1 Torr至約150 Torr之範圍中。
在蝕刻之後,方法100到達抉擇點150。若矽薄膜已達到第一層上的預定厚度,則基板可選地繼續實行160處的進一步後期製程。若矽薄膜並未達到第一層上的預定厚度,則方法返回至120用於「沉積」-「處理」-「蝕刻」之額外的至少一個循環。
某些實施例包括可選的後期製程160之製程。後期製程160可用以修改沉積的薄膜或基板,以改良薄膜或基板的某些參數。在某些實施例中,後期製程160包含對薄膜進行退火。在某些實施例中,後期製程160可藉由在用以沉積120、處理130及/或蝕刻140之相同的製程腔室中原位退火來實行。適合的退火製程包括但非限於快速熱製程(RTP)或快速熱退火(RTA)、尖峰式退火、或UV固化、或e束固化及/或雷射退火。退火的溫度可在約500ºC至900ºC的範圍中。退火期間環境的組成物可包括H2 、Ar、He、N2 、NH3 、SiH4 等等之一或更多者。退火期間的壓力可在約100 mTorr至約1 atm之範圍中。
於本揭露案所述之方法的任何時點期間,可加熱或冷卻基板。此等加熱或冷卻可藉由任何適合的手段完成,包括但非限於改變基板支撐件的溫度及將加熱的或冷卻的氣體流至基板表面。在某些實施例中,基板支撐件包括可經控制的加熱器/冷卻器以用傳導改變基板溫度。在一或更多實施例中,所利用的氣體(反應器體或者惰性氣體任一者)經加熱或冷卻以局部地改變基板溫度。在某些實施例中,加熱器/冷卻器定位於腔室之中鄰接基板表面,以用對流改變基板溫度。
在製程期間基板亦可為固定或旋轉的。旋轉基板可為連續地旋轉或在分散的步驟中旋轉。舉例而言,基板可在整個製程中旋轉,或基板可在暴露至不同的反應氣體、清洗氣體、反應物或電漿之間小量旋轉。在製程期間(連續性或者在步驟中)旋轉基板可藉由最小化例如氣體流動幾何中局部變化的效應,而幫助產生更均勻的沉積、處理或蝕刻。
此說明書全篇所述之「一個實施例」、「某些實施例」、「一或更多實施例」或「一實施例」代表與實施例連結說明的特徵、結構、材料或特性包括在本發明的至少一個實施例中。因此,在此處整篇說明書中各處諸如「在一或更多實施例中」、「在某些實施例中」、「在一個實施例中」或「在一實施例中」的詞彙的存在並非必須代表本發明的相同實施例。再者,特定特徵、結構、材料或特性可以任何適合的方式結合於一或更多實施例中。
儘管此處已參考特定實施例說明本發明,應理解此等實施例僅為原理的說明及本發明的應用。對本領域中技藝人士而言,可對本發明之方法及裝置作成各種修改及改變,而不會悖離本發明的精神及範疇。因此,本發明意圖包括在隨附申請專利範圍之範疇之中的修改及改變,及其均等。
100‧‧‧方法
110-160‧‧‧步驟
以上所載本發明之特徵,如以上簡要地概述,而本發明之更特定說明可更詳細地參考實施例來理解,其中某些實施例圖示於隨附圖式中。然而,應理解隨附圖式僅圖示本發明的通常實施例,且因此不應考量為對其範疇之限制,因為本發明認可其他均等效果的實施例。
圖式根據本揭露案的一或更多實施例,顯示製程流程圖。
國內寄存資訊 (請依寄存機構、日期、號碼順序註記) 無
國外寄存資訊 (請依寄存國家、機構、日期、號碼順序註記) 無

Claims (20)

  1. 一種選擇性沉積一薄膜之方法,該方法包含以下步驟: 提供一基板,該基板具有一第一表面及一第二表面;將該基板暴露至一矽烷及一沉積電漿,以在該第一表面及該第二表面上沉積一矽薄膜,該矽薄膜在該第一表面上及該第二表面上具有不同的特性;將該矽薄膜暴露至一處理電漿,以在該第一表面或該第二表面之一或更多者上修改該矽薄膜的一結構、組成物或型態,該處理電漿包含Ar、He或H2 之一或更多者的電漿;從該第一表面及該第二表面蝕刻該薄膜,以從該第二表面實質上移除所有的該薄膜,且在該第一表面上留下至少某些該矽薄膜;及重複該等沉積、處理及蝕刻之步驟,以選擇性地在該第一表面上而非在該第二表面上形成一薄膜。
  2. 如請求項1所述之方法,其中該基板的該第一表面基本上以矽組成。
  3. 如請求項1所述之方法,其中該基板之該第二表面包含氧化矽、氮化矽、玻璃或一金屬之一或更多者。
  4. 如請求項1所述之方法,其中該矽烷包含具有Sin H2n+2 之通式的一物質。
  5. 如請求項3所述之方法,其中該矽烷基本上以SiH4 組成。
  6. 如請求項3所述之方法,其中該矽烷基本上以Si2 H6 組成。
  7. 如請求項1所述之方法,其中該矽烷基本上以SiH2 Cl2 (二氯矽烷或DCS)組成。
  8. 如請求項1所述之方法,其中該沉積電漿包含Ar、He、H2 或N2 之一或更多者。
  9. 如請求項1所述之方法,其中在沉積之後,該矽薄膜的結晶度在該第一表面上及該第二表面上為不同的。
  10. 如請求項1所述之方法,其中該處理電漿基本上以一電容耦合電漿組成。
  11. 如請求項1所述之方法,其中該處理電漿基本上以一電感耦合電漿組成。
  12. 如請求項1所述之方法,其中在處理之後,該沉積的矽薄膜的結晶度在該第一表面上及該第二表面上為不同的。
  13. 如請求項1所述之方法,其中該薄膜使用一熱蝕刻製程來蝕刻。
  14. 如請求項1所述之方法,其中該薄膜使用一電漿蝕刻製程來蝕刻。
  15. 如請求項14所述之方法,其中該電漿蝕刻製程利用一電容耦合電漿。
  16. 如請求項14所述之方法,其中該電漿蝕刻製程利用一電感耦合電漿。
  17. 如請求項14所述之方法,其中該薄膜藉由一電漿蝕刻,該電漿包含H2 、HCl、Cl2 或NF3
  18. 如請求項14所述之方法,其中該薄膜藉由一電漿蝕刻,該電漿基本上以氫組成。
  19. 一種選擇性沉積一薄膜之方法,該方法包含以下步驟: 提供一基板,該基板具有基本上以矽組成的一第一表面,及包含至少一個不同材料的一第二表面;將該基板暴露至SiH4 及一氫電漿,以在該第一表面及該第二表面上沉積一矽薄膜,該矽薄膜在該第一表面上及該第二表面上具有不同的特性;將該矽薄膜暴露至一處理電漿,以在該第一表面或該第二表面之一或更多者上修改該矽薄膜的一結構、組成物或型態,該處理電漿包含Ar、He或H2 之一或更多者的電漿;以一熱蝕刻從該第一表面及該第二表面蝕刻該薄膜,以從該第二表面實質上移除所有的該薄膜,且在該第一表面上留下至少某些該矽薄膜;及重複該等沉積、處理及蝕刻之步驟,以選擇性地在該第一表面上而非在該第二表面上形成一薄膜。
  20. 一種選擇性沉積一薄膜之方法,該方法包含以下步驟: 提供一基板,該基板具有基本上以矽組成的一第一表面,及包含至少一個不同材料的一第二表面;將該基板暴露至SiH4 及一氫電漿,以在該第一表面及該第二表面上沉積一矽薄膜,該矽薄膜在該第一表面上及該第二表面上具有不同的特性;將該矽薄膜暴露至一處理電漿,以在該第一表面或該第二表面之一或更多者上修改該矽薄膜的一結構、組成物或型態,該處理電漿包含Ar、He或H2 之一或更多者的電漿;以一電漿蝕刻從該第一表面及該第二表面蝕刻該薄膜,以從該第二表面實質上移除所有的該薄膜,且在該第一表面上留下至少某些該矽薄膜;及重複該等沉積、處理及蝕刻之步驟,以選擇性地在該第一表面上而非在該第二表面上形成一薄膜。
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Publication number Priority date Publication date Assignee Title
US5242530A (en) * 1991-08-05 1993-09-07 International Business Machines Corporation Pulsed gas plasma-enhanced chemical vapor deposition of silicon
US5470768A (en) * 1992-08-07 1995-11-28 Fujitsu Limited Method for fabricating a thin-film transistor
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US7081414B2 (en) * 2003-05-23 2006-07-25 Applied Materials, Inc. Deposition-selective etch-deposition process for dielectric film gapfill
US7682940B2 (en) * 2004-12-01 2010-03-23 Applied Materials, Inc. Use of Cl2 and/or HCl during silicon epitaxial film formation
US7312128B2 (en) 2004-12-01 2007-12-25 Applied Materials, Inc. Selective epitaxy process with alternating gas supply
US20080026149A1 (en) 2006-05-31 2008-01-31 Asm America, Inc. Methods and systems for selectively depositing si-containing films using chloropolysilanes
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US10011920B2 (en) 2011-02-23 2018-07-03 International Business Machines Corporation Low-temperature selective epitaxial growth of silicon for device integration
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US9153482B2 (en) * 2014-02-03 2015-10-06 Lam Research Corporation Methods and apparatus for selective deposition of cobalt in semiconductor processing
US9466494B2 (en) 2014-11-18 2016-10-11 Taiwan Semiconductor Manufacturing Company, Ltd. Selective growth for high-aspect ration metal fill
US9502238B2 (en) 2015-04-03 2016-11-22 Lam Research Corporation Deposition of conformal films by atomic layer deposition and atomic layer etch

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