TW202240004A - 高通量沈積方法 - Google Patents

高通量沈積方法 Download PDF

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TW202240004A
TW202240004A TW111103081A TW111103081A TW202240004A TW 202240004 A TW202240004 A TW 202240004A TW 111103081 A TW111103081 A TW 111103081A TW 111103081 A TW111103081 A TW 111103081A TW 202240004 A TW202240004 A TW 202240004A
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hydrogen
alkyl
plasma
films
film
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世輝 陳
艾瑞克 康杜
大衛 庫柏
湯瑪士 Ｈ 邦姆
蘇珊 Ｖ 迪莫
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美商恩特葛瑞斯股份有限公司
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Abstract

本發明提供PEALD方法以沈積耐蝕刻SiOCN膜。該等膜提供經改良生長速率、經改良階梯覆蓋率及對濕式蝕刻劑及含O 2共反應物之沈積後電漿處理之優良蝕刻抗性。在一個實施例中，此PEALD方法依賴於單一前體，即雙(二烷基胺基)四烷基二矽氧烷，連同氫電漿一起來沈積該等耐蝕刻SiOCN薄膜。由於該膜可利用單一前體沈積，因此整個方法展現經改良之通量。

Description

高通量沈積方法
一般而言，本發明係關於在微電子裝置表面上沈積氧碳氮化矽(SiOCN)之薄膜之材料及方法。該等膜用作具有優良濕式及乾式蝕刻抗性及灰化抗性之低介電常數絕緣體。
氮化矽(SiN)由於其高濕式蝕刻及氧(O 2)灰化抗性，已用於鰭式場效電晶體(FinFET)及全環繞閘極(GAA)結構之源極及汲極間隔件(S/D間隔件)。不幸地，SiN具有約7.5之高介電常數(k)。已開發碳及氮摻雜之二氧化矽(SiO 2) SiOCN間隔件以降低介電常數並維持優良蝕刻及灰化抗性。目前，最佳耐蝕刻及灰化之SiOCN介電質具有約4.0之k值。下一代裝置需要k值＜ 3.5之耐蝕刻及灰化之介電質。
另外，在微電子裝置之製造中，特定地在利用低溫氣相沈積技術以形成SiOCN膜之方法中，仍需要經改良有機矽前體以形成含矽膜。具體而言，需要具有良好熱穩定性、高揮發性及與基板表面之反應性之液體矽前體。
提高裝置性能需要新材料以增强隔離電晶體及互連電路之能力。該等膜通常需要低介電常數性質(即，＜4)，同時亦需要承受裝置製造期間之後續處理步驟，包括濕式蝕刻及乾式蝕刻抗性。此外，所沈積絕緣體在暴露於沈積後處理時不得發生變化。當該等膜在前道(front-end-of-line)中沈積時，膜必須保形地塗覆3D結構，如在FinFET裝置中所見，同時在整個結構上展示均勻介電性質。由於膜保留在裝置中，因此電性能不能隨沈積後處理發生變化。基於電漿之沈積方法通常產生具有不均勻電性質之膜，其中膜之頂部因電漿增强之轟擊而改變。同時，塗覆有相同膜之3D結構之側壁可由於沈積期間减少之電子轟擊而展現不同性質。儘管如此，膜必須在氧化或還原環境中承受濕式蝕刻及/或電漿後處理。
本發明提供電漿增强之原子層沈積(PEALD)方法以沈積耐蝕刻SiOCN膜。該等膜提供經改良之生長速率、經改良之階梯覆蓋率及對濕式蝕刻劑及含有O 2共反應物之沈積後電漿處理之經改良蝕刻抗性。此PEALD方法依賴於單一前體(例如，雙(二烷基胺基)四烷基二矽氧烷)連同氫電漿一起來沈積耐蝕刻SiOCN薄膜。由於膜可利用單一前體沈積，因此整個製程展現經改良之通量。膜在沈積之後及在沈積後電漿處理之後均顯示對利用稀氫氟酸(HF)水溶液濕式蝕刻之抗性。因此，該等膜預期對裝置製造及構建期間所利用之沈積後製造步驟顯示優良穩定性。(參照圖2及3)。
在第一態樣中，本發明提供將SiOCN膜氣相沈積於微電子裝置表面上之方法，其包含將選自以下各項之反應物引入至該反應區中： a. 至少一種下式之化合物
Figure 02_image003
； 其中每一R 1獨立選自氫及C 1-C 4烷基，每一R 2獨立選自氫及C 1-C 4烷基；且每一R 3選自氫及C 1-C 4烷基，條件係當R 3係氫時，R 1係C 1-C 4烷基；及 b. 呈電漿形式之還原氣體或氧化氣體，其中在將膜暴露於下一反應物之前吹掃每一反應物。
除非上下文另外明確指明，否則如本說明書及隨附申請專利範圍中所用，單數形式「一(a, an)」及「該」包括複數個指示物。除非上下文另外明確指明，否則如本說明書及隨附申請專利範圍中所用，術語「或」通常以其包括「及/或」之含義使用。
術語「約」通常係指認為與所列舉值等效(例如，具有相同功能或結果)之數字範圍。在許多情况中，術語「約」可包括被取整成最接近的有效數字之數值。
使用端點列舉之數值範圍包括歸入該範圍內之所有數值(例如，1至5包括1、1.5、2、2.75、3、3.80、4及5)。
在第一態樣中，本發明提供在反應區中將SiOCN膜氣相沈積於微電子裝置表面上之方法，其包含將選自以下各項之反應物引入至該反應區中： a. 至少一種下式之化合物
Figure 02_image004
； 其中每一R 1獨立選自氫及C 1-C 4烷基，每一R 2獨立選自氫及C 1-C 4烷基；且每一R 3選自氫及C 1-C 4烷基，條件係當R 3係氫時，R 1係C 1-C 4烷基；及 b. 呈電漿形式之還原氣體或氧化氣體，其中在將膜暴露於下一反應物之前吹掃每一反應物。
在以上方法步驟中，a.及b.代表包含一個循環之脈衝序列；可重複此循環直至所沈積膜達到期望厚度。
在此方法中，式(I)化合物包括彼等其中以下者：R 1選自氫、甲基、乙基、丙基、異丙基、正丁基、異丁基、第二丁基及第三丁基，R 2選自氫、甲基、乙基、丙基、異丙基、正丁基、異丁基、第二丁基及第三丁基，且R 3選自氫、甲基、乙基、丙基、異丙基、正丁基、異丁基、第二丁基及第三丁基。在此方法中，當R 3係氫時，R 1係C 1-C 4烷基。在一個實施例中，每一R 1及每一R 3係乙基且每一R 2係甲基，即，下式之化合物：
Figure 02_image005
。
如本文所用，術語「SiOCN」膜係指含有不同比例之矽、氧、碳及氮之膜。在一個實施例中，本發明提供具有大約以下各項之膜 (i) 30至50原子百分比之矽； (ii) 5至30原子百分比之氮； (iii) 2至25原子百分比之碳；及 (iv) 20至40原子百分比之氧。
在另一實施例中，本發明提供具有大約以下各項之膜 (i) 25至45原子百分比之矽； (ii) 10至25原子百分比之氮； (iii) 5至20原子百分比之碳；及 (iv) 25至35原子百分比之氧。
在某些實施例中，本發明之SiOCN膜具有約15至約20原子百分比之氮，且在其他實施例中約8至約18原子百分比之碳。
一般而言，式(I)化合物可藉由利用一級或二級胺處理相應鹵基二矽氧烷來製備。
上述化合物可藉由任何適宜ALD技術及脈衝電漿方法用於形成高純度含矽薄膜。可利用該等氣相沈積方法以藉由利用約200℃至約550℃之沈積溫度在微電子裝置上形成含矽膜，以形成厚度為約20埃至約200埃之膜。
在本發明之方法中，式(I)化合物可以任何適宜方式與期望微電子裝置基板反應，例如在單一晶圓腔室或在含有多個晶圓之爐中。
另一選擇為，本發明之方法可作為類似ALD之方法實施。如本文所用，術語「ALD或類似ALD」係指以下方法：其中將每一反應物依序引入反應器中，例如，單一晶圓ALD反應器、半間歇式ALD反應器或間歇式ALD反應器，或藉由將基板移動或旋轉至反應器之不同區段使每一反應物暴露於基板或微電子裝置表面且每一區段由惰性氣體簾隔開，即，空間ALD反應器或卷對卷ALD反應器。
在一個實施例中，本發明係關於使用式(I)化合物連同呈電漿形式之還原氣體一起用於沈積SiOCN膜之PEALD。氮電漿可用於形成具有較高氮原子百分比之膜，同時如本文所教示利用式(I)化合物及呈電漿形式之還原氣體。因此，在另一態樣中，本發明提供在反應區中將SiOCN膜氣相沈積於微電子裝置表面上之方法，其包含將選自以下各項之反應物依序引入至該反應區中： a. 至少一種下式之化合物
Figure 02_image007
； 其中每一R 1獨立選自氫及C 1-C 4烷基，每一R 2獨立選自氫及C 1-C 4烷基；且每一R 3選自氫及C 1-C 4烷基，條件係當R 3係氫時，R 1為C 1-C 4烷基；及 b. 呈電漿形式之還原氣體，其中在將膜暴露於下一反應物之前吹掃每一反應物。
如本文所用，術語「呈電漿形式之還原氣體」意指呈電漿形式之還原氣體包含選自以下之氣體：氫氣(H 2)、肼(N 2H 4)；C 1-C 4烷基肼，例如甲基肼、第三丁基肼、1,1-二甲基肼及1,2-二甲基肼，其與由惰性氣體(例如N 2、氦或氬)單獨或與H 2組合形成之電漿組合使用。舉例而言，利用惰性氣體(例如氬)之連續流，同時起始射頻場(R f場)，隨後起始氫以提供電漿H 2。通常，所利用之電漿功率在13.6 MHz下在約50至500瓦特之範圍內。
類似地，氧化氣體可用於膜沈積之不同循環中，以增加膜之氧含量並降低碳含量。適宜氧化氣體包括O 2、O 2電漿、臭氧(O 3)、水(H 2O)及氧化亞氮(N 2O)。利用氧化氣體脈衝之實施例可在一或多個序列中使用，而在其他脈衝序列中使用還原氣體。
在某些實施例中，上文所描述反應物(即，式(I)化合物及呈電漿形式之還原氣體)之脈衝時間(即，暴露於基板之持續時間)在約1與10秒間之範圍內。當利用吹掃步驟時，持續時間為約1至10秒或2至5秒。在其他實施例中，用於每一反應物之脈衝時間在約2至約5秒之範圍內。
本文所揭示之方法涉及一或多種吹掃氣體。用於吹掃掉未消耗反應物及/或反應副產物之吹掃氣體係不與前體反應之惰性氣體。實例性吹掃氣體包括(但不限於)氬、氮、氦、氖、氫及其混合物。在某些實施例中，吹掃氣體(例如Ar)係以約10至約2000 sccm範圍內之流動速率供應至反應器中達約0.1至1000秒，由此吹掃可能留在反應器中之未反應材料及任何副產物。
供應式(I)化合物、呈電漿形式之還原氣體、及/或其他前體、源氣體及/或試劑之各別步驟可藉由改變用於供應該等之序列及/或改變所得介電膜之化學計量組成來實施。
在本發明之方法中，將能量施加至不同反應物以引起反應並在微電子裝置基板上形成SiOCN膜。該等能量可由但不限於熱、脈衝熱、電漿、脈衝電漿、高密度電漿、感應耦合電漿、遠端電漿方法及其組合提供。在某些實施例中，可使用二次RF頻率源以改質基板表面處之電漿特性。在其中沈積涉及電漿之實施例中，電漿生成方法可包含其中電漿直接在反應器中生成之直接電漿生成方法，或另一選擇，其中電漿在反應區及基板之「遠端」生成、被供應至反應器中之遠端電漿生成方法。
如本文所用，術語「微電子裝置」對應於半導體基板(包括其中儲存單元垂直堆疊成多層(3D NAND)結構之一類非揮發性快閃記憶體)、平板顯示器及微機電系統(MEMS)，該等經製造用於微電子、積體電路或電腦晶片應用。應理解，術語「微電子裝置」並不意欲以任何方式進行限制且包括任何基板，該基板包括負通道金氧化物半導體(nMOS)及/或正通道金氧化物半導體(pMOS)電晶體且最終將變成微電子裝置或微電子總成。該等微電子裝置含有至少一個基板，該基板可選自例如矽、SiO 2、Si 3N 4、OSG、FSG、碳化矽、氫化碳化矽、氮化矽、氫化氮化矽、碳氮化矽、氫化碳氮化矽、氮化硼、抗反射塗層、光阻劑、鍺、含鍺、含硼、Ga/As、撓性基板、多孔無機材料、金屬(例如銅及鋁)，及擴散障壁層(例如但不限於TiN、Ti(C)N、TaN、Ta(C)N、Ta、W或WN)。該等膜與各種後續處理步驟(例如，化學機械平面化(CMP)及各向異性蝕刻方法)相容。
該等膜提供對濕式蝕刻劑及O 2電漿之低蝕刻抗性。O 2電漿灰化製程係在340℃及3托(Torr)壓力下利用500 sccm O 2流量及100、250及400 W之電漿功率實施1分鐘。就此而言，參考圖3，本發明在另一態樣中提供SiOCN膜，當暴露於250瓦特之氧電漿達60秒時，該膜與氮化矽參考樣品相比展現僅約2.5埃之灰化損傷差異。
如上所述，在某些實施例中，本發明之SiOCN膜具有約15至約25原子百分比之氮及約16原子百分比之碳。利用本發明之方法，可製備介電常數(k)小於約5之該等SiOCN膜。
一般而言，由此製得之SiOCN膜之期望厚度係約20 Å至約200 Å。
經由式(I)前體間之相互作用以及隨後與H 2電漿之反應，利用氮摻雜低k SiCO膜顯著改良所得SiOCN膜之濕式蝕刻及H 2電漿灰化抗性。
在本發明之方法中，式(I)前體之遞送速率可為約10至50 mg/PEALD循環。
在另一態樣中，本發明提供下式之化合物
Figure 02_image008
； 其中每一R 1獨立選自氫及C 1-C 4烷基，每一R 2獨立選自氫及C 1-C 4烷基；且每一R 3選自氫及C 1-C 4烷基，條件係當R 3係氫時，R 1係C 1-C 4烷基。
該等化合物可在含矽膜之沈積中用作前體。在一個實施例中，每一R 1係乙基，每一R 2係甲基，且每一R 3係乙基。在另一實施例中，每一R 1係異丙基，每一R 3係氫，且每一R 2係甲基。
本發明可藉由其某些實施例之以下實例進一步說明，但應理解，除非另外特定指出，否則包括該等實例僅用於說明之目的且並非意欲限制本發明之範圍。
實例 1 – 使用雙 ( 二乙基胺基 ) 四甲基二矽氧烷作為唯一前體進行沈積
PEALD SiCON沈積係使用PEALD系統實施，其中承熱器溫度為300℃，噴淋頭溫度為170℃，腔室壓力為3托，且環境惰性氣體流量為500 sccm。沈積期間之試件溫度為大約265℃。
H2電漿係使用直接電漿系統產生，該系統在噴淋頭與承熱器/晶圓之間產生電漿。電漿功率固定為250W，且電漿脈衝時間固定為5秒。
用於SiOCN之PEALD之脈衝方案係由以下組成： 1. 前體脈衝[雙(二乙基胺基)四甲基二矽氧烷]達2 sec 2. 惰性氣體吹掃達5 sec 3. H 2電漿脈衝達5 sec 4. 惰性氣體吹掃達5 sec
實例 2 - 1,3- 雙 ( 二乙基醯胺基 ) 四甲基二矽氧烷之合成
向配備有機械攪拌器、熱電偶、氣體/真空入口轉接器及具有管入口之冷凝器之4頸5L圓底燒瓶添加400 mL (3.87 mol, 4.4 eq)二乙胺及3L無水二乙醚。具有氣體/真空入口閥之1L燒瓶裝填有於600 mL無水己烷中之173 mL (0.885莫耳, 1.0 eq) 1,3-二氯四甲基二矽氧烷。兩個燒瓶均在鹽水浴中冷却至約-5℃，然後利用PTFE管連接。將1,3-二氯四甲基二矽氧烷溶液分批添加至攪拌的胺溶液，使得內部溫度維持低於0℃。在添加完成時，使反應混合物緩慢升溫至環境溫度並攪拌48小時。將含有大量二乙胺鹽酸鹽之反應混合物在惰性氣氛下過濾至5L燒瓶中，且鹽用2 x 1.5L等份無水二乙醚洗滌。在真空中自濾液去除溶劑且所得澄清黃色油狀物(230.7 g)在短程蒸餾頭中在100毫托壓力下蒸餾，以獲得156.5 g產物(64%產率，＞98%純)。¹H NMR ( d 6 -苯)：d 2.85 (q, 2H), 1.09 (t, 3H), 0.19 (s, 2H)。 13C NMR ( d 6 -苯)：d 40.5, 16.7, 0.7。 29Si NMR ( d 6 -苯) -13.4。
實例 3 - 1,3- 雙 ( 異丙基醯胺基 ) 四甲基二矽氧烷之合成
向配備有機械攪拌器、熱電偶、氣體/真空入口轉接器及具有管入口之冷凝器之4頸5L圓底燒瓶添加異丙胺(4.4 eq)及3L無水二乙醚。具有氣體/真空入口閥之1L燒瓶裝填有於600 mL無水己烷中之173 mL (0.885莫耳, 1.0 eq) 1,3-二氯四甲基二矽氧烷。兩個燒瓶均在鹽水浴中冷却至約-5℃，然後利用PTFE管連接。將1,3-二氯四甲基二矽氧烷溶液分批添加至攪拌的胺溶液，使得內部溫度維持低於0℃。在添加完成時，使反應混合物緩慢升溫至環境溫度並攪拌48小時。將含有大量異丙胺鹽酸鹽之反應混合物在惰性氣氛下過濾至5L燒瓶中，且鹽用2 x 1.5L等份無水二乙醚洗滌。在真空中自濾液去除溶劑並獲得澄清黃色油狀物。此油狀物藉由後續真空蒸餾進行純化。
已如此闡述本揭示內容之若干說明性實施例，熟習此項技術者將易於理解在隨附申請專利範圍之範圍內可製得並使用其他實施例。本文件所涵蓋之本揭示內容的許多優點已在前述說明中闡述。然而，應瞭解，此揭示內容在許多方面中僅係說明性的。當然，本揭示內容之範圍係以表述隨附申請專利範圍之語言進行定義。
結合附圖考慮以下對各種說明性實施例之描述，可更全面地理解本揭示內容。
圖1係SiOCN厚度(以埃計)對PEALD循環次數之圖表。此數據係使用雙(二乙基胺基)四甲基二矽氧烷，使用265℃、2秒矽前體脈衝、隨後5秒250瓦特(watt)之氫電漿脈衝之原子層沈積(ALD)條件生成。此方法導致約0.2 Å/循環之膜形成。
圖2係氧化物厚度對蝕刻時間之圖表，其圖解說明利用50:1稀氫氟酸(DHF)之濕蝕刻抗性(WER)小於0.1 Å/分鐘。本發明之SiOCN膜與熱氧化物相比較。
圖3係是蝕刻深度差異之圖表，其比較原沈積樣之本發明SiOCN膜對暴露於100至400瓦特範圍內之灰化電漿功率後之蝕刻深度。此數據說明在100瓦特下約7 Å/分鐘之灰化深度。此數據說明其與SiN相比具有相當之灰化抗性。
圖4係實例1之SiOCN膜在膜之不同深度處組成原子之原子百分比的XPS圖表。在大部分膜處，組成係如下：16.6原子百分比碳、19.3原子百分比氮、24.7原子百分比氧及39.4原子百分比之矽。
Figure 111103081-A0101-11-0002-1

Claims (10)

  1. 一種將氧碳氮化矽膜氣相沈積於微電子裝置表面上之方法，其包含將選自以下各項之以下反應物引入至反應區中： a. 至少一種下式之化合物
    Figure 03_image009
    ； 其中每一R 1獨立選自氫及C 1-C 4烷基，每一R 2獨立選自氫及C 1-C 4烷基；且每一R 3選自氫及C 1-C 4烷基，條件係當R 3係氫時，R 1係C 1-C 4烷基；及 b. 呈電漿形式之還原氣體或氧化氣體，其中在將該膜暴露於下一反應物之前吹掃每一反應物。
  2. 如請求項1之方法，其中每一R 1係乙基。
  3. 如請求項1之方法，其中每一R 2係甲基。
  4. 如請求項1之方法，其中該還原氣體選自氫、肼；甲基肼、第三丁基肼、1,1-二甲基肼及1,2-二甲基肼。
  5. 如請求項1之方法，其中該氧化氣體選自氧、氧電漿、臭氧、水及氧化亞氮。
  6. 如請求項1之方法，其進一步包含重複a.及b.，直至已獲得期望厚度之膜。
  7. 如請求項7之方法，其中當暴露於250瓦特(Watt)之氧電漿達60秒時，如此形成之該氧碳氮化矽膜與氮化矽參考樣品相比展現低至約2.5埃之灰化損傷差異。
  8. 一種下式之化合物，
    Figure 03_image010
    ； 其中每一R 1獨立選自氫及C 1-C 4烷基，每一R 2獨立選自氫及C 1-C 4烷基；且每一R 3選自氫及C 1-C 4烷基，條件係當R 3係氫時，R 1係C 1-C 4烷基。
  9. 如請求項8之化合物，其中每一R 1係乙基，每一R 2係甲基，且每一R 3係乙基。
  10. 如請求項8之化合物，其中每一R 1係異丙基，每一R 3係氫，且每一R 2係甲基。
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