TW201721897A - 可擴展的電壓源 - Google Patents

可擴展的電壓源 Download PDF

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TW201721897A
TW201721897A TW105129250A TW105129250A TW201721897A TW 201721897 A TW201721897 A TW 201721897A TW 105129250 A TW105129250 A TW 105129250A TW 105129250 A TW105129250 A TW 105129250A TW 201721897 A TW201721897 A TW 201721897A
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stack
voltage source
semiconductor
diode
layer
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TW105129250A
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TWI605608B (zh
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Daniel Fuhrmann
Victor Khorenko
Wolfgang Guter
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Azur Space Solar Power Gmbh
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Abstract

一種可擴展的電壓源，具有：數量為N的相互串聯連接之部分電壓源，該部分電壓源構造為半導體二極體，其中該部分電壓源中之每一者具有一個半導體二極體，該半導體二極體具有p-n接面，每個半導體二極體具有p摻雜之吸收層，其中p吸收層被p摻雜之鈍化層鈍化，該p摻雜之鈍化層具有比該p吸收層之帶隙更大的帶隙，該半導體二極體具有n吸收層，其中該n吸收層被n摻雜之鈍化層鈍化，該n摻雜之鈍化層具有比該n吸收層之帶隙更大的帶隙，並且各個部分電壓源之部分電源電壓相互間具有小於20%之偏差；在每兩個彼此相繼之部分電壓源之間構造有一個隧道二極體，其中該隧道二極體具有多個半導體層，該半導體層具有比該p/n吸收層之帶隙更大的帶隙，並且具有更大帶隙之半導體層分別由具有經改變的化學計量之材料及/或不同於該半導體二極體之p/n吸收層的元素成分之材料組成；該部分電壓源及該隧道二極體單片地集成在一起，並且共同構成具有上側及下側之第一堆疊，並且該部分電壓源之數量N大於等於2；光在上側處入射至該堆疊，並且在堆疊上側之照射面之尺寸基本上為該堆疊在上側處之面之尺寸，並且該第一堆疊具有小於12 µm之總厚度；在300 K的情況下，只要該第一堆疊被具有確定波長之光子流照射，則該第一堆疊具有大於2.2伏特之電源電壓，其中在自該堆疊之上側向該堆疊下側之光入射方向上，半導體二極體之p吸收層及n吸收層之總厚度自最上方之二極體向著最下方之二極體增加。

Description

可擴展的電壓源
本發明係關於一種可擴展的(skalierbar)電壓源。
由US 4 127 862、US 6 239 354 B1、DE 10 2010 001 420 A1、由Nader M. Kalkhoran等人寫的文章《Cobalt disilicide intercell ohmic contacts for multijunction photovoltaic energy converters》 (用於多接面光電能量轉換器之矽化鈷電池間之歐姆接觸)，應用物理學快報(Appl. Phys. Lett.) 64，1980 (1994)以及由A. Bett等人寫的文章《III-V Solar cells under monochromatic illumination》 (單色光照射下之III-V族太陽能電池)，2008年第33屆IEEE光電專家會議(PVSC '08，33rd IEEE)論文集，第1-5頁，ISBN：978-1-4244-1640-0已知了可擴展的電壓源或由III-V族材料構成之太陽能電池。
在此背景下，本發明的任務在於：給出一種裝置，該裝置對先前技術作出進一步改進。 該任務藉由具有技術方案1之特徵之可擴展的電壓源來解決。本發明之有利的實施方式為從屬技術方案之主題。 根據本發明之主題提出可擴展的電壓源，該可擴展的電壓源具有數量為N的相互串聯連接之部分電壓源，該部分電壓源構造為半導體二極體，其中該部分電壓源中之每一者具有一個半導體二極體，該半導體二極體具有p-n接面，該半導體二極體具有p摻雜之吸收層(Absorptionsschicht)，其中p吸收層被p摻雜之鈍化層鈍化，該p摻雜之鈍化層具有比該p吸收層之帶隙更大的帶隙，該半導體二極體具有n吸收層，其中該n吸收層被n摻雜之鈍化層鈍化，該n摻雜之鈍化層具有比該n吸收層之帶隙更大的帶隙，並且各個部分電壓源之部分電源電壓相互間具有小於20%之偏差；在每兩個彼此相繼之部分電壓源之間構造有一個隧道二極體，其中該隧道二極體具有多個半導體層，該半導體層具有比該p/n吸收層之帶隙更大的帶隙，並且具有更大帶隙之半導體層分別由具有經改變的化學計量(Stöchiometrie)之材料及/或不同於該半導體二極體之p/n吸收層的元素成分之材料組成；該部分電壓源及該隧道二極體單片地集成在一起並且共同構成具有上側及下側之第一堆疊(Stapel)，並且該部分電壓源之數量N大於等於2；光在上側處入射至該第一堆疊上，並且堆疊上側處之照射面之尺寸基本上為該第一堆疊在上側處之面之尺寸，並且該第一堆疊具有小於12 µm之總厚度；在300 K的情況下，只要該第一堆疊被光子流照射，則該第一堆疊具有大於2.2伏特之電源電壓，其中在自該第一堆疊之上側向該第一堆疊之下側之光入射方向上，半導體二極體之p吸收層及n吸收層之總厚度自最上方之半導體二極體向著最下方之半導體二極體增加，在該第一堆疊之下側附近構造有環繞的階台，並且該階台之高度大於100 nm。 要注意的是，表述「基本上」結合堆疊上側處之照射面與第一堆疊在上側處之面的尺寸之比較應理解為，面積的區別尤其小於20%，或者較佳小於10%，或者較佳小於5%，或者最佳兩個面積相等。 仍要注意的是，用於照射堆疊上側之「光」之表述應理解為具有吸收層之吸收範圍內的波長光譜之光。可以理解，具有一個確定的、即吸收的波長的—亦即吸收層之吸收範圍內的波長之單色光亦為適合的。 可以理解，較佳以確定波長之光照射該第一堆疊之整個上側，亦即整個表面或幾乎整個表面。應注意，深入的研究以出人意料的方式表明：與先前技術不同地，藉助當前的單片堆疊方式以有利的方式得到了2.2V以上之電源電壓。應注意，以下將術語「二極體」及「半導體二極體」作為同義詞使用。 根據本發明之裝置之一個優點在於：藉由多個部分電壓源之串聯連接亦能夠製造具有3伏以上或更大的電壓值之電壓源，藉助單片集成結構能夠製造簡單的且成本上有利的及可靠的電壓源。另一優點為：藉助堆疊形式之佈置與迄今矽二極體之側向佈置相比實現了較大的面積節省。尤其由發射二極體或光源僅需照射該堆疊之小得多的接收面。 在一種擴展構型中，各個部分電壓源之部分電源電壓相互間偏差小於10%。由此實質地改良了作為可擴展的電壓源、尤其作為參考電壓源之適用性。可以理解，術語「可擴展」係關於整個堆疊之電源電壓之幅值。 在另一種擴展構型中，該半導體二極體分別具有相同的半導體材料，其中，在此二極體的半導體材料具有相同的晶體組成(kristalline Zusammensetzung)，較佳化學計量幾乎相同，或者較佳化學計量完全相同。同樣有利的是，該第一堆疊被佈置在基板上。在一種實施方式中，該半導體材料及/或該基板由III-V族材料組成。尤其較佳的是，該基板包括鍺或砷化鎵，及/或，該基板上之半導體層具有砷及/或磷。換言之，該半導體層包括含砷之層及含磷之層，即由GaAs或AlGaAs或InGaAs組成之層作為砷化物層之示例以及InGaP作為磷化物層之示例。 較佳的是，在該第一堆疊之下側上構造第二電壓連接端，尤其是，該第二電壓連接端構造成穿過基板。 在另一種實施方式中，該半導體二極體由與該基板相同的材料組成。優點為，尤其此兩部分之膨脹係數相同。有利的是，該半導體二極體基本上由III-V族材料組成。尤其較佳地使用GaAs。 在一種較佳的實施方式中，在該第一堆疊之上側上構造有第一電壓連接端，該第一電壓連接端被構造為邊緣附近之環繞的金屬接觸部或被構造為邊緣處之單個接觸面。 此外較佳的是，該第一堆疊具有小於2 mm2 或小於1 mm2 之基面。研究已表明：有利的是，該基面以四邊形構造。優選該堆疊之基面以正方形構造。 進一步的研究已表明，為了達到特別高的電壓有利的是，構造第二堆疊並且將兩個堆疊相互串聯地連接，從而該第一堆疊之電源電壓及該第二堆疊之電源電壓相加。較佳地，該第一堆疊與該第二堆疊並排佈置在共同的載體上。 在一種擴展構型中，該第一堆疊之電源電壓與該第二堆疊之電源電壓偏差小於15%。 此外較佳的是，在堆疊之最下方之半導體二極體之下方構造有半導體鏡。研究已表明：能夠將多個堆疊並排構造在一個半導體晶片或半導體基板片上，其方式為，在整面地、較佳外延地製造該層之後，實施所謂的台面蝕刻(Mesaätzung)。為此，藉助光罩工藝產生漆光罩，接著較佳地實施濕化學蝕刻以產生台面溝槽。該台面蝕刻較佳地終止在基板中或終止在基板上。 在一種擴展構型中較佳的是，每個堆疊在下側附近具有環繞的、台階形(absatzförmig)的邊緣，其中在兩個堆疊直接相鄰的情況下在堆疊結構之外側上構成環繞的邊緣作為共同的環繞邊緣，從而該電壓源具有環繞的邊緣。 邊緣較佳為階台形的(stufenförmig)或者構造為階台。在此，邊緣或階台之表面較佳大部分具有平面，其中，邊緣或階台之表面之法線構造為平行或幾乎平行於第一堆疊之表面之法線或者相應堆疊之表面之法線。要注意的是，邊緣或階台的側面構造為基本或恰好垂直於邊緣或階台之表面。該階台之高度大於100 nm，亦即，該環繞的側面具有大於100 nm之高度，以便達到足夠的機械穩定性。該階台尤其具有小於1000 μm之高度。 邊緣或階台之稜邊分別與第一堆疊之四個側面中之每一者或者分別多個堆疊之側面距離至少5 μm且最大500 μm。稜邊至直接相鄰的側面之距離範圍分別較佳在10 μm與300 μm之間。該距離範圍尤其在50 μm與250 μm之間。 第一堆疊之側面及尤其堆疊之所有側面較佳構造為平的，並且尤其構造為垂直的或幾乎垂直的。側面上之法線相對於相鄰邊緣面之法線或者堆疊表面之法線較佳在80°與110°之間的角度範圍內，亦即，側面之法線與直接相鄰的邊緣面之法線彼此基本正交。該角度範圍較佳在85°與105°之間。 在一種擴展構型中，在至少一個半導體二極體中之p吸收層與n吸收層之間構造有本徵層。在一種實施方式中，該本徵層構造在最下方之半導體二極體中。在另一種擴展構型中，該本徵層構造在所有半導體二極體中。此處，本徵層應理解為具有低於1E16 1/cm2 、較佳小於5E15 1/cm2 、最佳小於1.5E15 1/cm2 的摻雜之半導體層。 在一種實施方式中，在鍺基板上佈置有恰好兩個半導體二極體，其中，該半導體二極體分別包括連接至該鍺基板之柵格匹配的InGaAs作為吸收材料。
圖1的示圖示出具有兩個部分電壓源之第一實施方式之示意圖，該第一實施方式具有可擴展的電壓源VQ，該可擴展的電壓源VQ具有第一堆疊ST1，該第一堆疊具有上側及下側並且具有數量N等於2之二極體。該第一堆疊ST1具有由第一二極體D1及第一隧道二極體T1及第二二極體D2構成之串聯電路。在堆疊ST1之上側處構造有第一電壓連接端VSUP1，並且在堆疊ST1之下側處構造有第二電壓連接端VSUP2。在此，該第一堆疊ST1之電源電壓VQ1由各個二極體D1至D2之部分電壓組成。為此，該第一堆疊ST1經受光子流—亦即光L。 二極體D1至D2與隧道二極體T1之第一堆疊ST1被實施為單片構造的、較佳地由相同的半導體材料構成之塊。 在圖2的示圖中構造有第一堆疊ST1及第二堆疊ST2之有利的相互串聯的另一種實施方式。兩個堆疊ST1及ST2分別具有兩個部分電壓源。以下僅解釋與圖1的示圖之區別。該第二堆疊ST2如該第一堆疊ST1般具有由兩個二極體及構造在此等二極體之間的隧道二極體組成之串聯電路。兩個堆疊ST1及ST2相互串聯地連接，從而只要兩個堆疊ST1與ST2經受光子流L，則該第一堆疊ST1之電源電壓VQ1與該第二堆疊ST2之電源電壓VQ2相加。 圖3的示圖示出具有三個部分電壓源之第一實施方式之示意圖，該第一實施方式具有可擴展的電壓源VQ，該可擴展的電壓源VQ具有第一堆疊ST1，該第一堆疊具有上側及下側並且具有數量N等於3之二極體。該第一堆疊ST1具有由第一二極體D1及第一隧道二極體T1及第二二極體D2及第二隧道二極體T2以及第三二極體D3構成之串聯電路。在堆疊ST1之上側處構造有第一電壓連接端VSUP1，並且在堆疊ST1之下側處構造有第二電壓連接端VSUP2。在此，該第一堆疊ST1之電源電壓VQ1基本上由各個二極體D1至D3之部分電壓組成。為此，該第一堆疊ST1經受光子流—亦即光L。 二極體D1至D3與隧道二極體T1及T2之第一堆疊ST1被實施為單片構造的、較佳地由相同的半導體材料構成之塊。 在圖4的示圖中構造有第一堆疊ST1及第二堆疊ST2的有利的相互串聯之另一種實施方式。在此，兩個堆疊ST1及ST2分別具有三個部分電壓源。以下僅解釋與圖3的示圖之區別。該第二堆疊ST2如該第一堆疊ST1般具有由三個二極體及構造在此等二極體之間的隧道二極體組成之串聯電路。兩個堆疊ST1及ST2相互串聯地連接，從而只要兩個堆疊ST1與ST2經受光子流L，則該第一堆疊ST1之電源電壓VQ1與該第二堆疊ST2之電源電壓VQ2相加。 在一種未示出之實施方式中，該兩個堆疊ST1及ST2彼此具有不同數量的分別以串聯電路連接之二極體。在另一種未示出的實施方式中，至少第一堆疊ST1及/或第二堆疊ST2具有多於三個以串聯電路連接之二極體。由此能夠擴展電壓源VQ之電壓幅值。較佳地，數量N在4與8之間的範圍中。在另一種未示出之實施方式中，該兩個堆疊ST1及ST2相互並聯連接。 在圖5的示圖中示出了半導體層有利地相互串聯成該第一堆疊ST1之實施方式。以下僅解釋與圖1的示圖之區別。該第一堆疊ST1總共包括五個串聯連接之部分電壓源，該部分電壓源被構造為二極體D1至D5。光L入射至第一二極體D1之表面OB上。該表面OB幾乎或完全被照射。在兩個彼此相繼之二極體D1-D5之間分別構造有一個隧道二極體T1-T4。隨著各個二極體D1至D5離該表面OB之距離增加，吸收區之厚度增大，從而最下方之二極體D5具有最厚之吸收區。該第一堆疊ST1之總厚度總共小於等於12 µm。在最下方之二極體D5之下方構造有基板SUB。 在圖6的示圖中示出了半導體層有利地相互串聯成該第一堆疊ST1之實施方式，其具有環繞的台階形之階台。以下僅解釋與圖3的示圖之區別。在該第一堆疊ST1之表面OB上，在邊緣R處構造有金屬之第一連接接觸部K1。該第一連接接觸部K1與該第一電壓連接端VSUP1相連接(未示出)。該基板SUB具有上側OS，其中該基板SUB之上側OS材料鎖合地與最下方的、亦即第五二極體D5連接。在此應理解，在將第五二極體佈置在該基板上以及材料鎖合地與該基之上側OS連接之前，在該基板上外延地產生一個薄的核化層及一個緩衝層。該基板SUB之上側OS具有比該第一堆疊ST1之下側處之面更大的表面。由此構成了環繞的階台STU。該階台STU之邊緣與第一堆疊ST1之直接相鄰的側面距離大於5 µm且小於500 µm，以附圖標記STU之長度示出。該階台STU之側面之高度大於100 nm。在該基板SUB之下側處構造有整面的金屬的第二接觸部K2。該第二連接接觸部K2與該第二電壓連接端VSUP2相連接(未示出)。
D1‧‧‧第一二極體/半導體二極體
D2‧‧‧第二二極體/半導體二極體
D3‧‧‧第三二極體/半導體二極體
D4‧‧‧半導體二極體
D5‧‧‧第五二極體/半導體二極體
K1‧‧‧第一連接接觸部/第一金屬接觸部/接觸面
K2‧‧‧第二接觸部/第二連接接觸部
L‧‧‧光/光子流
OB‧‧‧表面
OS‧‧‧上側
R‧‧‧邊緣
ST1‧‧‧第一堆疊
ST2‧‧‧第二堆疊
STU‧‧‧階台
SUB‧‧‧基板
T1‧‧‧第一隧道二極體
T2‧‧‧第二隧道二極體
T3‧‧‧隧道二極體
T4‧‧‧隧道二極體
VQ‧‧‧可擴展的電壓源
VQ1‧‧‧電源電壓
VQ2‧‧‧電源電壓
VSUP1‧‧‧第一電壓連接端
VSUP2‧‧‧第二電壓連接端
以下參照附圖來詳細解釋本發明。在此，相同的部分標以相同的名稱。所示出之實施方式為高度示意性的，亦即距離及側向延展與垂直延展並非按比例的，只要沒有其他說明，相互間亦不具有可推導之幾何關係。其中示出了： 圖1：根據本發明之可擴展的電壓源之第一實施方式，其具有一個堆疊及兩個部分電壓源； 圖2：可擴展的電壓源之第二實施方式，其具有多個堆疊，該多個堆疊各自具有兩個部分電壓源； 圖3：根據本發明之可擴展的電壓源之第三實施形式，其具有一個堆疊，該堆疊具有三個部分電壓源； 圖4：可擴展的電壓源之第四實施方式，其具有多個堆疊，該多個堆疊各自具有三個部分電壓源； 圖5：具有總共五個二極體之實施方式，該五個二極體具有不同厚度之吸收區； 圖6：具有環繞的台階形的階台之堆疊。
D1‧‧‧第一二極體/半導體二極體
D2‧‧‧第二二極體/半導體二極體
L‧‧‧光/光子流
ST1‧‧‧第一堆疊
T1‧‧‧第一隧道二極體
VQ‧‧‧可擴展的電壓源
VQ1‧‧‧電源電壓
VSUP1‧‧‧第一電壓連接端
VSUP2‧‧‧第二電壓連接端

Claims (19)

  1. 一種可擴展的電壓源(VQ)，該可擴展的電壓源具有： 數量為N的相互串聯連接之部分電壓源，該部分電壓源構造為半導體二極體，其中，該部分電壓源中之每一者具有一個半導體二極體(D1，D2，D3，D4，D5)，該半導體二極體具有p-n接面，該半導體二極體(D1，D2，D3，D4，D5)具有p摻雜之吸收層，該半導體二極體(D1，D2，D3，D4，D5)具有n吸收層，其中，該n吸收層被n摻雜之鈍化層鈍化，該n摻雜之鈍化層具有比該n吸收層之帶隙更大的帶隙，並且各個部分電壓源之部分電源電壓相互間具有小於20%之偏差， 在每兩個彼此相繼之部分電壓源之間構造有一個隧道二極體(T1，T2；T3，T4)，其中，該隧道二極體(T1，T2；T3，T4)具有多個半導體層，該半導體層具有比該p/n吸收層之帶隙更大的帶隙，並且具有更大帶隙之半導體層分別由具有經改變的化學計量之材料及/或不同於該半導體二極體(D1，D2，D3，D4，D5)之該p/n吸收層的元素成分之材料組成， 該部分電壓源及該隧道二極體(T1，T2；T3，T4)單片地集成在一起並且共同構成具有上側及下側之第一堆疊(ST1)，並且該部分電壓源之數量N大於等於2， 在以光(L)照射該第一堆疊(ST1)的情況下，其中，該光(L)在該上側處入射至該第一堆疊(ST1)上該表面(OB)上，並且在堆疊上側處經照射之表面(OB)之尺寸基本上相應於該第一堆疊在上側處之面之尺寸，並且該第一堆疊(ST1)具有小於12 µm之總厚度， 在300 K的情況下，只要該第一堆疊(ST1)被光(L)照射，則該第一堆疊(ST1)具有大於2.2伏特之電源電壓(VQ1)，其中，在自該第一堆疊(ST1)之上側向該堆疊之下側之光入射方向上，半導體二極體之p吸收層及n吸收層之總厚度自最上方之半導體二極體(D1)向著最下方之半導體二極體(D3-D5)增加， 其特徵在於， 該半導體二極體(D1，D2，D3，D4)之每個p吸收層被p摻雜之鈍化層鈍化，該p摻雜之鈍化層具有比該p吸收層之帶隙更大的帶隙，並且在該第一堆疊(ST1)之下側附近構造有環繞的階台(STU)，並且該階台(STU)之高度大於100 nm。
  2. 如請求項1之可擴展的電壓源(VQ)，其中該部分電壓源之部分電源電壓相互間具有小於10%之偏差。
  3. 如請求項1或2之可擴展的電壓源(VQ)，其中該半導體二極體(D1，D2，D3，D4，D5)分別具有相同的半導體材料。
  4. 如請求項1或2之可擴展的電壓源(VQ)，其中該第一堆疊(ST1)佈置在基板(SUB)上，並且該基板(SUB)包括半導體材料。
  5. 如請求項1或2之可擴展的電壓源(VQ)，其中該第一堆疊(ST1)具有小於2 mm2 或小於1 mm2 之基面。
  6. 如請求項5之可擴展的電壓源(VQ)，其中該基面以四邊形構造。
  7. 如請求項1或2之可擴展的電壓源(VQ)，其中在該第一堆疊(ST1)之上側上構造有第一電壓連接端(VSUP1)，該第一電壓連接端被構造為該邊緣(R)附近之環繞的第一金屬接觸部(K1)或被構造為該邊緣(R)處之單個接觸面(K1)。
  8. 如請求項1或2之可擴展的電壓源(VQ)，其中在該第一堆疊(ST1)之下側上構造有第二電壓連接端(VSUP2)。
  9. 如請求項8之可擴展的電壓源(VQ)，其中該第二電壓連接端(VSUP2)構造成穿過該基板。
  10. 如請求項1或2之可擴展的電壓源(VQ)，其中構造有第二堆疊(ST2)，並且該第一堆疊(ST1)與該第二堆疊(ST2)被並排佈置在共同的載體上，並且兩個堆疊(ST1，ST2)相互串聯地連接，從而該第一堆疊(ST1)之電源電壓(VQ1)與該第二堆疊(ST2)之電源電壓(VQ2)相加。
  11. 如請求項1或2之可擴展的電壓源(VQ)，其中該半導體材料及/或該基板由III-V族材料組成。
  12. 如請求項1或2之可擴展的電壓源(VQ)，其中該基板包括鍺或砷化鎵。
  13. 如請求項1或2之可擴展的電壓源(VQ)，其中在該堆疊之最下方之半導體二極體之下方構造有半導體鏡。
  14. 如請求項1或2之可擴展的電壓源(VQ)，其中該堆疊(ST1)之半導體層同時包括含有砷化物之層及含有磷化物之層。
  15. 如請求項1或2之可擴展的電壓源(VQ)，其中該邊緣之稜邊與該堆疊之直接相鄰的側面距離至少5 μm且最大500 μm。
  16. 如請求項1或2之可擴展的電壓源(VQ)，其中在至少一個半導體二極體中之p吸收層與n吸收層之間構造有本徵層。
  17. 如請求項16之可擴展的電壓源(VQ)，其中該本徵層構造在最下方之半導體二極體中。
  18. 如請求項16之可擴展的電壓源(VQ)，其中該本徵層構造在所有半導體二極體中。
  19. 如請求項1或2之可擴展的電壓源(VQ)，其中在鍺基板上佈置有恰好兩個半導體二極體，並且該半導體二極體分別包括連接至該鍺基板之柵格匹配的InGaAs作為吸收材料。
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