TWI649892B - 光電耦合器 - Google Patents

光電耦合器 Download PDF

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TWI649892B
TWI649892B TW105114780A TW105114780A TWI649892B TW I649892 B TWI649892 B TW I649892B TW 105114780 A TW105114780 A TW 105114780A TW 105114780 A TW105114780 A TW 105114780A TW I649892 B TWI649892 B TW I649892B
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stack
semiconductor
opk
receiver component
diode
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TW201707228A (zh
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沃夫岡 古特
丹尼爾 福爾曼
維特 科藍克
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艾澤太空太陽能公司
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Abstract

本發明揭示一種光電耦合器，其具有一發送器部件及一接收器部件，其中，該發送器部件及該接收器部件互相電流隔離並且互相光學耦合，並且該兩個部件經整合於一共同殼體中，該接收器部件包括一電壓源，其中，該電壓源包括數量為N之互相串聯連接之部分電壓源，該等部分電壓源經構造為半導體二極體，其中，此等部分電壓源中之每一者具有一個半導體二極體，該半導體二極體具有p-n接面，每一部分電壓源之部分電源電壓互相具有小於20%之偏差，在每兩個彼此相繼之部分電壓源之間構造有一個穿隧二極體，部分電壓源及穿隧二極體單片地經整合在一起，並且共同構成具有上側及下側之一第一堆疊，該等部分電壓源之數量N大於等於3，光在上側處入射到該堆疊上，並且在該堆疊上側處之一照射面之一尺寸大體上是該堆疊在上側處之一面之一尺寸，第一堆疊具有小於12μm之總厚度，在300K之情況下，只要該第一堆疊經具有確定波長之光子流所照射，則該第一堆疊具有大於3伏之一電源電壓，其中，在從該堆疊之上側向該堆疊之下側之光入射方向上，半導體二極體之p吸收層及n吸收層之總厚度從最上面之一二極體朝向最下面之一二極體增加。

Description

光電耦合器
本發明係關於一種光電耦合器。
光電耦合器充分已知。簡單光電耦合器具有發送器部件及接收器部件，其中，該兩個部件電流隔離(galvanisch getrennt)，然而光學耦合。該裝置由US 4 996 577已知。光學部件亦由US 2006/0048811 A1，US 8 350 208 B1及WO 2013/067969 A1已知。
另外，由US 4 127 862、US 6 239 354 B1、DE 10 2010 001 420 A1、由Nader M.Kalkhoran等人之「Cobalt disilicide intercell ohmic contacts for multijunction photovoltaic energy converters」，Appl.Phys.Lett.64,1980(1994)及由A.Bett等人之「III-V Solar cells under monochromatic illumination」,Photovoltaic Specialists Conference,2008,PVSC '08.33rd IEEE，第1-5頁，ISBN：978-1-4244-1640-0已知可擴展(skalierbar)之電壓源或由III-V族材料構成的太陽能電池。
在此背景下本發明之任務在於，給出一種擴展現有技術之裝置。
該任務通過具有技術方案1的特徵的光電耦合器來解決。本發明之有利構型為附屬技術方案之主題。
根據本發明之主題提出一種具有發送器部件及接收器部件之光電耦合器，其中，發送器部件及接收器部件互相電流隔離並且互相光 學耦合並且該兩個部件整合於共同殼體中，接收器部件包括電壓源，其中，電壓源包括數量為N的互相串聯連接之部分電壓源，該部分電壓源構造為半導體二極體，其中，此等部分電壓源中之每一者具有一個半導體二極體，該半導體二極體具有p-n接面，每個半導體二極體具有p摻雜之吸收層，其中，p吸收層被p摻雜之鈍化層鈍化，該p摻雜之鈍化層具有比該p吸收層之帶隙更大的帶隙，該半導體二極體具有n吸收層，其中，該n吸收層被n摻雜的鈍化層鈍化，該n摻雜之鈍化層具有比該n吸收層之帶隙更大的帶隙，各個部分電壓源的部分電源電壓互相具有小於20%之偏差，在每兩個彼此相繼之部分電壓源之間構造有一個穿隧二極體，其中，該穿隧二極體具有多個半導體層，此等半導體層具有比p/n吸收層之帶隙更大的帶隙，具有更大帶隙之半導體層分別由具有經改變化學計量(Stöchiometrie)及/或與該半導體二極體之p/n吸收層不同的元素成分之材料組成；該部分電壓源及該穿隧二極體單片地整合在一起並且共同構成具有上側及下側的第一堆疊(Stapel)，該部分電壓源之數量N大於等於3；光在上側處入射到第一堆疊上，並且堆疊上側處之照射面之尺寸大體上為該第一堆疊在上側處之面之尺寸，該第一堆疊具有小於12μm之總厚度；在300K之情況下，只要該第一堆疊被光子流照射，則該第一堆疊具有大於3伏之電源電壓，其中，在從堆疊之上側向第一堆疊之下側之光入射方向上，半導體二極體之p吸收層及n吸收層之總厚度從最上面之二極體朝向最下面之二極體增加，並且該電壓源在堆疊之下側附近具有環繞的、台階形邊緣。
應注意，表述「大體上」結合堆疊上側處之照射面與第一堆疊在上側處之面之尺寸的比較應理解為，面積之區別尤其小於20%，或者較佳小於10%，或者較佳小於5%，或者最較佳兩個面積相等。
亦應注意，用於照射堆疊上側之「光」的表述應理解為具有吸 收層之吸收範圍內之波長光譜的光。顯然，具有一個確定的、即吸收之波長的--亦即吸收層之吸收範圍內的波長之單色光亦為適合的。
顯然，只要在發送器部件中之光子傳輸受到調變，該調變就引起交流電壓，換言之，電源電壓之幅值隨時間變化。亦應注意，較佳以確定波長之光照射第一堆疊之整個上側，即整個表面或幾乎整個表面。
亦顯然，術語「光」指的是具有確定波長之光、尤其是LED光，此傳輸譜一般為高斯分佈形狀的，例如在典型的850nm之LED情況下具有20-30nm之半值寬度。亦顯然，該光之波長至少大於或等於該半導體二極體之吸收層之帶隙能量。
應注意，深入研究以驚人之方式表明：與現有技術不同地，運用此單片堆疊方式以有利之方式得到了3V以上之電源電壓。
顯然，部分電壓源之數量N較佳在10以下，並且第一堆疊之電源電壓之幅值主要由部分電源電壓之相加確定。
根據本發明之裝置的一個優點是，通過多個部分電壓源之串聯連接亦能夠實現具有4伏以上或更大之電壓值的電壓源，並且藉助單片整合結構能夠製造簡單的且成本有利的以及可靠的電壓源。另一個優點是，藉助堆疊形式之佈置與至今以矽二極體之橫向佈置相比實現了大的面積節省。尤其由發送二極體或光源僅需照射接收器部件之第一堆疊之小得多的接收面。
較佳地，部分電壓源之數量N大於等於3，只要以具有確定波長之光子流照射第一堆疊，則第一堆疊在300K情況下具有大於3伏之電源電壓。
在一種擴展方案中，各個部分電壓源之電源電壓互相偏差小於10%。由此實質地改進了作為可擴展之電壓源、尤其作為參考電壓源之適用性。顯然，術語「可擴展」係關於整個堆疊之電源電壓之幅 值。
在另一種擴展方案中，半導體二極體分別具有相同的半導體材料，在此二極體之半導體材料具有相同的晶體組成(kristalline Zusammensetzung)，較佳化學計量幾乎相同或者較佳完全相同。亦有利的是，第一堆疊配置在基板上。在一種實施中，半導體材料及/或基板由III-V族材料組成。尤其較佳的是，基板包括鍺或砷化鎵，及/或，基板上之半導體層具有砷及/或磷。換言之，半導體層包括含砷之層及含磷之層，亦即由GaAs或AlGaAs或InGaAs製成的層作為砷化物層之示例以及InGaP作為磷化物層之示例。
較佳地，在第一堆疊之下側上構造第二電壓連接端，尤其是該第二電壓連接端構造成穿過基板。
在另一種實施中，半導體二極體由與基板相同之材料組成。優點為，尤其這兩個部分之膨脹係數相同。有利地，半導體二極體大體上由III-V族材料組成。尤其有利的為，半導體二極體分別具有相同半導體材料。尤其較佳的是，應用GaAs。
在一種較佳之實施中，在第一堆疊之上側上構造有第一電壓連接端，作為邊緣附近之環繞的金屬接觸部或者作為邊緣處之單個接觸面。
亦較佳地，第一堆疊具有小於2mm2或小於1mm2之基面。研究已表明，有利的為，該基面以四邊形構造。堆疊之基面較佳構造成正方形。
進一步研究亦表明，為了達到更高的電壓，有利的為，構造第二堆疊並且將該兩個堆疊互相串聯連接，使得第一堆疊之電源電壓及第二堆疊之電源電壓相加。第一堆疊及第二堆疊較佳並置在共同載體上。
在一種擴展方案中，第一堆疊之電源電壓與第二堆疊之電源電 壓偏差小於15%。
研究還表明，有利的為，在該殼體中整合分析處理電路，並且電壓源與分析處理電路存在電有效連接。在一種較佳之實施中，接收器部件包括整合之半導體鏡，其中，半導體鏡較佳單片整合，最較佳整合於每個堆疊中。
亦較佳的為，半導體鏡構造在堆疊之最下面的半導體二極體下方。研究表明，多個堆疊可以並置地構造在一個半導體晶片上或半導體基板上，其方式是，在整面地、較佳磊晶地製造該層以後，實施所謂的台面蝕刻。為此運用遮罩技術產生漆遮罩，隨後較佳實施用於產生台面溝槽的濕化學蝕刻。台面蝕刻較佳終止在基板中或終止在基板上。
在一種實施中，在各別二極體的p吸收層與n吸收層之間構造有本徵層。在此，對於本徵層應理解為具有小於1E16 1/cm2、較佳小於5E15 1/cm2、最較佳小於1.5 E15 1/cm2的摻雜之半導體層。
在一種擴展方案中較佳的是，每一個堆疊在下側附近具有環繞的、台階形(absatzförmig)之邊緣，其中，在兩個堆疊直接相鄰的情況下在堆疊結構之外側構成環繞之邊緣作為共同的環繞邊沿，使得電壓源具有環繞之邊緣。
邊緣較佳是階台形的(stufenförmig)或者構造為階台。在此，邊緣或階台之表面較佳大部分具有平面，其中，邊緣或階台之表面之法線構造為平行或幾乎平行於第一堆疊之表面之法線或者各別堆疊之表面之法線。應注意，邊緣或階台之側面構造為基本或恰好垂直於邊緣或階台之表面。
邊緣或階台之棱邊分別與第一堆疊之四個側面中之每一者或者分別與多個堆疊之側面距離至少5μm且最大500μm。棱邊到直接相鄰之側面之距離範圍分別較佳在10μm與300μm之間。該距離範圍尤其在 50μm與250μm之間。
第一堆疊之側面及尤其堆疊之所有側面較佳構造為平的，並且尤其構造為垂直的或幾乎垂直的。側面上之法線相對於相鄰邊緣面之法線或者堆疊表面之法線較佳在80°與110°之間的角度範圍內，亦即，側面之法線與直接相鄰之邊緣面之法線彼此基本正交。該角度範圍較佳在85°與105°之間。
AWE‧‧‧分析處理單元
D1‧‧‧第一二極體
D2‧‧‧第二二極體
D3‧‧‧第三二極體
D4‧‧‧第四二極體
D5‧‧‧第五二極體
EM‧‧‧接收器部件
K1‧‧‧第一連接接觸部
K2‧‧‧第二連接接觸部
L‧‧‧光
OB‧‧‧表面
OPK‧‧‧光電耦合器
OS‧‧‧上側
R‧‧‧邊緣
S‧‧‧發送器部件
SD‧‧‧發送二極體
SP‧‧‧鏡
ST1‧‧‧第一堆疊
ST2‧‧‧第二堆疊
STU‧‧‧階台
SUB‧‧‧基板
T1‧‧‧第一穿隧二極體
T2‧‧‧第二穿隧二極體
T3‧‧‧第三穿隧二極體
T4‧‧‧第四穿隧二極體
VQ‧‧‧可擴展電壓源
VQ1‧‧‧電源電壓
VQ2‧‧‧電源電壓
VSUP1‧‧‧第一電壓連接端
VSUP2‧‧‧第二電壓連接端
以下參照附圖詳細闡述本發明。在此以同樣的附圖標記表示同類組件。所展示之實施是高度示意性的，亦即距離以及橫向延展及縱向延展不是按比例的，只要不另外說明，互相亦不具有可推導之幾何關係。附圖展示：圖1：光電耦合器之根據本發明之第一實施，該光電耦合器具有可擴展之電壓源，該電壓源具有一個堆疊；圖2：光電耦合器之第二實施，該光電耦合器具有可擴展的電壓源，該電壓源具有多個堆疊；圖3：具有總共5個二極體的實施，此等二極體具有不同厚度之吸收區域；圖4：具有環繞台階形之階台之堆疊；圖5a：接收及發送器部件縱向配置之橫截面圖；圖5b：接收及發送器部件橫向配置之橫截面圖。
圖1之圖式展示第一實施之示意圖，該第一實施具有光電耦合器OPK，該光電耦合器OPK具有發送器部件S及接收器部件EM，該發送器部件S具有發送二極體SD。接收器部件EM具有可擴展電壓源VQ及分析處理單元AWE。顯然，術語「可擴展」涉及整個堆疊之電源電壓之幅值。發送二極體SD之光L藉助鏡SP被引導到可擴展電壓源VQ之 表面上。顯然，光電耦合器OPK在此是有殼的，亦即，該構件整合於共同殼體中。
電壓源VQ具有第一堆疊ST1，該第一堆疊ST1具有上側及下側，該第一堆疊ST1具有二極體，此等二極體之數量N等於3。該第一堆疊ST1具有由第一二極體D1及第一穿隧二極體T1及第二二極體D2及第二穿隧二極體T2及第三二極體D3組成的串聯電路。在第一堆疊ST1之上側構造有第一電壓連接端VSUP1並且在第一堆疊ST1之下側構造有第二電壓連接端VSUP2。電源電壓在此由單個二極體D1至D3之部分電壓組成。為此，第一堆疊ST1經受來自發送二極體SD之光子流L。只要發送二極體SD發出經調變之光子流，就在第一堆疊ST1中亦調變第一堆疊ST1之電源電壓VQ1。
包括二極體D1至D3和穿隧二極體T1和T2的第一堆疊ST1實施成單片構造的塊。分析處理單元AWE包括未展示的整合電路。發送器部件S和接收器部件EM分別具有兩個彼此電流隔離的連接端。
在圖2中展圖式1之光電耦合器之另一種實施，該實施具有第一堆疊ST1及第二堆疊ST2之有利相互串聯。以下只闡述與圖1之圖式的不同。第二堆疊ST2如第一堆疊ST1那樣具有由三個二極體與構造在此等二極體之間的穿隧二極體組成之串聯電路。兩個堆疊ST1及ST2互相串聯地連接，使得只要兩個堆疊ST1及ST2經受發送二極體SD之光子流L，則第一堆疊ST1之電源電壓VQ1和第二堆疊ST2之電源電壓VQ2相加。接收器部件EM在此不具有分析處理電路，使得第一電壓連接端VSUP1及第二電壓連接端VSUP3直接向外引導。
在一種未展示之實施中，兩個堆疊ST1和ST2互相具有不同數量的分別以串聯電路連接之二極體。在另一種未展示之實施中，至少第一堆疊ST1及/或第二堆疊ST2具有三個以上以串聯電路連接之二極體。由此可擴展電壓源VQ之電壓幅值。數量N較佳處於4至8之間的範 圍內。
在圖3之圖式中展示半導體層有利地相互串聯成第一堆疊ST1之實施。以下只闡述與圖1之圖式的不同。第一堆疊ST1總共包括五個串聯連接之部分電壓源，該部分電壓源構造為二極體D1至D5。光L照射到第一二極體D1之表面OB上。該表面OB被幾乎或完全照亮。在兩個彼此相繼的二極體D1-D5之間分別構造有一個穿隧二極體T1-T4。隨著每一二極體D1至D5離表面OB之距離增大，吸收區之厚度亦增大，使得最下二極體D5具有最厚之吸收區域。第一堆疊ST1之總厚度總共小於等於12μm。在最下面之二極體D5之下面構造有基板SUB。
在圖4之圖式中展示半導體層有利地相互串聯成第一堆疊ST1之實施，該第一堆疊ST1具有環繞台階形之階台。以下只闡述與圖3之圖式的不同。在第一堆疊ST1之表面OB上，在邊緣R上構造有金屬的第一連接接觸部K1。該第一連接接觸部K1與第一電壓連接端VSUP1連接(未展示)。基板SUB具有上側OS，其中，基板SUB之上側OS材料鎖合地與最下面的、亦即第五二極體D5連接。在此顯然，在將第五二極體配置於基板上並且使其材料鎖合地與基板之上側OS連接之前，在基板上磊晶地製造薄的核化層(Nukleationsschicht)及緩衝層(Pufferschicht)。基板之上側OS具有比第一堆疊ST1之下側處的面更大的表面。由此形成環繞之階台STU。該階台STU之邊緣與該階台之第一堆疊ST1之直接相鄰側面距離大於5μm且小於500μm，以附圖標記STU之長度展示。在基板SUB之下側處構造有整面的金屬第二接觸部K2。該第二連接接觸部K2與第二電壓連接端VSUP2連接(未展示)。
在圖5a及5b之圖式中展示發送器部件S及接收器部件EM之縱向配置的橫截面圖以及發送器部件S和接收器部件EM之橫向配置的橫截面圖，其中，分別具有第一堆疊ST1之發送器部件S包括環繞台階形之階台。以下只闡述與在以上圖中所展示之實施的不同。可見，在縱向 配置之情況下鏡SP為不必要的。顯然，以所展示之光L之平行光線僅展示光L之原理上之走向。發送器部件之光通常具有發散之光束。

Claims (16)

  1. 一種光電耦合器(OPK)，該光電耦合器具有：一發送器部件(S)及一接收器部件(EM)，其中，該發送器部件(S)及該接收器部件(EM)互相電流隔離並且互相光學耦合，並且該兩個部件(S，EM)經整合於共同殼體中，該接收器部件(EM)包括數量為N的互相串聯連接之部分電壓源，該等部分電壓源經構造為半導體二極體，其中，該等部分電壓源中之每一者具有一個半導體二極體(D1，D2，D3，D4，D5)，該等半導體二極體(D1，D2，D3，D4，D5)具有p-n接面，該等半導體二極體(D1，D2，D3，D4，D5)具有p摻雜之吸收層，該等半導體二極體(D1，D2，D3，D4，D5)具有n吸收層，其中，該等n吸收層被n摻雜之鈍化層鈍化，該等n摻雜之鈍化層具有比該等n吸收層之帶隙更大的帶隙，每一部分電壓源之部分電源電壓互相具有小於20%之偏差，在每兩個彼此相繼之部分電壓源之間構造有一個穿隧二極體(T1，T2，T3，T4)，其中，該等穿隧二極體(T1，T2，T3，T4)具有多個半導體層，該等半導體層具有比p/n吸收層之帶隙更大的帶隙，具有更大帶隙之半導體層分別由具有經改變之化學計量及/或與該等半導體二極體(D1，D2，D3，D4，D5)之p/n吸收層不同之元素成分之材料組成，該等部分電壓源及該穿隧二極體(T1，T2，T3，T4)單片地整合在一起並且共同構成具有一上側及一下側之一第一堆疊(ST1)，該等部分電壓源之數量N大於等於3， 在該第一堆疊(ST1)上，光(L)在該上側處入射到該第一堆疊(ST1)之一表面(OB)上，並且在該堆疊上側處經照射之該表面(OB)之一尺寸大體上或者至少對應於該第一堆疊(ST1)在上側處之一面之一尺寸，該第一堆疊(ST1)具有小於12μm之總厚度，在300K之情況下，只要該第一堆疊(ST1)被光(L)照射，則該第一堆疊(ST1)具有大於3伏之電源電壓(VQ1)，其中，在從該第一堆疊(ST1)之上側向該堆疊之下側之光入射方向上，半導體二極體之p吸收層及n吸收層之總厚度從最上面之二極體(D1)朝向最下面之二極體(D3-D5)增加，該半導體二極體(D1，D2，D3，D4)之每一p吸收層被p摻雜之一鈍化層鈍化，該p摻雜之鈍化層具有比該p吸收層之一帶隙更大之帶隙，並且該電壓源在該堆疊之下側附近具有環繞的、台階形邊緣。
  2. 如請求項1之光電耦合器(OPK)，其中該接收器部件(EM)之該等部分電壓源之該等部分電源電壓互相具有小於10%之偏差，及/或該接收器部件(EM)之該等半導體二極體(D1，D2，D3，D4，D5)分別具有相同之半導體材料。
  3. 如前述請求項1或2之光電耦合器(OPK)，其中該第一堆疊(ST1)經配置於基板(SUB)上，並且該基板(SUB)包括半導體材料。
  4. 如前述請求項1或2之光電耦合器(OPK)，其中該第一堆疊(ST1)具有小於2mm2之基面。
  5. 如前述請求項1或2之光電耦合器(OPK)，其中在該接收器部件(EM)之該第一堆疊(ST1)之上側上構造有一第一電壓連接端(VSUP1)，該第一電壓連接端(VSUP1)作為該邊緣附近之一環繞金屬接觸部或者作為該邊緣(R)處之一單個接觸面(K1)。
  6. 如前述請求項3之光電耦合器(OPK)，其中在該接收器部件(EM) 之該第一堆疊(ST1)之下側上構造有一第二電壓連接端(VSUP2)。
  7. 如請求項6之光電耦合器(OPK)，其中該接收器部件(EM)之該第二電壓連接端(VSUP2)構造成穿過該基板。
  8. 如前述請求項1或2之光電耦合器(OPK)，其中在該接收器部件(EM)中構造有一第二堆疊(ST2)，並且該第一堆疊(ST1)及該第二堆疊(ST2)共置於一共同載體上，並且該兩個堆疊(ST1，ST2)互相串聯地連接，使得該第一堆疊(ST1)之一電源電壓(VQ1)及該第二堆疊(ST2)之一電源電壓(VQ2)相加。
  9. 如前述請求項1或2之光電耦合器(OPK)，其中在該接收器部件(EM)之各別二極體之p吸收層與n吸收層之間構造有一本徵層。
  10. 如前述請求項3之光電耦合器(OPK)，其中該接收器部件(EM)之該半導體二極體及/或該基板由III-V族材料組成。
  11. 如前述請求項3之光電耦合器(OPK)，其中該接收器部件(EM)之該基板包括鍺或砷化鎵。
  12. 如前述請求項1或2之光電耦合器(OPK)，其中一分析處理電路(AWE)經整合於該殼體中，並且該電壓源與該分析處理電路(AWE)存在電有效連接。
  13. 如前述請求項1或2之光電耦合器(OPK)，其中在該接收器部件(EM)之該堆疊(ST1)之最下面的一半導體二極體下方構造有一半導體鏡。
  14. 如前述請求項1或2之光電耦合器(OPK)，其中該接收器部件(EM)之該堆疊(ST1)之該半導體層同時包括含有砷化物之層及含有磷化物之層。
  15. 如前述請求項1或2之光電耦合器(OPK)，其中該邊緣之一棱邊與該堆疊之直接相鄰之一側面距離至少5μm且最大500μm。
  16. 如前述請求項1或2之光電耦合器(OPK)，其中該第一堆疊(ST1)具有小於1mm2之基面。
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