TW201638771A - 具有多個獨立微控制器之微控制器裝置 - Google Patents

具有多個獨立微控制器之微控制器裝置 Download PDF

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Publication number
TW201638771A
TW201638771A TW105107700A TW105107700A TW201638771A TW 201638771 A TW201638771 A TW 201638771A TW 105107700 A TW105107700 A TW 105107700A TW 105107700 A TW105107700 A TW 105107700A TW 201638771 A TW201638771 A TW 201638771A
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TW
Taiwan
Prior art keywords
microcontroller
pins
pin
memory
microcontrollers
Prior art date
Application number
TW105107700A
Other languages
English (en)
Chinese (zh)
Inventor
布萊恩 克里斯
衣格 汪珍達
麥克 凱瑟伍德
布萊恩 佛
傑森 托勒夫森
吉姆 佩平
戴維 米奇
湯馬士 斯波里爾
艾力克斯 杜麥斯
克朗 維基
文森 榭爾德
Original Assignee
微晶片科技公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 微晶片科技公司 filed Critical 微晶片科技公司
Publication of TW201638771A publication Critical patent/TW201638771A/zh

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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • G06F13/1673Details of memory controller using buffers
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/22Means for limiting or controlling the pin/gate ratio
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/364Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/382Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/167Interprocessor communication using a common memory, e.g. mailbox
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Microcomputers (AREA)
  • Multi Processors (AREA)
TW105107700A 2015-03-13 2016-03-11 具有多個獨立微控制器之微控制器裝置 TW201638771A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201562133186P 2015-03-13 2015-03-13
US15/065,027 US10002103B2 (en) 2015-03-13 2016-03-09 Low-pin microcontroller device with multiple independent microcontrollers

Publications (1)

Publication Number Publication Date
TW201638771A true TW201638771A (zh) 2016-11-01

Family

ID=56888472

Family Applications (1)

Application Number Title Priority Date Filing Date
TW105107700A TW201638771A (zh) 2015-03-13 2016-03-11 具有多個獨立微控制器之微控制器裝置

Country Status (7)

Country Link
US (1) US10002103B2 (enExample)
EP (1) EP3268869B1 (enExample)
JP (1) JP2018512662A (enExample)
KR (1) KR20170127420A (enExample)
CN (1) CN107430564B (enExample)
TW (1) TW201638771A (enExample)
WO (1) WO2016149086A2 (enExample)

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TWI823680B (zh) * 2022-11-18 2023-11-21 新唐科技股份有限公司 資料傳輸裝置和方法

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US9921982B2 (en) * 2014-06-05 2018-03-20 Microchip Technology Incorporated Device and method to assign device pin ownership for multi-processor core devices
US9921988B2 (en) * 2014-06-05 2018-03-20 Microchip Technology Incorporated Device and method to assign device pin functionality for multi-processor core devices
US10002102B2 (en) * 2015-03-13 2018-06-19 Microchip Technology Incorporated Low-pin microcontroller device with multiple independent microcontrollers
US10352998B2 (en) 2017-10-17 2019-07-16 Microchip Technology Incorporated Multi-processor core device with MBIST
GB201909270D0 (en) * 2019-06-27 2019-08-14 Nordic Semiconductor Asa Microcontroller system with GPIOS
US11397809B2 (en) * 2019-09-23 2022-07-26 Stmicroelectronics International N.V. Protection scheme for sensor segmentation in virtualization application
DE102020205978A1 (de) * 2020-05-12 2021-11-18 Robert Bosch Gesellschaft mit beschränkter Haftung System aus galvanisch getrennten, datengekoppelten Mikrocontrollern
CN111930676B (zh) * 2020-09-17 2020-12-29 湖北芯擎科技有限公司 多处理器间的通信方法、装置、系统及存储介质
TWI769094B (zh) * 2021-10-07 2022-06-21 瑞昱半導體股份有限公司 多晶粒封裝

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI823680B (zh) * 2022-11-18 2023-11-21 新唐科技股份有限公司 資料傳輸裝置和方法
US12475063B2 (en) 2022-11-18 2025-11-18 Nuvoton Technology Corporation Data transmission device with FIFO circuits for reading and writing operations and method

Also Published As

Publication number Publication date
CN107430564B (zh) 2020-09-15
WO2016149086A2 (en) 2016-09-22
WO2016149086A3 (en) 2016-11-03
EP3268869A2 (en) 2018-01-17
US10002103B2 (en) 2018-06-19
CN107430564A (zh) 2017-12-01
JP2018512662A (ja) 2018-05-17
EP3268869B1 (en) 2024-12-25
KR20170127420A (ko) 2017-11-21
US20160267047A1 (en) 2016-09-15

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