KR20170127420A - 다수의 독립적인 마이크로컨트롤러들을 구비한 마이크로컨트롤러 디바이스 - Google Patents

다수의 독립적인 마이크로컨트롤러들을 구비한 마이크로컨트롤러 디바이스 Download PDF

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KR20170127420A
KR20170127420A KR1020177023569A KR20177023569A KR20170127420A KR 20170127420 A KR20170127420 A KR 20170127420A KR 1020177023569 A KR1020177023569 A KR 1020177023569A KR 20177023569 A KR20177023569 A KR 20177023569A KR 20170127420 A KR20170127420 A KR 20170127420A
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KR
South Korea
Prior art keywords
microcontroller
pins
system bus
interface
master
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KR1020177023569A
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English (en)
Korean (ko)
Inventor
브라이언 크리스
이고르 우제우다
마이크 캐서우드
브라이언 폴
제이슨 탈리프선
짐 페핑
데이브 미키
토마스 스포러
알렉스 듀마이스
캘럼 윌키
빈센트 쉬어드
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마이크로칩 테크놀로지 인코포레이티드
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Publication of KR20170127420A publication Critical patent/KR20170127420A/ko
Withdrawn legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/167Interprocessor communication using a common memory, e.g. mailbox
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/22Means for limiting or controlling the pin/gate ratio
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • G06F13/1673Details of memory controller using buffers
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/364Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/382Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • Y02B60/1228
    • Y02B60/1235
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Microcomputers (AREA)
  • Multi Processors (AREA)
KR1020177023569A 2015-03-13 2016-03-11 다수의 독립적인 마이크로컨트롤러들을 구비한 마이크로컨트롤러 디바이스 Withdrawn KR20170127420A (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201562133186P 2015-03-13 2015-03-13
US62/133,186 2015-03-13
US15/065,027 US10002103B2 (en) 2015-03-13 2016-03-09 Low-pin microcontroller device with multiple independent microcontrollers
US15/065,027 2016-03-09
PCT/US2016/021977 WO2016149086A2 (en) 2015-03-13 2016-03-11 Microcontroller device with multiple independent microcontrollers

Publications (1)

Publication Number Publication Date
KR20170127420A true KR20170127420A (ko) 2017-11-21

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020177023569A Withdrawn KR20170127420A (ko) 2015-03-13 2016-03-11 다수의 독립적인 마이크로컨트롤러들을 구비한 마이크로컨트롤러 디바이스

Country Status (7)

Country Link
US (1) US10002103B2 (enExample)
EP (1) EP3268869B1 (enExample)
JP (1) JP2018512662A (enExample)
KR (1) KR20170127420A (enExample)
CN (1) CN107430564B (enExample)
TW (1) TW201638771A (enExample)
WO (1) WO2016149086A2 (enExample)

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US9921982B2 (en) * 2014-06-05 2018-03-20 Microchip Technology Incorporated Device and method to assign device pin ownership for multi-processor core devices
US9921988B2 (en) * 2014-06-05 2018-03-20 Microchip Technology Incorporated Device and method to assign device pin functionality for multi-processor core devices
US10002102B2 (en) * 2015-03-13 2018-06-19 Microchip Technology Incorporated Low-pin microcontroller device with multiple independent microcontrollers
US10352998B2 (en) 2017-10-17 2019-07-16 Microchip Technology Incorporated Multi-processor core device with MBIST
GB201909270D0 (en) * 2019-06-27 2019-08-14 Nordic Semiconductor Asa Microcontroller system with GPIOS
US11397809B2 (en) * 2019-09-23 2022-07-26 Stmicroelectronics International N.V. Protection scheme for sensor segmentation in virtualization application
DE102020205978A1 (de) * 2020-05-12 2021-11-18 Robert Bosch Gesellschaft mit beschränkter Haftung System aus galvanisch getrennten, datengekoppelten Mikrocontrollern
CN111930676B (zh) * 2020-09-17 2020-12-29 湖北芯擎科技有限公司 多处理器间的通信方法、装置、系统及存储介质
TWI769094B (zh) * 2021-10-07 2022-06-21 瑞昱半導體股份有限公司 多晶粒封裝
TWI823680B (zh) 2022-11-18 2023-11-21 新唐科技股份有限公司 資料傳輸裝置和方法

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JPH0731661B2 (ja) * 1986-10-20 1995-04-10 株式会社日立製作所 プロセツサ
JPS62221062A (ja) * 1986-03-20 1987-09-29 Nec Corp シングルチツプマイクロコンピユ−タ
JP2846536B2 (ja) * 1992-12-02 1999-01-13 株式会社日立製作所 マルチプロセッサ
JP2551342B2 (ja) * 1993-07-29 1996-11-06 日本電気株式会社 デュアル マイクロプロセッサ装置
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US7089344B1 (en) * 2000-06-09 2006-08-08 Motorola, Inc. Integrated processor platform supporting wireless handheld multi-media devices
JP2002032355A (ja) * 2000-07-17 2002-01-31 Fujitsu Ltd マイクロコンピュータ
JP2002132745A (ja) * 2000-10-27 2002-05-10 Matsushita Electric Ind Co Ltd ディジタル信号処理装置
US6907480B2 (en) * 2001-07-11 2005-06-14 Seiko Epson Corporation Data processing apparatus and data input/output apparatus and data input/output method
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Also Published As

Publication number Publication date
CN107430564B (zh) 2020-09-15
WO2016149086A2 (en) 2016-09-22
WO2016149086A3 (en) 2016-11-03
EP3268869A2 (en) 2018-01-17
US10002103B2 (en) 2018-06-19
CN107430564A (zh) 2017-12-01
TW201638771A (zh) 2016-11-01
JP2018512662A (ja) 2018-05-17
EP3268869B1 (en) 2024-12-25
US20160267047A1 (en) 2016-09-15

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PA0105 International application

Patent event date: 20170823

Patent event code: PA01051R01D

Comment text: International Patent Application

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination