TW201611249A - 薄膜電晶體基板 - Google Patents

薄膜電晶體基板 Download PDF

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TW201611249A
TW201611249A TW103131121A TW103131121A TW201611249A TW 201611249 A TW201611249 A TW 201611249A TW 103131121 A TW103131121 A TW 103131121A TW 103131121 A TW103131121 A TW 103131121A TW 201611249 A TW201611249 A TW 201611249A
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thin film
insulating layer
film transistor
layer
substrate
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TW103131121A
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TWI570899B (zh
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趙光品
朱夏青
孫銘謙
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群創光電股份有限公司
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Priority to TW103131121A priority Critical patent/TWI570899B/zh
Priority to JP2014005908U priority patent/JP3195570U/ja
Priority to US14/541,105 priority patent/US9449989B2/en
Priority to KR1020150112258A priority patent/KR102569301B1/ko
Publication of TW201611249A publication Critical patent/TW201611249A/zh
Priority to US15/231,749 priority patent/US10192943B2/en
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Publication of TWI570899B publication Critical patent/TWI570899B/zh

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    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/121Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
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    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
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    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
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    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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    • H01L27/127Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
    • H01L27/1274Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
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    • H10K59/1201Manufacture or treatment

Abstract

本發明係有關於一種薄膜電晶體基板,包括:一基板;以及複數薄膜電晶體單元,設置於該基板上且分別包括:一主動層,設置於該基板上且該主動層之材料為多晶矽;一絕緣層,設置於該主動層上;以及一源極及一汲極,設置於該絕緣層上;其中該絕緣層包括一第一區域及一第二區域,其中該第一區域對應該主動層,該第二區域對應該主動層以外之區域,且該第一區域之粗糙度大於該第二區域之粗糙度。

Description

薄膜電晶體基板
本發明係關於一種薄膜電晶體基板,尤指一種能達到同時增加畫素之儲存電容且絕緣層之接觸面積之薄膜電晶體基板。
隨著顯示器技術不斷進步,所有的顯示裝置均朝體積小、厚度薄、重量輕等趨勢發展,故目前市面上主流之顯示器裝置已由以往之陰極射線管發展成平面顯示器,如液晶顯示裝置或有機發光二極體顯示裝置等。其中,液晶顯示裝置或有機發光二極體顯示裝置可應用的領域相當多,舉凡日常生活中使用之手機、筆記型電腦、攝影機、照相機、音樂播放器、行動導航裝置、電視等顯示裝置,大多數均使用該些顯示面板。
雖然液晶顯示裝置或有機發光二極體顯示裝置已為市面上常見之顯示裝置,特別是液晶顯示裝置的技術更是相當成熟,但隨著顯示裝置不斷發展且消費者對顯示裝置之顯示品質要求日趨提高,各家廠商無不極力發展出具有更高顯示品質的顯示裝置。其中,薄膜電晶體基板之結構,也為影響顯示品質之因素之一。
有鑑於此,即便目前液晶顯示裝置或有機發光 二極體顯示裝置已為市面上常見之顯示裝置,但仍需針對薄膜電晶體基板提出改良以期能發展出具有更佳顯示品質之顯示裝置,以便符合消費者需求。
本發明之主要目的係在提供一種薄膜電晶體 基板,俾能達到同時增加畫素之儲存電容且絕緣層之接觸面積的目的。
為達成上述目的,本發明之薄膜電晶體基板, 包括:一基板;以及複數薄膜電晶體單元,設置於該基板上且分別包括:一主動層,設置於該基板上且該主動層之材料為多晶矽;一絕緣層,設置於該主動層上;以及一源極及一汲極,設置於該絕緣層上;其中該絕緣層包括一第一區域及一第二區域,其中該第一區域對應該主動層,該第二區域對應該主動層以外之區域,且該第一區域之粗糙度大於該第二區域之粗糙度。
於本發明之薄膜電晶體基板中,該些薄膜電晶 體單元更分別包括一金屬層,設置於該絕緣層上,且該金屬層具有複數個第一凸起。
於本發明之薄膜電晶體基板中,該金屬層具有 一第一厚度,該些第一凸起距離該金屬層之一平均表面的高度與該第一厚度比為10%~30%。
於本發明之薄膜電晶體基板中,該絕緣層具有 複數個第二凸起。
於本發明之薄膜電晶體基板中,該絕緣層具有 一第二厚度,該些第二凸起距離該絕緣層之一平均表面的高度與該第二厚度比為30%~70%。
於本發明之薄膜電晶體基板中,該絕緣層具有 複數個第二凸起,且至少部分該些第一凸起對應該些第二凸起。
於本發明之薄膜電晶體基板中,該主動層具有一側邊,該絕緣層對應該側邊處之曲率小於該側邊之曲率。
此外,本發明更提供另一薄膜電晶體基板,包括:一基板;以及複數薄膜電晶體單元,設置於該基板上且分別包括:一主動層,設置於該基板上且該主動層之材料為多晶矽;一絕緣層,設置於該主動層上;以及一源極及一汲極,設置於該絕緣層上;其中,該絕緣層具有複數個第二凸起。
於本發明之薄膜電晶體基板中,該絕緣層具有一第二厚度,該些第二凸起距離該絕緣層之一平均表面的高度與該第二厚度比為30%~70%。
於本發明之薄膜電晶體基板中,該些薄膜電晶體單元更分別包括一金屬層,設置於該絕緣層上,且該金屬層具有複數個第一凸起。
於本發明之薄膜電晶體基板中,該金屬層具有一第一厚度,該些第一凸起距離該金屬層之一平均表面的高度與該第一厚度比為10%~30%。
於本發明之薄膜電晶體基板中,至少部分該金屬層之該些第一凸起對應該絕緣層之該些第二凸起。
於本發明之薄膜電晶體基板中,該絕緣層包括 一第一區域及一第二區域,其中該第一區域對應該主動層,該第二區域對應該主動層以外之區域,其中該第一區域之粗糙度大於該第二區域之粗糙度。
於本發明之薄膜電晶體基板中,該主動層具有 一側邊,該絕緣層對應該側邊處之曲率小於該側邊之曲率。
於本發明前述之薄膜電晶體基板中,藉由將絕 緣層之表面設計成具有第二凸起之凹凸起伏形狀,而可增加與絕緣層接觸之其他層別之接觸面積,使得絕緣層與其他層別之附著力提升,而減少兩者間有剝離的情形發生。 此外,於本發明前述之薄膜電晶體基板中,更藉由將絕緣層上之金屬層設計成具有第一凸起之凹凸起伏形狀,而可增加金屬層的面積,而使得金屬層能具有較高的電容值,進而增加畫素的儲存電容。
11‧‧‧第一基板
12‧‧‧第二基板
101‧‧‧緩衝層
103‧‧‧主動層
1032‧‧‧側邊
104‧‧‧第一絕緣層
105‧‧‧第二絕緣層
111‧‧‧第一金屬層
1111‧‧‧第一凸起
112‧‧‧第三絕緣層
114‧‧‧第四絕緣層
115‧‧‧保護層
115a‧‧‧保護層開口
116‧‧‧第二金屬層
117‧‧‧平坦層
117a‧‧‧平坦層開口
13‧‧‧封裝膠
14‧‧‧支撐元件
15‧‧‧有機發光二極體單元
151‧‧‧第一電極
152‧‧‧有機發光層
153‧‧‧第二電極
16‧‧‧畫素界定層
161‧‧‧畫素開口
1041,1051,1121,1141‧‧‧第二凸起
104a,105a,112a,114a,111a‧‧‧平均表面
1042,1052,1122,1142‧‧‧斜面
A‧‧‧顯示區
B‧‧‧非顯示區
C‧‧‧電容區
R1‧‧‧第一區域
R2‧‧‧第二區域
T1‧‧‧第一厚度
T2,T3,T4,T5‧‧‧第二厚度
H1,H2,H3,H4,H5‧‧‧高度
TFT1,TFT2‧‧‧薄膜電晶體元件區
圖1係本發明一較佳實施例之有機發光二極體顯示裝置剖面示意圖。
圖2係本發明一較佳實施例之有機發光二極體顯示裝置之電路佈線示意圖。
圖3係本發明一較佳實施例之有機發光二極體顯示裝置之薄膜電晶體基板之剖面示意圖。
圖4係本發明一較佳實施例之有機發光二極體顯示裝置之薄膜電晶體基板之部分剖面示意圖。
圖5係本發明一較佳實施例之有機發光二極體顯示裝置之薄膜電晶體基板之部分剖面示意圖。
以下係藉由特定的具體實施例說明本發明之 實施方式,熟習此技藝之人士可由本說明書所揭示之內容輕易地了解本發明之其他優點與功效。本發明亦可藉由其他不同的具體實施例加以施行或應用,本說明書中的各項細節亦可針對不同觀點與應用,在不悖離本創作之精神下進行各種修飾與變更。
圖1係本發明一較佳實施例之有機發光二極體 顯示裝置剖面示意圖。於有機發光二極體顯示裝置之製作過程中,先提供一第一基板11及一第二基板12。其中,第一基板11上設置有一有機發光二極體單元15及一畫素界定層16,其中每一畫素界定層16係設於兩相鄰之有機發光二極體單元15間。同時,第二基板12上則設置有複數支撐元件14,並於第二基板12之邊緣先形成有一封裝膠13(於本實施例中,為一玻璃膠),且封裝膠13係透過點膠及加熱燒結製程接合於第二基板12上。接著,將第一基板11及第二基板12進行對組,其中第二基板12上之支撐元件14係對應於畫素界定層16之未形成有畫素開口161之區域。而後,以雷射加熱的方式,使封裝膠13與第一基板11進行接合,而製得本實施例之有機發光二極體顯示裝置。
於本實施例中,第一基板11及第二基板12均 為玻璃基板。此外,本實施例之有機發光二極體顯示面板包括一顯示區A及一非顯示區B,而所謂之非顯示區B即走線分布之區域。再者,於本實施例中,每一有機發光二極體單元15可分別發出紅光、綠光及藍光,但其他實施例並不僅限於此;舉例來說,有機發光二極體單元15可為一白光有機發光二極體單元,於此情形下,第一基板11或第二基板12之其中一側更需設置一彩色濾光元件(圖未示)。
圖2係本實施例之有機發光二極體顯示裝置之 一畫素單元之電路佈線示意圖。如圖2所示,於本實施例之有機發光二極體顯示裝置中,每一畫素單元分別包括:一掃描線、一資料線、一電容線、一電源供給線、一開關薄膜電晶體元件(如圖2之開關TFT所示)、一驅動薄膜電晶體元件(如圖2之驅動TFT所示)、一儲存電容、及一分別與第一電極及第二電極極連接之有機發光二極體元件(如圖2之OLED所示)。
圖3係本實施例之有機發光二極體顯示裝置之 薄膜電晶體基板之剖面示意圖。請同時參照圖1及圖3,本實施例之薄膜電晶體基板包括:一第一基板11及一與第一基板11相對設置之第二基板12。於本實施例中,薄膜電晶體基板上之薄膜電晶體元件係為低溫多晶矽薄膜電晶體。 如圖3所示,於圖1之顯示區A中,首先,提供一第一基板11,其上方依序設置有一緩衝層101,而於緩衝層101更形成有一主動層103,其係由非晶矽雷射退火後所形成之多晶矽層。接著,於第一基板11上依序形成一第一絕緣層 104、一第二絕緣層105、一第一金屬層111、一第三絕緣層112、及一第四絕緣層114。其中,位於薄膜電晶體元件區TFT1,TFT2中之第一金屬層111係作為一閘極;而第一絕緣層104及第二絕緣層105係分別作為一閘極絕緣層,其材料為本技術領域常用之絕緣層材料,如氧化矽、氮化矽等;同樣的,第三絕緣層112及第四絕緣層114以可使用前述本技術領域常用之絕緣層材料。而後,再於第四絕緣層114上形成一第二金屬層116。其中,位於薄膜電晶體元件區TFT1,TFT2中之第二金屬層116更貫穿第三絕緣層112及第四絕緣層114,且選擇性的貫穿第一絕緣層104及第二絕緣層10,而做為源極及汲極,以與主動層103電性連接。如此,則完成本實施例之薄膜電晶體基板。於本實施例中,薄膜電晶體基板包含有兩個薄膜電晶體元件區TFT1,TFT2,其中薄膜電晶體元件區TFT1係對應於圖2之開關TFT,薄膜電晶體元件區TFT2則對應於圖2之驅動TFT。此外,於本實施例中,除了薄膜電晶體元件區TFT1,TFT2外,更同時形成一電容區C,其對應於圖2之儲存電容。
請同時參考圖1及圖3,於完成薄膜電晶體基板後,再依序形成保護層115、平坦層117、一第一電極151及畫素界定層16,其中第一電極151除了設置於平坦層117上更設置於平坦層117之平坦層開口117a及保護層115之保護層開口115a中以與第二金屬層116電性連接,且畫素界定層16更設有一畫素開口161。而後,於畫素界定層16與第一電極151上及畫素開口161中依序層疊一有機發光層 152及一第二電極153,則完成本實施例之有機發光單元15。據此,如圖1及圖3所示,本實施例之有機發光單元15係包括依序層疊之一第一電極151、一有機發光層152及一第二電極153,且第一電極151係與第二金屬層116電性連接。此外,畫素界定層16係設於第一電極151與有機發光層152間,且透過畫素界定層16之畫素開口161以定義出光區域。
在此,第一金屬層111及第二金屬層116係作 為線路用。例如,如圖3所示,第一金屬層111在此係作為薄膜電晶體開關元件之閘極;而第二金屬層116在此係作為薄膜電晶體開關元件之源極及汲極;且同由第一金屬層111所形成之閘極及掃描線(圖未示)彼此係電性連接,而同由第二金屬層116所形成之源極與汲極及資料線(圖未示)彼此亦電性連接。此外,於本實施例中,第一金屬層111、第二金屬層116之材料可使用本技術領域常用之導電材料,如金屬、合金、金屬氧化物、金屬氮氧化物、或其他本技術領域常用之電極材料;且較佳為金屬材料。於本實施例中,第一金屬層111為鉬,而第二金屬層116為從第一基板11上依序層疊有Ti層、Al層及Ti層之複合金屬層。 此外,保護層115之材料可為本技術領域常用之絕緣層材料,如氧化矽、氮化矽等。
此外,於本實施例中,第一電極151可選用本 發明所屬技術領域已知之反射電極材料,而第二電極153可選用本發明所屬技術領域已知之透明電極或半透明電 極。其中,反射電極材料可為Ag、Ge、Al、Cu、Mo、Ti、Sn、AlNd、ACX、APC等;透明電極可為透明氧化物電極(TCO電極),如ITO電極或IZO電極;而半透明電極可為一金屬薄膜電極,如鎂銀合金薄膜電極、金薄膜電極、鉑薄膜電極、鋁薄膜電極等。此外,若需要,本發明第二電極153可選用透明電極與半透明電極之複合電極,如:TCO電極與鉑薄膜電極之複合電極。在此,僅以包含有第一電極151、有機發光層152及第二電極153之有機發光二極體元件作為舉例,但本發明並不限於此;其他本技術領域常用之有機發光二極體元件均可應用於本發明之有機發光二極體顯示面板中,例如:包括電子傳輸層、電子注入層、電洞傳輸層、電洞注入層、及其他可幫助電子電洞傳輸結合之層之有機發光二極體元件均可應用於本發明中。
圖4及圖5係本實施例之有機發光二極體顯示 裝置之薄膜電晶體基板之部分剖面示意圖,其中圖4及圖5分別為圖3中薄膜電晶體元件區TFT1,TFT2之部分放大示意圖。如圖4及圖5所示,於形成主動層103後,於分別形成第一絕緣層104、一第二絕緣層105、第一金屬層111、第三絕緣層112、及第四絕緣層114之製程中,可以本技術領域已知之沉積法形成一層後,利用圖案化光罩,以分別蝕刻該層,使所形成之第一絕緣層104、第二絕緣層105、第一金屬層111、第三絕緣層112、及第四絕緣層114分別具有凹凸起伏的表面。
更詳細而言,如圖4及圖5所示,第一絕緣層 104、第二絕緣層105、第三絕緣層112、及第四絕緣層114分別包括一第一區域R1及一第二區域R2,其中第一區域R1對應主動層103,第二區域R2對應主動層103以外之區域,且第一區域R1之粗糙度大於第二區域R2之粗糙度。
此外,如圖4及圖5所示,其中,第一絕緣層 104、第二絕緣層105、第三絕緣層112、及第四絕緣層114分別具有複數個第二凸起1041,1051,1121,1141。其中,每一第二凸起1041距離第一絕緣層104之一平均表面104a的高度分別介於500nm~1500nm;每一第二凸起1051距離第二絕緣層105之一平均表面105a的高度分別介於500nm~1500nm;每一第二凸起1121距離第三絕緣層112之一平均表面112a的高度分別介於500nm~1500nm;而每一第二凸起1141距離第四絕緣層114之一平均表面114a的高度分別介於500nm~1500nm。
再者,如圖4及圖5所示,第一絕緣層104具 有一第二厚度T2,第二凸起1041距離第一絕緣層104之一平均表面104a的高度H2與第二厚度T2比為30%~70%;第二絕緣層105具有一第二厚度T3,第二凸起1051距離第二絕緣層105之一平均表面105a的高度H3與第二厚度T3比為20%~50%;第三絕緣層112具有一第二厚度T4,第二凸起1121距離第三絕緣層112之一平均表面112a的高度H4與第二厚度T4比為10%~40%;而第四絕緣層114具有一第二厚度T5,第二凸起1141距離第四絕緣層114之一平均表面114a的高度H5與第二厚度T5比為5%~30%。
如前所述,於本實施例之薄膜電晶體基板中, 第一絕緣層、第二絕緣層、第三絕緣層及第四絕緣層之表面分別設計成具有第二凸起之凹凸起伏形狀,而可增加與絕緣層接觸之其他層別之接觸面積,使得絕緣層與其他層別之附著力提升,而減少兩者間有剝離的情形發生。
此外,如圖4及圖5所示,於本實施例之薄膜電晶體基板中,第一金屬層111亦具有凹凸起伏的表面。此外,第一金屬層111更可具有複數個第一凸起1111,其中每一第一凸起1111距離第一金屬層111之一平均表面111a的高度H1分別介於500nm~1500nm。再者,第一金屬層111具有一第一厚度T1,第一凸起1111距離第一金屬層111之一平均表面的高度H1與第一厚度T1比為10%~30%。
如前所述,於本實施例之薄膜電晶體基板中,金屬層係設計成具有第一凸起之凹凸起伏形狀,而可增加金屬層的面積,而使得金屬層能具有較高的電容值,進而增加畫素的儲存電容。
此外,如圖4及圖5所示,第一絕緣層104之第二凸起1041、第二絕緣層105之第二凸起1051、第三絕緣層112之第二凸起1121、第四絕緣層114之第二凸起1141、及第一金屬層111之第一凸起1111彼此間之位置可相互對應或不對應,端看設計之需求。
再者,如圖4及圖5所示,主動層103具有一側邊1032,第一絕緣層104之斜面1042、第二絕緣層105之鞋面1052、第三絕緣層112之斜面1122、及第四絕緣層 114之斜面1142之至少一者對應主動層103側邊1032處之曲率小於主動層103側邊1032之曲率。
於本發明中,所謂之「平均表面」係指樣本之最適表面,其可為用以計算整個樣本長度方向上中心線距離外型偏差算術平均或幾何平均之表面。
本發明前述實施例所製得之薄膜電晶體基板,除了可應用於有機二極體顯示裝置外,更可應用於液晶顯示裝置上。此外,本發明前述實施例所製得之顯示裝置,可應用於本技術領域已知之任何需要顯示螢幕之電子裝置上,如顯示器、手機、筆記型電腦、攝影機、照相機、音樂播放器、行動導航裝置、電視等。
上述實施例僅係為了方便說明而舉例而已,本發明所主張之權利範圍自應以申請專利範圍所述為準,而非僅限於上述實施例。
11‧‧‧第一基板
101‧‧‧緩衝層
103‧‧‧主動層
1032‧‧‧側邊
104‧‧‧第一絕緣層
105‧‧‧第二絕緣層
111‧‧‧第一金屬層
1111‧‧‧第一凸起
112‧‧‧第三絕緣層
114‧‧‧第四絕緣層
115‧‧‧保護層
116‧‧‧第二金屬層
117‧‧‧平坦層
1041,1051,1121,1141‧‧‧第二凸起
104a,105a,112a,114a,111a‧‧‧平均表面
1042,1052,1122,1142‧‧‧斜面
R1‧‧‧第一區域
R2‧‧‧第二區域
T1‧‧‧第一厚度
T2,T3,T4,T5‧‧‧第二厚度
H1,H2,H3,H4,H5‧‧‧高度

Claims (14)

  1. 一種薄膜電晶體基板,包括:一基板;以及複數薄膜電晶體單元,設置於該基板上且分別包括:一主動層,設置於該基板上且該主動層之材料為多晶矽;一絕緣層,設置於該主動層上;以及一源極及一汲極,設置於該絕緣層上;其中該絕緣層包括一第一區域及一第二區域,其中該第一區域對應該主動層,該第二區域對應該主動層以外之區域,且該第一區域之粗糙度大於該第二區域之粗糙度。
  2. 如申請專利範圍第1項所述之薄膜電晶體基板,其中該些薄膜電晶體單元更分別包括一金屬層,設置於該絕緣層上,且該金屬層具有複數個第一凸起。
  3. 如申請專利範圍第2項所述之薄膜電晶體基板,其中該金屬層具有一第一厚度,該些第一凸起距離該金屬層之一平均表面的高度與該第一厚度比為10%~30%。
  4. 如申請專利範圍第1項所述之薄膜電晶體基板,其中該絕緣層具有複數個第二凸起。
  5. 如申請專利範圍第4項所述之薄膜電晶體基板,其中該絕緣層具有一第二厚度,該些第二凸起距離該絕緣層之一平均表面的高度與該第二厚度比為30%~70%。
  6. 如申請專利範圍第2項所述之薄膜電晶體基板,其中該絕緣層具有複數個第二凸起,且至少部分該些第一凸起對應該些第二凸起。
  7. 如申請專利範圍第1項所述之薄膜電晶體基板,其中該主動層具有一側邊,該絕緣層對應該側邊處之曲率小於該側邊之曲率。
  8. 一種薄膜電晶體基板,包括:一基板;以及複數薄膜電晶體單元,設置於該基板上且分別包括:一主動層,設置於該基板上且該主動層之材料為多晶矽;一絕緣層,設置於該主動層上;以及一源極及一汲極,設置於該絕緣層上;其中,該絕緣層具有複數個第二凸起。
  9. 如申請專利範圍第8項所述之薄膜電晶體基板,其中該絕緣層具有一第二厚度,該些第二凸起距離該絕緣層之一平均表面的高度與該第二厚度比為30%~70%。
  10. 如申請專利範圍第8項所述之薄膜電晶體基板,其中該些薄膜電晶體單元更分別包括一金屬層,設置於該絕緣層上,且該金屬層具有複數個第一凸起。
  11. 如申請專利範圍第10項所述之薄膜電晶體基板,其中該金屬層具有一第一厚度,該些第一凸起距離該金屬層之一平均表面的高度與該第一厚度比為10%~30%。
  12. 如申請專利範圍第10項所述之薄膜電晶體基板,其中至少部分該金屬層之該些第一凸起對應該絕緣層之該些第二凸起。
  13. 如申請專利範圍第8項所述之薄膜電晶體基板,其中該絕緣層包括一第一區域及一第二區域,其中該第一區域對應該主動層,該第二區域對應該主動層以外之區域,其中該第一區域之粗糙度大於該第二區域之粗糙度。
  14. 如申請專利範圍第8項所述之薄膜電晶體基板,其中該主動層具有一側邊,該絕緣層對應該側邊處之曲率小於該側邊之曲率。
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US14/541,105 US9449989B2 (en) 2014-09-10 2014-11-13 Thin film transistor substrate
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