TW201503294A - 半導體晶片與具有該半導體晶片之層疊型半導體封裝 - Google Patents

半導體晶片與具有該半導體晶片之層疊型半導體封裝 Download PDF

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TW201503294A
TW201503294A TW102147343A TW102147343A TW201503294A TW 201503294 A TW201503294 A TW 201503294A TW 102147343 A TW102147343 A TW 102147343A TW 102147343 A TW102147343 A TW 102147343A TW 201503294 A TW201503294 A TW 201503294A
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Taiwan
Prior art keywords
semiconductor wafer
electrode
electrodes
heat dispersion
semiconductor
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TW102147343A
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English (en)
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TWI611522B (zh
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Jong-Hoon Kim
Jae-Hyun Son
Byoung-Do Lee
Kuk-Jin Chun
Woong-Kyu Choi
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Sk Hynix Inc
Univ Seoul Nat R & Db Found
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Publication of TW201503294A publication Critical patent/TW201503294A/zh
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Abstract

本發明乃關於一種半導體晶片與一具有該半導體晶片之層疊型半導體封裝。該半導體晶片包含一半導體晶片體，其係具有一由多數個焊墊構成之第一表面和一與該第一表面相對之第二表面；多數個第一和第二貫穿電極，其係通過該半導體晶片體且其一端與各焊墊電性連接；一在該半導體晶片體之第二表面上形成之絕緣層，使得該第一和第二貫穿電極之另一端不會被該絕緣層遮覆；及一在該絕緣層上形成之第一熱分散層。

Description

半導體晶片與具有該半導體晶片之層疊型半導體封裝
本發明係關於一種半導體封裝，特別是關於一種能輕易散熱的半導體晶片，及一種具有該半導體晶片的層疊型半導體封裝。
本專利申請案係以2013年7月5日在韓國智慧財產局申請之韓國專利申請案第10-2013-0078718號主張優先權，其係引用作為本說明書的揭示內容。
隨著電子產品變得越來越小且功能越來越強大，需要使更小的電子產品包括更多的晶片以滿足所需的功能。對於能夠實現更低成本、更高性能、微型化、及高密度封裝的半導體元件的需求增加，過去已發展出具有多晶片的封裝，例如多晶片封裝，以滿足該需求。
一個多晶片封裝在單一半導體封裝中包含了數片半導體晶片。基板貫通過孔(以下簡稱為TSV)技術提供了垂直的電性連接，將晶片的整個厚度從形成於該積體電路晶片的頂側半導體表面之其中一導電層級(例如，接觸層 級或後端之線金屬互連層級)擴展至該晶片的底側表面。相較於以習見焊線技術而形成的電路徑，此種垂直電路徑顯然較短。
所述各具體實施例一般關於一種能輕易散熱之半導體晶片與一種具有半導體晶片之層疊型半導體封裝。
在本發明之一具體實施例中，一半導體晶片包含：一具有一由數個焊墊構成之第一表面和一與該第一表面相對之第二表面之半導體晶片體和一與該第一表面相對之第二表面之半導體晶片體、數個通過該半導體晶片體且其一端係與各焊墊電性連接之第一和第二貫穿電極、一形成於該半導體晶片體之第二表面上方以致該第一和第二貫穿電極之另一端不被該絕緣層遮覆之絕緣層、及一形成於該絕緣層上方之第一熱分散層。
在本發明之一具體實施例中，一層疊型半導體封裝包含：一半導體晶片，係包含一具有一由數個焊墊構成之第一表面和一與該第一表面相對之第二表面之半導體晶片體、數個通過該半導體晶片體且其一端與各焊墊電性連接之第一和第二貫穿電極、一在該半導體晶片體之第二表面上方形成之絕緣層，使得該第一和第二貫穿電極之另一端不被該絕緣層遮覆、及一在該絕緣層上方形成之第一 熱分散層；至少一第二半導體晶片，係堆疊於該第一半導體晶片上方，並具有實質上與該第一半導體晶片一樣的配置方式；及複數個連接構件，係插置於該第一半導體晶片和該第二半導體晶片之間，介於二或多片堆疊之第二半導體晶片之間。
100‧‧‧第一半導體晶片
110‧‧‧半導體晶片本體
110a‧‧‧第一表面
110b‧‧‧第二表面
112‧‧‧焊墊
114‧‧‧鈍化層
120‧‧‧第一貫穿電極
122‧‧‧第二貫穿電極
124‧‧‧第三貫穿電極
140‧‧‧絕緣層
150a、150b‧‧‧熱分散層
160‧‧‧第一連接電極
162‧‧‧第二連接電極
164‧‧‧連接構件
170‧‧‧運輸層
172‧‧‧黏著層
200‧‧‧第二半導體晶片
210‧‧‧第一半導體晶片體
210a‧‧‧第一表面
210b‧‧‧第二表面
220‧‧‧第一貫穿電極
222‧‧‧第二貫穿電極
240‧‧‧絕緣層
250a、250b‧‧‧熱分散層
260‧‧‧第一連接電極
262‧‧‧第二連接電極
270‧‧‧鈍化層
272‧‧‧熱介面材料
280‧‧‧散熱片
300‧‧‧第三半導體晶片
310‧‧‧第一半導體晶片體
310a‧‧‧第一表面
310b‧‧‧第二表面
360‧‧‧焊墊
364‧‧‧第一再連接構件
370‧‧‧熱介面材料
380‧‧‧散熱片
402‧‧‧結構體
410‧‧‧基板主體
410a‧‧‧上表面
410b‧‧‧下表面
412‧‧‧焊線導引
414‧‧‧焊球座
420‧‧‧填充構件
430‧‧‧封裝構件
440‧‧‧安裝構件
464‧‧‧第二再連接構件
700‧‧‧層疊型半導體封裝
1000‧‧‧電子系統
1100‧‧‧控制器
1200‧‧‧輸入/輸出單元
1300‧‧‧記憶體元件
1400‧‧‧介面
1500‧‧‧滙排流
2000‧‧‧記憶卡
2100‧‧‧記憶體
2200‧‧‧記憶體控制器
2300‧‧‧主機
第1圖係一根據本發明之一具體實施例繪示之半導體晶片之平面圖。
第2A及2B圖係顯示沿著第1圖A-A'線之剖視圖。
第3A至3E圖係顯示沿著第1圖B-B'線之剖視圖，並說明根據本發明一具體實施例來製造半導體晶片之流程步驟。
第4A圖係顯示一根據本發明一具體實施例之半導體晶片之平面圖。
第4B圖係顯示沿著第4A圖C-C'線之剖視圖。
第5A圖係顯示一根據本發明一具體實施例之半導體晶片之平面圖。
第5B圖係顯示沿著第5A圖D-D'線之剖視圖。
第6圖係顯示一根據本發明一具體實施例之半導體晶片之平面圖。
第7圖係顯示一根據本發明一具體實施例之層疊型封裝之剖視圖。
第8圖係顯示一根據本發明一具體實施例之層疊型封裝之剖視圖。
第9圖係顯示一根據本發明一具體實施例之層疊型封裝之剖視圖。
第10圖係顯示一根據本發明一具體實施例之層疊型封裝之剖視圖。
第11圖係顯示一根據本發明一具體實施例之層疊型封裝之剖視圖。
第12圖係顯示一應用根據本發明各具體實施例之半導體晶片之電子系統之方塊圖。
第13圖係顯示一可包含根據本發明各具體實施例之半導體晶片之電子裝置之方塊圖。
茲將參照附加圖示詳細說明本發明之各具體實施例。
參見第1、2A圖，根據一具體實施例之一半導體晶片100可包含一半導體晶片體110、數個第一貫穿電極120、數個第二貫穿電極122、數個第三貫穿電極124、一絕緣層140、及熱分散層150a、150b。該半導體晶片100又可包含數個第連接電極160和數個第二連接電極162。
該半導體晶片體110包含一第一表面110a，其係一由半導體元件構成之主動面，和一與該第一表面110a 相對之第二表面110b。該第二表面110b可包含一在其內部形成之電路單元(圖未示)。該電路單元可包含，例如，一用以儲存資料之資料儲存單元(圖未示)和一用以處理資料之資料處理單元(圖未示)。該半導體晶片體110又可包含數個焊墊112，其係設置於該半導體晶片體110之第一表面110a並與該電路單元電性連接。一鈍化層114可在該第一表面110a上方形成，使得該等焊墊112曝光。
所述第一、第二、及第三貫穿電極120、122、124係於該半導體晶片體110內部形成。該等第一、第二、及第三貫穿電極120、122、124可以是從半導體元件接收電子信號以及傳送電子信號至該半導體元件之連接路徑。例如，該第一貫穿電極120可以為電源電極或接地電極。該第三貫穿電極124可以為接地電極或電源電極，具有與該第一貫穿電極120不同之電位。該第二貫穿電極122可以為信號電極。另者，當該第一貫穿電極120為電源電極，該第二貫穿電極122可以為電源電極，具有與該第一貫穿電極120不同之電位。該等第一、第二、及第三貫穿電極120、122、124之各一端係藉由該電路單元而與該半導體晶片體110之第一表面110a上方之各焊墊112電性連接。該等第一、第二、及第三貫穿電極120、122、124的數量與擺放位置可能會有所不同。
在所述具體實施例中，該等第一、第二、及第 三貫穿電極120、122、124之另一端係設置於該半導體晶片體110之第二表面110b上方，並突出該第二表面110b。然而，在另一實施例中，如第2B圖所示，該等第一、第二、及第三貫穿電極120、122、124之另一端形成時其另一端可不突出該半導體晶片體110之第二表面110b。
該等第一、第二、及第三貫穿電極120、122、124，舉例而言，可藉由在該半導體晶片體110形成之各通孔中填佈一導電層而形成。該導電層可包含金(Au)、銀(Ag)、銅(Cu)、鋁(Al)、鎳(Ni)、鉻(Cr)、及鎢(W)其中任一者，較佳者為銅(Cu)。
該絕緣層140只有在該半導體晶片體110之第二表面110b上方形成，使得該絕緣層140沒有遮覆突出於該半導體晶片體110之第二表面110b之該等第一、第二、及第三貫穿電極120、122、124之上面。在某些具體實施例，該絕緣層140形成時可使該絕緣層140部分，而非全部遮覆各個第一、第二、及第三貫穿電極120、122、124之上面。該絕緣層140可以由氧化矽膜、氮化矽膜、感光膜及聚合物膜其中任一者構成。
如第2B圖所示，若該等第一、第二、及第三貫穿電極120、122、124之另一端形成時沒有突出該半導體晶片體110之第二表面110b，該絕緣層140可能會受到一蝕刻製程，使得各第一、第二、及第三貫穿電極120、122、124 之另一端曝光。
所述熱分散層150a、150b形成時可為一置於該第一貫穿電極120、第三貫穿電極124、及絕緣層140上方之薄膜，以致該等熱分散層150a、150b直接接觸到該第一貫穿電極120和第三貫穿電極124。又，在一具體實施例中，所述熱分散層150a、150b沒有接觸到該第二貫穿電極122。在此具體實施例中，該等熱分散層150a、150b可包含形成時遮覆該作為電源電極或接地電極之第一貫穿電極120之第一熱分散層150a，和形成時遮覆該作為接地電極或電源電極之第三貫穿電極124之第二熱分散層150b。該第三貫穿電極124可具有與該第一貫穿電極120不同的電位。尤其，所述具體實施例之熱分散層150a、150b可設置在該第二表面110b之整個表面上方，其中第一和第三貫穿電極120、124被遮覆，而第二貫穿電極122未被遮覆。
所述熱分散層150a、150b可以由一具有高導熱係數之材料構成，較佳者如具有絕對溫度每公尺500至5000瓦特(W/mK)導熱係數之石墨烯(graphene)。在此情況下，所述由石墨烯構成之熱分散層150a、150b形成之厚度可為0.3至6微米(μm)。石墨烯一般所知的是具有比金剛石高2倍以及比銅(Cu)高10倍的導熱係數。因此，由石墨烯構成之所述熱分散層150a、150b不僅有效分散由該半導體晶片100產生的熱，而不增加一半導體封裝的總厚度，而且能迅速 將熱散到所述第一和第三貫穿電極120、124之外部。在一替代的具體實施例中，所述熱分散層150a、150b可由銅(Cu)、金(Au)、銀(Ag)，及鎳(Ni)其中任一者所構成。
所述第一和第二連接電極160、162在形成時，第一和第二連接電極160、162係與該等係分別設置於該第一表面110a和該第二表面110b上方之第一和第二貫穿電極120、122之一端相接。尤其，該第一連接電極160係形成於各個與所述第一、第二、第三貫穿電極120、122、124之一端電性連接之焊墊112上方。該第二連接電極162係形成於設置於該第二表面110b上方之該等第一和第三貫穿電極120、124另一端上方之部分所述熱分散層150a、150b上方，且形成於未被所述熱分散層150a、150b遮覆之該第二貫穿電極122之另一端。所述第一和第二連接電極160、162可以是前凸塊和後凸塊，其係分別由焊錫、鎳、銅、錫及其合金其中任一者構成。
藉由所述根據一具體實施例之半導體晶片100，在操作該半導體晶片100過程中由熱點產生的熱能被吸收到所述熱分散層150a、150b，從而快速地分散。另外，由於所述熱分散層150a、150b係連結該電源與接地電極(即第一和第三貫穿電極120、124)，在操作該半導體晶片100之過程中產生的熱能藉由所述第一和第三貫穿電極120、124而有效地被排放外部。因此，該根據一具體實施例之半 導體晶片100具有一超薄散熱結構，可有效防止由於操作期間產生的熱造成的不良操作。再者，可以防止由於所述的熱分散層150a、150b沒有電性連接該等第二貫穿電極122所造成的第二貫穿電極122之間的短路。
另外，藉由所述根據一具體實施例之半導體晶片100，足以簡單地形成該等熱分散表面150a、150b，因此也沒有必要形成另一結構來進行散熱。另外第一和第三貫穿電極120、124，其分別為電源電極和接地電極，可以作為散熱用的電極，即熱通孔，因此沒有必要形成另一熱通孔，因此能減少增加晶片尺寸的問題。
因此，該根據一具體實施例之半導體晶片100具有一能輕易散熱的結構，而不需增加晶片尺寸。晶片尺寸是由選擇性地形成所述熱分散表面150a、150b而加以控制。
茲將參照第3A~3E圖說明根據一具體實施例來製造半導體晶片100之流程步驟。
參見第3A圖，係提供一結構，其中一電路單元係於該半導體晶片體110之內部、鄰近該半導體晶片體110之第一表面110a之處形成，所述第一貫穿電極120、第二貫穿電極122、及第三貫穿電極(例如，參見第1圖)係於該半導體晶片體110中形成，使得這些電極之一端與該電路單元相接。數個焊墊112係於該第一表面110a上方形成，以致該 等焊墊112與該電路單元相互連接。該第一連接電極160係形成於各焊墊112與該半導體晶片體110之第一表面110a上方。該半導體晶片體110之第一表面可經由一黏著層172附著一載具基板170之第一連接電極160一起形成。
所述半導體晶片體110係包含第一表面110a和與該第一表面110a相對之第二表面110b。該半導體晶片體110之第二表面110b可經由一薄化製程而去除一預定厚度，該薄化製程可藉由背面研磨來實現。
舉例而言，所述第一貫穿電極120、第二貫穿電極122、及第三貫穿電極可以一柱狀構成。該等第一貫穿電極120、第二貫穿電極122、及第三貫穿電極可以藉由一由金(Au)、銀(Ag)、銅(Cu)、鋁(Al)、鎳(Ni)、鉻(Cr)、及鎢(W)其中任一者構成之導電層而形成，而該導電層可在施加導電膠後藉由電鍍、真空蒸發、濺射、化學氣相沉積法或焙燒法其中任一者而形成。該第一貫穿電極120可以為電源電極或接地電極。該第二貫穿電極122可以為信號電極。該第三貫穿電極可以為接地電極或電源電極，具有與該第一貫穿電極120不同的電位。
該電路單元可包含，例如，一用以儲存資料之資料儲存單元和一用以處理資料之資料處理單元。數個焊墊112係以兩列形式配置於該半導體晶片體110之第一表面110a之中間部分。上述鈍化層114可於該第一表面 110a上方形成，該形成之鈍化層114使得各焊墊112曝光。該第一連接電極160可以是由焊錫、鎳、銅、錫及其合金其中任一者構成之前凸塊。
所述載具基板170係用以支撐該晶片；也許可使用一玻璃晶片支撐系統。可使用一種能輕易附著與脫離該載具基板170的材料作為該黏著層172。例如，所述黏著層172可以是藉由紫外線照射或加熱而容易失去黏合性之薄膜型或液態型材料。
其後，經由一蝕刻製程移除該半導體晶片110之第二表面110b部分厚度，使得所述第一貫穿電極120、第二貫穿電極122、及第三貫穿電極之另一端突出該半導體晶片體110。在該半導體晶片體110上進行之刻凹製程可以運用反應離子刻蝕(RIE)、乾式刻蝕、濕式刻蝕、或化學機械拋光法(CMP)實施。所述第一貫穿電極120、第二貫穿電極122、及第三貫穿電極另一端突出的高度可以是數微米。
參見第3B圖，該絕緣層140係形成於該半導體晶片體110之第二表面110b上方，使得該第一貫穿電極120、第二貫穿電極122、及第三貫穿電極被該絕緣層140遮覆。該絕緣層140可以由氧化矽膜、氮化矽膜、感光膜、及聚合物膜其中任一者構成。
參見第3圖，該絕緣層140經由一CMP製程受到研磨，使得設置於該半導體晶片體110之第二表面110b之該 等第一貫穿電極120、第二貫穿電極122、及第三貫穿電極之另一端受到曝光。因此，該絕緣層140係形成於該半導體晶片體110之第二表面110b，以致該絕緣層140不會遮覆該等第一貫穿電極120、第二貫穿電極122、及第三貫穿電極之另一端。
另，雖然未顯示於圖示中，茲省略在該半導體晶片體110之第二表面110b之蝕刻製程，以致該第一貫穿電極120、第二貫穿電極122、及第三貫穿電極之另一端不會突出該半導體晶片體110之第二表面110b。如果省略所述蝕刻製程，該絕緣層140可能在形成之後受到蝕刻，以致該等第一貫穿電極120、第二貫穿電極122、及第三貫穿電極之另一端曝光。
參見第3D圖，一薄散熱材料層係形成於該絕緣層140與該第一貫穿電極120、第二貫穿電極122、及第三貫穿電極之已曝光另一端上方，接著該散熱材料層可受到圖案化，使得該等熱分散層150a、150b形成於該絕緣層140、第一貫穿電極120、及第二貫穿電極122上方。所述熱分散層150a、150b可包含第一熱分散層150a與第二熱分散層150b。該第一熱分散層150a形成時可遮覆該作為電源電極或接地電極之第三貫穿電極。該第三貫穿電極可具有與該第一貫穿電極120不同之電位。
在所述具體實施例中，該等熱分散層150a、 150b可經由施加並圖案化具有高導熱係數之材料，例如具有絕對溫度每公尺500至5000瓦特(W/mK)之導熱係數及0.3~6微米(μm)厚度之石墨烯，而形成於該絕緣層140之另一端與該等第一貫穿電極120、第二貫穿電極122、及第三貫穿電極之曝光的另一端上方。另者，該等熱分散層150a、150b可藉由形成並圖案化一由銅(Cu)、金(Au)、銀(Ag)、及鎳(Ni)其中至少一者(非石墨烯)構成之薄膜而形成。
另外，該第一熱分散層150a形成時可同時連接數個所述第一貫穿電極120。反之，所述第一和第二貫穿電極150a及150b形成時，這些電極並無連接該第二貫穿電極(即信號電極)。
參見第3E圖，至少一第二連接電極162係於所述第一貫穿電極120、第三貫穿電極、第二貫穿電極122之另一端上方之部分各熱分散層150a上方形成。該第二連接電極160可以是由焊錫、鎳、銅、錫及其合金中任一者構成之後凸塊。接著，該載具基板170從該半導體晶片體110中移除，因此完成根據一具體實施例製造該半導體晶片100之製程。該黏著層172可受熱或紫外線照射而去除部分的所述載具基板170。
儘管所述第二連接電極162，係於移除該載具基板170之前形成，該第二連接電極162亦可於移除該載具基板170之後形成。
茲將參照第4A、4B圖說明一根據本發明一具體實施例之一半導體晶片。在此，將省略和前一具體實施例相同部件的重複說明，且相同的圖號係用以指稱該相同的部件。
參見第4A、4B圖，此具體實施例之第一和第二熱分散層150a、150b可於鄰近該等第一和第三貫穿電極120、124之另一端形成，與前一具體實施例不同，該等第一和第二熱分散層150a、150b係形成而遮覆該等第一和第三貫穿電極120、124之另一端。另者，該等第一和第二熱分散層150a、150b可在鄰近該第一和第三貫穿電極120、124之另一端上方形成之第二連接電極162形成。
茲將參照第5A、5B圖說明一根據本發明一具體實施例之半導體晶片。在此，將省略和前一具體實施例相同部件的重複說明，且相同的圖號係用以指稱該相同的部件。
參見第5A、5B圖，根據本發明一具體實施例之半導體晶片100可包含一半導體晶片體110、數個第一貫穿電極120、數個第二貫穿電極122、數個第三貫穿電極124、絕緣層140、熱分散層150a、150b、數個第一連接電極160、及數個第二連接電極162。
如同前述具體實施例，所述熱分散層150a、150b可以由石墨烯、銅(Cu)、金(Au)、銀(Ag)、及鎳(Ni) 其中至少一者構成。然而，不同於前述各具體實施例，此具體實施例之熱分散層150a、150b係只有在該絕緣層140上方形成為一薄膜，以致該等熱分散層150a、150b未直接接觸到該第一和第三貫穿電極120、124。
通常，當兩種材料被放置在預定的距離，即比該兩種材料之間允許傳熱的最大距離短的距離，熱能可以從具有較高溫度的材料傳送到具有較低溫度的材料。據此，所述熱分散層150a、150b配置時使得所述熱分散層150a、150b鄰近所述第一、第二、第三貫穿電極120、122、124之一端設置於離所述第一、第二、第三貫穿電極120、122、124有100微米(μm)以下的距離，最好是5~100微米(μm)的距離。結果，此具體實施例亦可藉由所述熱分散層150a、150b而能快速分散於運作所述半導體晶片過程中產生的熱。另外，熱能係從所述熱分散層150a、150b傳遞至所述第一貫穿電極120或第三貫穿電極124(即電源電極或接地電極)，因此可被有效地排放到外部。
所述數個第二連接電極162可以在設置於該半導體晶片體110之第二表面110b之該等第一、第二、第三貫穿電極120、122、124上方形成。尤其，在此具體實施例中，該第二連接電極162並非形成於該等熱分散層150a、150b上方，而只遮覆該等第一、第二、第三貫穿電極120、122、124之另一端。
如上所述，如同前述各具體實施例，根據此具體實施例之半導體晶片具有一結構，由於所形成之熱分散層而能有效分散於製程中產生的熱能。另外，由於所述具體實施例包含一可使所述熱分散層與第一和第三貫穿電極隔開但仍可傳送熱至該等第一和第三貫穿電極之結構，因此，根據此具體實施例之半導體晶片可迅速將熱排到外部。因此，根據此具體實施例之半導體晶片100亦可有效防止由於在運作過程中所產生的熱所造成的操作不良。
茲將參照第6圖說明根據本發明一具體實施例之一半導體晶片。在此，將省略和前一具體實施例相同部件的重複說明，且相同的圖號係用以指稱該相同的部件。
根據所述具體實施例之半導體晶片100中，該等熱分散層150a、150b其中介於所述第一、第二、第三貫穿電極120、122、124中各一端係以一預定距離(即低於100微米(μm)之距離，最好介於5~100微米(μm)圍繞該等第一、第二、第三貫穿電極120、122、124。亦即，所述熱分散層150a、150b形成時，在所述第一、第二、第三貫穿電極120、122、124與熱分散層150a、150b之間，所述熱分散層150a、150b之各一端以一預定距離圍繞所述第一、第二、第三貫穿電極120、122、124。
圍繞該等第一、第二、第三貫穿電極120、122、124。亦即，所述熱分散層150a、150b形成時，在所述第一、 第二、第三貫穿電極120、122、124與熱分散層150a、150b之間，所述熱分散層150a、150b之各一端以一預定距離圍繞所述第一、第二、及第三貫穿電極120、122、124。
又，在所述具體實施例中，操作該半導體晶片100時產生的熱藉由所述熱分散層150a、150b而迅速分散。另外，熱係由該等熱分散層150a、150b傳送到第一貫穿電極120或第三貫穿電極124，即電源電極或接地電極，因此可有效地被排放至外部。
茲將參照第7圖說明根據一具體實施例經由堆疊至少二上述半導體晶片而製造之一層疊型半導體封裝。在此，將省略與第2圖相同部件的重複說明，且相同的圖號係用以指稱該相同的部件。
如圖示，根據一具體實施之層疊型半導體封裝700係包含一第一半導體晶片100和至少一堆疊在該第一半導體晶片100上的第二半導體晶片200。此外，根據一具體實施之層疊型半導體封裝700可又包含電性連接第一半導體晶片100和第二半導體晶片200之連接構件164。
如上所述，該第一半導體晶片100係包含該半導體晶片體110、數個第一貫穿電極120、數個第二貫穿電極122、數個第三貫穿電極(例如，參見第6圖)，該等第一、第二、第三貫穿電極係於該半導體晶片體110內部形成；該絕緣層140係於該半導體晶片體110之第二表面110b上形 成；該熱分散層150a、150b係形成於該絕緣層140與該第一貫穿電極120、第三貫穿電極之另一端上方；數個該等第一和第二連接電極160、162係形成於該等第一貫穿電極120、第二貫穿電極122、及第三貫穿電極之各一端與另一端上方。
該第二半導體晶片200具有實際上和第一半導體晶片100一樣的結構。尤其，該第二半導體晶片200可包含一半導體晶片體210，係具有一第一表面210a和一與該第一表面210a相對之第二表面210b；數個第一貫穿電極220；數個第二貫穿電極222；及數個第三貫穿電極(圖未示)，該等第一、第二、及第三貫穿電極係形成於該半導體晶片體210內部；一在該半導體晶片體210之第二表面210b上方形成之絕緣層240；在該絕緣層240與該第一貫穿電極220和該第三貫穿電極之另一端上方形成之熱分散層250a、250b；以及在該等第一貫穿電極220、第二貫穿電極222、及第三貫穿電極各一端與另一端上方形成之數個第一和第二連接電極260、262。
該連接構件164可插置於該第一半導體晶片100之第二連接電極162與該第二半導體晶片200之第一連接電極260之間。當至少二第二半導體晶片200堆疊在該第一半導體晶片100上，該連接構件164亦可插置於下面的第二半導體晶片200之第二連接電極262與上面的第二半導體 晶片200之第一連接電極260之間。該連接構件164可以是，例如，具有低熔點或異方性導電膜(ACF)的焊料，其包括樹脂和細導電球。
在該根據一具體實施例之層疊型半導體封裝中，堆疊之第一和第二半導體晶片各包含與該第一和第三貫穿電極連接之熱分散層，即電源與接地電極，各半導體晶片中的第一和第三貫穿電極係相互連接。據此，藉由所述根據一具體實施例之層疊型半導體封裝，操作所述半導體晶片而產生的熱可藉由該等熱分散層和該第一貫穿電極而有效地被排放。尤其，可有效地防止由於下面半導體晶片產生的熱傳送到上面半導體晶片所造成之上面半導體晶片的操作錯誤。
茲將參照第8圖說明根據一具體實施例之層疊型半導體封裝。在此，將省略與第7圖相同部件的重複說明，且相同的圖號係用以指稱該相同的部件。
相較於前一具體實施例，根據此具體實施例之層疊型半導體封裝700又可包含一在該第二半導體晶片200上形成之鈍化層270。另外，該根據此具體實施例之層疊型半導體封裝700又可包含一貼附於該鈍化層700上之散熱片280。此外，該根據此具體實施例之層疊型半導體封裝700又可包含一插致於該鈍化層270與該散熱片280之間的熱介面材料(TIM)272。
所述鈍化層270可形成於該第二半導體晶片200之半導體晶片體210之第二表面210b上方，或是在至少有二片第二半導體晶片200堆疊時之最上面第二半導體晶片200之半導體晶片體210之第二表面210b上方，使得該鈍化層270遮覆該熱分散層250a、250b和該第二連接電極262。所述鈍化層270，例如，可以由絕緣樹脂構成。
該散熱片280係用以將高速操作該等半導體晶片100、200所產生的熱分散。該散熱片280可以由一具有優異導熱性和散熱特性的金屬材料所構成。
所述熱介面材料(TIM)272可由，例如，一由熱或光硬化的硬化劑、黏著劑、及熱傳導材料所構成。在另一替代的具體實施例中，也許可省略該熱介面材料(TIM)272。如果省略該熱介面材料(TIM)272，該散熱片280可直接附著於最上面第二半導體晶片200之該鈍化層270上，無需插置該熱介面材料(TIM)272。
由於該散熱片黏附於最上面之第二半導體晶片上，相較於前述具體實施例，根據本具體實施例之層疊型半導體封裝具有較佳的散熱特性。
茲將參照第9圖說明根據一具體實施例之一層疊型半導體封裝。在此，將省略與第7圖相同部件重複的說明，且相同的圖號係用以指稱該相同的部件。
相較於前一具體實施例，該根據本具體實施例 之層疊型半導體封裝700又可包含一堆疊在最上面第二半導體晶片200上方之第三半導體晶片300。此外，該根據本具體實施例之層疊型半導體封裝700又可包含複數個電性連接該第二半導體晶片200與該第三半導體晶片300之第一再連接構件364。
所述第三半導體晶片300可包含一半導體晶片體310，具有一第一表面310a和一與該第一表面310a相對之第二表面310b。該第三半導體晶片體310可包含一在其內部形成之電路單元(圖未示)。另外，該第三半導體晶片300可包含數個設置於該第三半導體晶片300之活動表面上方之焊墊360，亦即該第一表面310a與該第二半導體晶片200之各第二連接電極262電性連接。在此，所述焊墊360係分別連接該形成於各半導體晶片體310內部之電路單元。
所述第一再連接構件364可以插置於該第三半導體晶片300之焊墊360與該第二半導體晶片200之第二連接電極262之間。該等第一再連接構件364可以是，例如，具有低熔點或異方性導電膜(ACF)的焊料，其包括樹脂和精細導電球。
根據上述具體實施例之層疊型半導體封裝，可採用一與所述第一和第二半導體晶片不同形式之半導體晶片，如第三半導體晶片。據此，根據上述具體實施例之層疊型半導體封裝的優點在於可配置一系統級晶片(SoC)，其 係採用記憶體晶片作為所述第一和第二半導體晶片，以及採用邏輯晶片作為該第三半導體晶片。
茲將參照第10圖說明一種根據一具體實施例之層疊型半導體封裝。在此，將省略與第9圖相同部件的重複說明，且相同的圖號係用以指稱該相同的部件。
相較於前述具體實施例，該根據本具體實施例之層疊型半導體封裝700又可包含一形成於該第三半導體晶片300上方之熱介面材料(TIM)370和一黏附於該熱介面材料(TIM)270之散熱片380。據此，根據此具體實施例之層疊型半導體封裝700的優點在於該半導體封裝700可包含一具有較佳散熱特性之系統級晶片(SoC)。
茲將參照第11圖說明一種根據一具體實施例之層疊型半導體封裝。在此，將省略與第9圖相同部件的重複說明，且相同的圖號係用以指稱該相同的部件。
相較於第9圖之具體實施例，該根據本具體實施例之層疊型半導體封裝700又可包含一結構體401。此外，該根據本具體實施例之層疊型半導體封裝700又可包含第二再連接構件464。另外，該根據本具體實施例之層疊型半導體封裝700又可包含填充構件420、封裝構件430、及外部安裝構件440。
該結構體402可設置於該第一半導體晶片100下方。該結構體402可為一中介片、一附加半導體晶片、一 半導體封裝或一印刷電路其中任一者。例如，該結構體402可為一印刷電路板，包含一具有一上表面410a和一下表面410b之基板主體410、設置於該基板主體410上表面410a上方之焊線導引412、及設置於該基板主體410下表面410b上方之複數個焊球座414。在此，該焊線導引412與焊球座414可藉由在該基板主體當中形成之佈線(圖未示)而一對一相連。
所述半導體晶片100、200、300也許可透過所述連接構件164、第一再連接構件364、及第二再連接構件464而相互電性連接。其中，該等連接構件164係電性連接該第一半導體晶片100與該第二半導體晶片200。該等第一再連接構件364係係電性連接該第二半導體晶片200與該第三半導體晶片300。該等第二再連接構件464係電性連接該第一半導體晶片100與該結構體402。尤其，該等第二再連接構件464係插置於該第一半導體晶片100之第一連接電極160與該結構體402之焊線導引412之間。如同該等第一再連接構件364，該等第二再連接構件464可以是，例如，具有低熔點或異方性導電膜(ACF)的焊料，其包括樹脂和細導電球。
所述填充構件420形成時，該填充構件420能填補介於該結構體402和該第一半導體晶片100之間的空間、介於該第一半導體晶片100和該第二半導體晶片200之間的 空間、以及介於該第二半導體晶片200和該第三半導體晶片300之間的空間。該封裝構件430可形成於該結構體402之上表面410a上方，使得該封裝構件430遮覆該堆疊之第一、第二、及第三半導體晶片100、200、300。該封裝構件430可包含一環氧型模料(EMC)。該等外部安裝構件440可附著於該結構體402之球座414上。所述外部安裝構件440可以是，例如，焊球。該等外部安裝構件440可呈針狀而非球狀。
所述層疊型半導體封裝700又可包含一貼附於該封裝構件430之散熱片。
另外，雖然圖未顯示及說明，所述層疊型半導體封裝可經由堆疊至少二片於第8~10圖所示之所述具體實施例之半導體晶片而以第7至11圖所示之形式配置。
所述根據各具體實施例之半導體晶片可應用於各式半導體晶片和具有該半導體晶片之封裝模組。
參見第12圖，可將所述根據各具體實施例之半導體晶片應用於一電子系統。該電子系統1000可包含一控制器1100、一輸入/輸出單元1200、及一記憶體元件1300。該控制器1100、輸入/輸出單元1200、及記憶體元件1300可經由一匯排流1500相互耦合。該匯排流1500係作為一轉移資料的路徑。
舉例而言，該控制器1100可包含以下其中至少一者：一或多個微處理器、一或多個數位信號處理器、一 或多個微控制器、及能夠執行與這些元件同樣功能的邏輯元件。該輸出/輸入單元1200可包含小鍵盤、鍵盤、顯示器等其中至少一者。
所述記憶體1300可包含一根據本發明各具體實施例之層疊型半導體封裝。該記憶體元件1300可儲存由該控制器1100執行之資料和(或)指令等。該記憶體元件1300可包含一揮發性記憶體元件和(或)非揮發性記憶體元件，例如快閃記憶體。例如，應用本發明技術之快閃記憶體以被安裝到資訊處理系統，例如行動終端設備或桌上型電腦。該快閃記憶體可以由固態硬碟(SSD)構成。在此情況下，該電子系統1000可以穩定地存儲快閃記憶體系統中的大量資料。
所述電子系統1000又可包含一用以從通信網絡發送和接收資料之介面1400。該介面1400可以是有線或無線型式。例如，該介面1400可包含一個天線或有線(或無線)的收發器。該介面1400可與該匯排流1500耦合。
雖然未顯示於圖示，該電子系統1000又可包含一應用晶片組、攝像處理(CIP)、及一輸出/輸入元件等。
所述電子系統1000可以落實為行動系統、個人電腦、工業電腦、或執行各種功能的邏輯系統。例如，該行動通信系統可以是個人數位助理(PDA)、可攜式電腦、網絡平板、行動電話、智慧手機、無線電話、筆記型電腦、 記憶卡、數位音樂系統、及資訊收發系統。
如果所述電子系統1000是一種能進行無線通信的裝置，該電子系統1000可用於一通信系統，例如分碼多址(CDMA)，全球移動通信系統(GSM)、北美數字蜂窩(NADC)、增強型時分多址(E-TDMA)、寬頻分碼多重存取(WCDAM)、CDMA2000、長期演進(LTE)、及無線寬頻上網(WiBro)。
參見第13圖，所述根據各具體實施例之半導體晶片可以一記憶卡2000形式提供。例如，該記憶卡2000可包含一記憶體2100，例如一非揮發性記憶體元件和一記憶體控制器2200。該記憶體2100與記憶體控制器2200可以儲存資料或讀取儲存的資料。
所述記憶體2100可包含至少任一種應用了本發明所述具體實施例之封裝技術之非揮發性記憶體元件。該記憶體控制器2200可以控制該記憶體2100，使得所存儲的數據被讀出或儲存以回應來自主機2300的讀/寫請求。
惟，以上所述者僅為本發明之特定具體實施例。熟習本案技藝人士皆可知悉所做之各種變更與修改，皆應涵蓋於以下申請專利範圍內，而不會偏離本發明之精神與範圍。
100‧‧‧半導體晶片
110‧‧‧半導體晶片本體
120‧‧‧第一穿透電極
122‧‧‧第二穿透電極
124‧‧‧第三穿透電極
150a、150b‧‧‧散熱表面
162‧‧‧第二連接電極

Claims (21)

  1. 一種半導體晶片，包括：一半導體晶片，具有一由多數個焊墊構成之第一表面和一與該第一表面相對之第二表面；多數個第一和第二貫穿電極，係通過該半導體晶片體，且其一端係與各焊墊電性連接；一絕緣層，係形成於該半導體晶片體之第二表面上方，以致該第一和第二貫穿電極之另一端不被該絕緣層遮覆；及一第一熱分散層，係在該絕緣層上方形成。
  2. 如申請專利範圍第1項之半導體晶片，其中該第一熱分散層具有0.3至6微米(μm)之厚度和絕對溫度每公尺500至5000瓦特(W/mK)之導熱係數。
  3. 如申請專利範圍第2項之半導體晶片，其中該第一熱分散層係由石墨烯(graphene)所構成。
  4. 如申請專利範圍第1項之半導體晶片，其中該第一熱分散層形成時使得該第一熱分散層直接接觸該第一貫穿電極，而不接觸該第二貫穿電極。
  5. 如申請專利範圍第4項之半導體晶片，其中該第一熱分散層形成時使得該第一熱分散層遮覆該第一貫穿電極。
  6. 如申請專利範圍第4項之半導體晶片，其中該第一貫穿電極為電源電極或接地電極，該第二貫穿電極為信號電極。
  7. 如申請專利範圍第4項之半導體晶片，又包括：多數個第三貫穿電極，係形成於該半導體晶片體中，各第三貫穿電極之一端與各焊墊電性連接，並具有與該第一貫穿電極不同的電位；及一第二熱分散層，係形成於該絕緣層上方，以致該第二分散層直接接觸該第三貫穿電極。
  8. 如申請專利範圍第1項之半導體晶片，其中該第一熱分散層形成時並沒有直接接觸該第一和第二貫穿電極。
  9. 如申請專利範圍第1項之半導體晶片，其中該第一熱分散層形成時，其鄰近該第一和第二貫穿電極之一端與該第一和第二貫穿電極相距5微米(μm)~100微米(μm)
  10. 如申請專利範圍第1項之半導體晶片，又包括：第一連接電極，係形成於各焊墊上；及第二連接電極，係形成於第一和第二貫穿電極之另端上。
  11. 一種疊層型半導體封裝，包括：一半導體晶片，包含一具有一由多數個焊墊構成之第一表面和一與該第一表面相對之第二表面之半導體 晶片體、多數個通過該半導體晶片體且其一端與各焊墊電性連接之第一和第二貫穿電極、一在該半導體晶片體之第二表面上方形成之絕緣層，使得該第一和第二貫穿電極之另一端不被該絕緣層遮覆、及一在該絕緣層上方形成之第一熱分散層；至少一第二半導體晶片，係堆疊於該第一半導體晶片上方，並具有實質上與該第一半導體晶片一樣的配置方式；及複數個連接構件，係插置於該第一半導體晶片和該第二半導體晶片之間，而介於二或多片堆疊之第二半導體晶片之間。
  12. 如申請專利範圍第11項之疊層型半導體封裝，其中該第一熱分散層具有0.3至6微米(μm)之厚度和絕對溫度每公尺500至5000瓦特(W/mK)之導熱係數。
  13. 如申請專利範圍第12項之疊層型半導體封裝，其中該第一熱分散層係由石墨烯(grapheme)所構成。
  14. 如申請專利範圍第11項之疊層型半導體封裝，其中該第一熱分散層形成時該第一熱分散層直接接觸該第一貫穿電極，而沒有接觸該第二貫穿電極。
  15. 如申請專利範圍第14項之疊層型半導體封裝，其中該第一熱分散層形成時該第一熱分散層係遮覆該第一貫穿電極。
  16. 如申請專利範圍第14項之疊層型半導體封裝，其中該第一貫穿電極係電源電極或接地電極。
  17. 如申請專利範圍第14項之疊層型半導體封裝，其又包括：多數個第三貫穿電極，係形成於該半導體晶片體中，在各第三貫穿電極之一端與各焊墊電性連接，並具有與該第一貫穿電極不同的電位；及一第二熱分散層，係形成於該絕緣層上，以致該第二熱分散層直接接觸該第三貫穿電極。
  18. 如申請專利範圍第11項之疊層型半導體封裝，其中該第一熱分散層形成時該第一熱分散層並非直接接觸該第一和第二貫穿電極。
  19. 如申請專利範圍第18項之疊層型半導體封裝，其中該第一熱分散層形成時，其鄰近該第一和第二貫穿電極之一端與該第一和第二貫穿電極相距一預定距離。
  20. 如申請專利範圍第19項之疊層型半導體封裝，其中該第一熱分散層形成時，其鄰近該第一和第二貫穿電極之一端與該第一和第二貫穿電極相距5~10微米(μm)的距離。
  21. 如申請專利範圍第11項之疊層型半導體封裝，其又包括： 第一連接電極，其係在各焊墊上形成；及第二連接電極，其係在第一和第二貫穿電極之各另一端上形成，其中該連接構件係插置於該第一半導體晶片之第二連接電極和該第二半導體晶片之第一連接電極之間，介於二或多片堆疊之下面第二半導體晶片之第二連接電極和上面之第二半導體晶片之第一連接電極之間。
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