TW201448166A - 撓性堆疊封裝體、包含此撓性堆疊封裝體的電子系統及包含此撓性堆疊封裝體的記憶卡 - Google Patents

撓性堆疊封裝體、包含此撓性堆疊封裝體的電子系統及包含此撓性堆疊封裝體的記憶卡 Download PDF

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Publication number
TW201448166A
TW201448166A TW102146013A TW102146013A TW201448166A TW 201448166 A TW201448166 A TW 201448166A TW 102146013 A TW102146013 A TW 102146013A TW 102146013 A TW102146013 A TW 102146013A TW 201448166 A TW201448166 A TW 201448166A
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Taiwan
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package
unit
flexible
wafer
stacked
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TW102146013A
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English (en)
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TWI609477B (zh
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Jong-Hoon Kim
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Sk Hynix Inc
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Abstract

本發明係提供撓性堆疊封裝體。撓性堆疊封裝體包含依序堆疊之一第一單元封裝體和一第二單元封裝體。該第一單元封裝體和第二單元封裝體之每一者係具有一固定區和一浮動區。第一單元封裝體之固定區係藉由一固定件被連接且固定至第二單元封裝體之固定區。

Description

撓性堆疊封裝體、包含此撓性堆疊封裝體的電子系統及 包含此撓性堆疊封裝體的記憶卡 [相關申請案]
本申請案主張於2013年6月5日在韓國智慧財產局所提出申請之韓國專利申請案第10-2013-0065006號之優先權權益，且該申請案之內容以全文引用之方式併入本文。
本揭示之實施例通常係關於電子裝置封裝體(electronic device packages)，且特別是關於撓性堆疊封裝體、包含此撓性堆疊封裝體之電子系統及包含此撓性堆疊封裝體之記憶卡。
使用在電子系統中之電子裝置可包括各種不同之電路元件，該等電路元件可被整合在一半導體基板內及/或在該半導體基板上，以構成該電子裝置(也稱作半導體晶片(chip)或半導體晶粒(die))。半導體晶片或半導體晶粒可被封裝形成半導體晶片封裝體。半導體晶片封裝體係廣泛地使用在電子系統中，例如電腦、行動系 統或資料儲存媒體。近來，隨著行動系統之發展，能夠彎曲或捲曲的撓性堆疊封裝體之需求係逐漸地增加。
穿戴式電子產品之需求也隨著行動系統的發展跟著增加。因此，穿戴式電子產品也需要撓性堆疊封裝體。因為半導體基板或半導體晶片能被薄型化地製造而足以彎曲或捲曲，嵌有單一半導體晶片之半導體封裝體可容易地製造成具有撓性的特性。然而，對於減少含有複數個堆疊半導體晶片之堆疊封裝體之總厚度而言，仍有一些限制。意即，製造具有撓性特性之堆疊封裝體是有困難度的。當堆疊封裝體被捲曲時，拉伸應力(tensile stress)或壓縮應力(compressive stress)係可局部地施加在該堆疊封裝體的某些部分，而且應力會造成堆疊封裝體損壞。因此，仍然需要含有複數個堆疊半導體晶片之撓性堆疊封裝體。
實施例之範例係關於撓性堆疊封裝體、包含此撓性堆疊封裝體的電子系統及包含此撓性堆疊封裝體的記憶卡。
根據一實施例，一種撓性堆疊封裝體包括依序向下堆疊之一第一單元封裝體和一第二單元封裝體。該第一單元封裝體和第二單元封裝體之每一者係具有一固定區和一浮動區。第一單元封裝體之固定區係藉由一固定件而連接且固定於第二單元封裝體之固定區。該第一和第二單元封裝體之每一者係包括一下撓性層、一位於該下撓性層上之上撓性層及一位於該下撓性層和該上 撓性層間之晶片。
根據一實施例，一種撓性堆疊封裝體包括依序向下堆疊之一第一晶片和一第二晶片。該第一晶片和第二晶片之每一者係具有一固定區和一浮動區。第一晶片之固定區係使用一固定件而連接且固定於第二晶片之固定區。
根據一實施例，一種撓性堆疊封裝體包括依序堆疊之一第一單元封裝體和一第二單元封裝體。該第一單元封裝體和第二單元封裝體之每一者係具有一固定區和一浮動區。第一單元封裝體之固定區係藉由一固定件而連接且固定於第二單元封裝體之固定區。該第一和第二單元封裝體之每一者係包括一將一晶片封裝至其內部之撓性層。
根據一實施例，一種電子系統包括一記憶體和藉由一匯流排與該記憶體耦接之控制器。該記憶體或該控制器係包括依序向下堆疊之一第一單元封裝體和一第二單元封裝體。該第一單元封裝體和第二單元封裝體之每一者係具有一固定區和一浮動區。第一單元封裝體之固定區係藉由一固定件而連接且固定於第二單元封裝體之固定區。該第一和第二單元封裝體之每一者係包括一下撓性層、一位於該下撓性層上之上撓性層及一位於該下撓性層和該上撓性層之間的晶片。
根據一實施例，一種電子系統包括一記憶體和藉由一匯流排與該記憶體耦接之控制器。該記憶體或該控制器係包括依序向下堆疊之一第一晶片和一第二晶 片。該第一晶片和第二晶片之每一者係具有一固定區和一浮動區。第一晶片之固定區係使用一固定件而連接且固定於第二晶片之固定區。
根據一實施例，一種記憶卡包括一含有一貫穿電極(through electrode)和一記憶體控制器之記憶體，該記憶體控制器係控制該記憶體之運作。該記憶體包括依序向下堆疊之一第一單元封裝體和一第二單元封裝體。該第一單元封裝體和第二單元封裝體之每一者係具有一固定區和一浮動區。第一單元封裝體之固定區係藉由一固定件而連接且固定於第二單元封裝體之固定區。該第一和第二單元封裝體之每一者係包括一下撓性層、一位於該下撓性層上之上撓性層及一位於該下撓性層和該上撓性層之間的晶片。
根據一實施例，一種記憶卡包括一含有一貫穿電極和一記憶體控制器之記憶體，該記憶體控制器係控制該記憶體之運作。該記憶體包括依序向下堆疊之一第一晶片和一第二晶片。該第一晶片和第二晶片之每一者係具有一固定區和一浮動區。第一晶片之固定區係使用一固定件而連接且固定於第二晶片之固定區。
10‧‧‧單元封裝體
11‧‧‧第一單元封裝體
12‧‧‧第二單元封裝體
20‧‧‧堆疊結構
21‧‧‧固定區
23‧‧‧浮動區
100‧‧‧晶片
200‧‧‧固定連接器
201‧‧‧第一固定連接器
202‧‧‧第二固定連接器
210‧‧‧貫穿電極本體
230‧‧‧第一接觸部
250‧‧‧第二接觸部
300‧‧‧撓性層
310‧‧‧下撓性層
330‧‧‧上撓性層
400‧‧‧接觸凸起
410、411‧‧‧第一接觸凸起
430、432‧‧‧第二接觸凸起
500‧‧‧黏著層
600‧‧‧封裝基板
610‧‧‧下基板
611‧‧‧第一外連接器
613‧‧‧第一內連接器
615‧‧‧第一連接通路
620‧‧‧導電基板連接器
630‧‧‧上基板
631‧‧‧第二外連接器
633‧‧‧第二內連接器
635‧‧‧第二連接通路
640‧‧‧第三接觸凸起
650‧‧‧中間基板
651‧‧‧空腔
710、810‧‧‧單元封裝體
720、820、920‧‧‧堆疊結構
821、921‧‧‧固定區
823、923‧‧‧浮動區
1800‧‧‧記憶卡
1810‧‧‧記憶體
1820‧‧‧記憶體控制器
1830‧‧‧主機
2710‧‧‧電子系統
2711‧‧‧控制器
2712‧‧‧輸入/輸出單元
2713‧‧‧記憶體
鑒於附圖及伴隨之詳細說明，本發明概念之實施例將變得更加明顯易懂，其中：第1圖至第6圖係圖示根據一實施例之撓性堆疊封裝體之截面圖；第7圖係圖示根據一實施例之撓性堆疊封裝 體之截面圖；第8圖係圖示根據一實施例之撓性堆疊封裝體之截面圖；第9圖係圖示根據一實施例之撓性堆疊封裝體之截面圖；第10圖係圖示根據一實施例之包含撓性堆疊封裝體之電子系統範例之方塊圖；及第11圖係圖示根據一實施例之包含撓性堆疊封裝體之另一電子系統範例之方塊圖。
將被理解的是雖然第一、第二、第三等用詞於本文可用來描述各種不同的元件，但這些元件應該不受限於這些用詞。這些用詞僅係使用來區分一元件與另一元件。因此，在不同的實施例中之第一元件在其他的實施例中可以被稱為第二元件，而不會背離本發明之教示。
也將被理解的是當一元件係被稱位於另一元件「之上(on)」、「上方(above)」、「之下(below)」或「下方(under)」時，該元件可以是分別直接位於該另一元件「之上」、「上方」、「之下」或「下方」，或者中介元件(intervening elements)也可出現在上述二元件之間。因此，使用於本文中諸如「之上」、「上方」、「之下」或「下方」等用詞係僅為要敍述特定之實施例且並非要限制本發明之概念。
進一步將理解的是當一元件被稱為「被連接」 或「被耦接」至另一元件時，該元件可以是直接被連接或被耦接至該另一元件或者也可出現中介元件。相反地，當一元件被稱為「被直接連接」或「被直接耦接」至另一元件時，則沒有中介元件出現。使用來敍述元件間或層間之關係之不同字詞應該以相同的方式加以解釋(例如「在...之間」相對於「直接在...之間」、「相鄰」相對於「直接相鄰」、「之上」相對於「直接在…之上」)。
參考第1圖，撓性堆疊封裝體可構造成包括具有複數個堆疊的單元封裝體10之堆疊結構20。每一單元封裝體10或堆疊結構20可包括固定區21和浮動區23。固定區21係表示堆疊於堆疊結構20內之單元封裝體10中之晶片100電氣地和機械地連接之一局部部分(local portion)，且浮動區23係表示單元封裝體10中之晶片100沒有電氣地和機械地連接以被自由地彎曲或捲曲之一撓性部分。浮動區23可允許撓性堆疊封裝體具有撓性之能力。晶片100或單元封裝體10之在浮動區23中的部分可實體地或機械地分離(disconnected)而彼此互相間隔。意即，晶片100或單元封裝體10之在浮動區23中的部分可彼此鬆開(unfixed)而好像是浮動的部分。
堆疊的單元封裝體10或晶片100可藉由設置在固定區21內之固定連接器200而彼此互相結合。固定連接器200並非設置在浮動區23內。因此，晶片100或單元封裝體10之位於浮動區23中的部分可實體地或機械地彼此分離而獨立地移動或具有撓性。因此，晶片100或單元封裝體10之位於浮動區23中的部分可自由地被 捲曲或被彎曲。固定連接器200可垂直地堆疊以構成一固定件，該固定件係與包含於堆疊的單元封裝體10內之晶片彼此電氣連接。例如，固定連接器200可使用複數個導體來實現，例如複數個貫穿電極、複數個凸塊(bump)或複數個焊球(solder ball)。
如第1圖和第2圖所圖示，單元封裝體10之每一者可包括晶片100和撓性層300，其中晶片100係具有整合在基板內和/或在基板上之積體電路，且撓性層300係圍繞晶片100。撓性層300可包括積層的下撓性層310和上撓性層330，且晶片100可設置在下撓性層310和上撓性層330之間。也就是，晶片100可以被下撓性層310和上撓性層330所封裝。晶片100可相當於包括積體電路之半導體晶片。例如，晶片100可以是半導體記憶體晶片，例如動態隨機存取記憶體(DRAM)晶片、靜態隨機存取記憶體(SRAM)晶片、快閃記憶體晶片、磁性隨機存取記憶體(MRAM)晶片、電阻式隨機存取記憶體(ReRAM)晶片、鐡電隨機存取記憶體(FeRAM)晶片或相變化隨機存取記憶體(PcRAM)晶片。或者，晶片100可以是一半導體非記憶體晶片，例如包括不含記憶體單元之邏輯積體電路之一邏輯晶片。晶片100可以被建構成晶粒或基板，在該基板內部或之上形成積體電路。
固定連接器200可被導入作為連接至外部裝置之電氣路徑或信號路徑。固定連接器200之每一者可使用形成重分佈層(redistribution layer)之方法來製造或者可被製造成包括例如貫穿矽通路(through silicon via, TSV)之貫穿電極。固定連接器200之每一者可包括貫穿電極本體210，穿透晶片100；第一接觸部230，自貫穿電極本體210延伸且穿透上撓性層330而電氣連接至外部裝置；以及第二接觸部250，自貫穿電極本體210延伸且穿透下撓性層310而電氣連接至外部裝置。貫穿電極本體210可由貫穿矽通路形成。第一和第二接觸部230、250可以由凸塊或重分佈層形成。固定連接器200之每一者可由例如金屬層(例銅層)之導電層來形成以提供電氣連接結構。
下撓性層310和上撓性層330之每一者可包括提供應力之材料層。例如，下撓性層310和上撓性層330之每一者可包括高分子層(polymer layer)、橡膠層(rubber layer)或彈性層(elastomer layer)。在不同的實施例中，撓性層300可由聚醯亞胺層(polyimide layer)形成。當撓性層300中之晶片100被捲曲或彎曲時，撓性層300在晶片100所在區域可產生機械中性面(mechanical neutral plane)。如第3圖所圖示，當單元封裝體10受一外力F被捲曲而形成哭嘴形狀時，單元封裝體10內之晶片100也被捲曲，使得上撓性層330向本身兩邊緣延伸而提供第一應力S1(例如，拉伸應力)，且下撓性層310向其中心部壓縮以提供第二應力S2(例如，壓縮應力)。因此，第一和第應力S1和S2可互相抵消或補償以在設有晶片100之區域產生機械中性面。意即，沒有應力實質地施加於設置在下撓性層310和上撓性層330之間的晶片100。結果，因為施於晶片100之總應力 實質地為零，晶片100可成功地被捲曲而不會有任何破壞。同樣地，即使單元封裝體10被捲曲而形成微笑形狀，機械中性面可產生在設有晶片100的區域。因此，晶片100可成功地被捲曲而不會有任何破壞。
再次參考第1圖，構成堆疊結構20之第一單元封裝體11和第二單元封裝體12可藉由在固定區21中之固定連接器200而彼此結合。第一單元封裝體11中之第一固定連接器201可與第二單元封裝體12中之第二固定連接器202連接並結合，以將第一單元封裝體11在固定區21中結合第二單元封裝體12。一黏著層500可被局部地導入在第一和第二固定連接器201和202之接合部(joint portion)附近，以將第一單元封裝體11實體地與第二單元封裝體12相接觸。黏著層500可局部地僅僅被導入於固定區21而沒有延伸到浮動區23中。藉此，第一和第二單元封裝體11和12可在浮動區23中被相間隔開來。黏著層500可包括介電材料，以保護第一和第二固定連接器201和202之接合部且將第一和第二固定連接器201和202之接合部與其他元件互相絕緣。黏著層500可將第一單元封裝體11附著至第二單元封裝體12，使得第一和第二單元封裝體11和12係可靠地彼此互相固定。
複數個接觸凸起400可在浮動區23中設置單元封裝體10上，如第1圖和第2圖所圖示。例如，第一接觸凸起410可在浮動區23中設置在單元封裝體10之下撓性層310的底表面，且第二接觸凸起430可在浮動 區23中設置在單元封裝體10之上撓性層330之頂表面。如圖示於第1圖，當第一單元封裝體11堆疊於第二單元封裝體12上面時，第一單元封裝體11底表面上之第一接觸凸起411(或410)福浮動區23中可垂直地延伸至第二單元封裝體12之頂表面，而且第二單元封裝體12頂表面上之第二接觸凸起432(或430)可在浮動區23中垂直地延伸至第一單元封裝體11之底表面。
第二接觸凸起432(或430)可在浮動區23中設置在第一接觸凸起411(或410)之間，如圖示於相對應取自第1圖沿垂直線A-A'之截面圖之第4圖。意即，第二接觸凸起432(或430)可垂直地與第一接觸凸起411(或410)相錯位。參考第2圖和第4圖，第一接觸凸起411(或410)可在浮動區23中與第一單元封裝體11之下撓性層310(或撓性層300)之底表面相結合，且第一接觸凸起411(或410)之尖端部可在浮動區23中與第二單元封裝體12之上撓性層330(或撓性層300)之頂表面相接觸。因此，第一單元封裝體11之浮動區23藉由第一接觸凸起411(或410)可與第二單元封裝體12之浮動區23相間隔。意即，接觸凸起400可在浮動區23中設置在單元封裝體10之撓性層300之間，以支撐彼此互相分離的單元封裝體10。此外，接觸凸起400可將施於單元封裝體10其中之一者之力量傳導至另一個與其相鄰之單元封裝體10上。
如第5圖所圖示，當力量F施加於包括具有單元封裝體10之堆疊結構20之堆疊封裝體而將堆疊封 裝體捲曲而形成哭嘴形狀時，第一單元封裝體11也被力量F捲曲形成哭嘴形狀，而且第一單元封裝體11之第一接觸凸起411(或410)可將由第一單元封裝體11捲曲所產生的力量T傳導至與第一接觸凸起411(或410)接觸之第二單元封裝體12。結果，第二單元封裝體12也可被經由第一接觸凸起411(或410)所傳導的力量T捲曲而形成哭嘴形狀。第二接觸凸起430也可對力量F之傳導有所貢獻。例如，如果當力量F施加於包括堆疊結構20之堆疊封裝體而形成哭嘴形狀時，第一接觸凸起411(或410)係支配地作為力量F的傳導器，則當力量施於堆疊封裝體而形成與哭嘴形狀相反構造的微笑形狀時，第二接觸凸起430可支配地作為力量之傳導器。
接觸凸起400(410和430)係不作為將單元封裝體10彼此互相固定之接合件或固定件。意即，接觸凸起400(410和430)可以是尖端部能夠在撓性層300表面上滑動和移動之構件，而不同於固定連接器200。例如，接觸凸起400(410和430)可以是可移動之接觸件。藉此，如果第一單元封裝體11被捲曲，第二單元封裝體12也可被捲曲而且第一單元封裝體11之第一接觸凸起411(410)的尖端部可以在第二單元封裝體12之撓性層300頂表面上滑動。結果，第一接觸凸起411(410)之尖端部的接觸位置可以在第二單元封裝體12之撓性層300頂表面上改變。如此，當第一和第二單元封裝體11和12被捲曲而具有相同形狀時，第一接觸凸起411(410)係固定在第一單元封裝體11，而第一接觸凸起411(410) 之尖端部可僅僅接觸第二單元封裝體12且可在第二單元封裝體12上滑動。因此，第一接觸凸起411(410)可允許第一和第二單元封裝體11和12自由地捲曲。
如第2圖所圖示(也請看第5圖)，接觸凸起400(410和430)可被附著到上、下撓性層330和310的表面，或著接觸凸起400(410和430)可使用按壓(press)技術、雕刻(carving)技術或模造(molding)技術來形成。接觸凸起400可被附著而具有凸塊形狀且可被形成而包括介電材料或導電材料。例如，接觸凸起400可被形成而包括高分子材料、橡膠材料、彈性材料或類似者。在撓性層300係由聚醯亞胺薄膜所形成之情況，接觸凸起400可藉由將模造製程、按壓製程或凹凸製程(dimple process)應用至撓性層300(意即，聚醯亞胺薄膜)來形成。於這種狀況下，撓性層300和接觸凸起400可構成單一統一的主體而在其間沒有異質接面(heterogeneous junction)。
包括顯示於第1圖和第5圖之單元封裝體10的堆疊結構20可以嵌入封裝基板600內，如第6圖所圖示。封裝基板600可以是一撓性印刷電路板或包括一撓性薄膜材料之一撓性內嵌基板。封裝基板600可包括一覆蓋堆疊結構20之一底表面之下基板610、一覆蓋堆疊結構20之一頂表面之上基板630、及一設置在下基板和上基板610和630之邊緣間之中間基板650，為要提供堆疊結構20所在之一空腔651。下基板610、中間基板650和上基板630之各基板可包括撓性材料，舉例而言， 例如聚醯亞胺材料之高分子材料。
下基板610可具有包括第一外連接器611、第一內連接器613及設置在其內部之第一連接通路615之一互連結構(interconnection structure)，且堆疊結構20可經由第一外連接器611、第一內連接器613及第一連接通路615而電連接至外部裝置。第一外連接器611可設置在下基板610的底表面以作為電接觸墊(electrical contact pad)；第一內連接器613可設置在下基板610之頂表面而電連接至堆疊結構20中之固定連接器200；且第一連接通路615可設置在第一外連接器611和第一內連接器613之間而將第一外連接器611電氣連接至第一內連接器613。同樣地，上基板630可具有包括第二外連接器631、第二內連接器633及設置在其內部之第二連接通路635之一互連結構。意即，第二外連接器631可設置在上基板630的頂表面以作為電接觸墊；第二內連接器633可設置在上基板630之底表面而電連接至堆疊結構20中之固定連接器200；且第二連接通路635可設置在第二外連接器631和第二內連接器633之間而將第二外連接器631電連接至第二內連接器633。在不同的實施例中，一導電基板連接器620可額外地設置在固定連接器200和第一內連接器613之間；且另一導電基板連接器620可額外地設置在固定連接器200和第二內連接器633之間。導電基板連接器620每一者可以是例如焊球或凸塊之導電連接器。
附著在構成堆疊結構20之單元封裝體10之 撓性層300之接觸凸起400之至少一者係可具有接觸下基板610之一尖端部，以將當堆疊結構20被捲曲所產生的力量傳導至下基板610。在不同的實施例中，第三接觸凸起640可額外地被附著至上基板630之底表面，且第三接觸凸起640之尖端部可接觸堆疊結構20之最頂層單元封裝體10之頂表面。在這種情況下，第三接觸凸起640可將當上基板630被捲曲時所產生的力量傳導至單元封裝體10。
參考第7圖，根據不同實施例之撓性堆疊封裝體可具有包括複數個堆疊之單元封裝體710之堆疊結構720，且單元封裝體710之每一者可包括一晶片7100和封裝該晶片7100之一撓性層7300。此外，固定連接器7200可設置在堆疊結構720之固定區21中，以提供一電氣和機械結合結構。然而，圖示於第7圖之撓性堆疊封裝體甚至可構造成不具有任何接觸凸起(第1圖中之400)。單元封裝體710可藉由包括固定連接器7200之結合結構以及藉由圍繞在固定區21內之固定連接器7200間之接合部之黏著層7500而彼此互相連接和固定。相反地，由於固定連接器7200和黏著層7500的存在，即使沒有任何接觸凸起(第1圖中之400)，浮動區23內之單元封裝體710可以垂直地彼此互相間隔開。
參考第8圖，根據不同實施例之撓性堆疊封裝體可具有包括複數個堆疊之單元封裝體810之堆疊結構820，且單元封裝體810之每一者可包括一晶片8100和封裝該晶片8100之一撓性層8300。固定單元封裝體 810之固定區821可位在堆疊結構820之邊緣，且單元封裝體810彼此互相間隔開的浮動區823可位在堆疊結構820相對於固定區821之另一邊緣。意即，圖示於第1圖和第7圖中之撓性堆疊封裝體之固定區21和浮動區23係分別座落於堆疊結構20之中心部和邊緣，而圖示於第8圖中之撓性堆疊封裝體之固定區821和浮動區823係分別座落於堆疊結構820之二邊緣。結果，圖示於第8圖之目前實施例係具有自顯示於第1圖和第7圖之實施例針對固定區821和浮動區823之位置修改的構造。如第8圖所圖示，固定區821可包括將單元封裝體810彼此互相機械地固定並電氣連接之固定連接器8200和強化固定連接器8200之結合力之黏著層8500。浮動區823可包含複數個設置在撓性層8300上之接觸凸起8400。當堆疊結構820受到施於堆疊結構820之力量而捲曲時，接觸凸起8400可作為在單元封裝體810之間力量的傳導器。
參考第9圖，根據不同實施例之撓性堆疊封裝體可具有包括複數個堆疊之晶片9100之堆疊結構920，且晶片9100不被任何撓性層所封裝。意即，沒有撓性層被導入顯示於第9圖之撓性堆疊封裝體中。第9圖之撓性堆疊封裝體可包括位在堆疊結構920中心部之固定區921和位在堆疊結構920邊緣之浮動區923，類似於顯示於第1圖之實施例。固定區921中之固定連接器9200可由穿透晶片9100之例如貫穿矽通路(TSVs)之貫穿電極來形成。或者，固定連接器9200可形成而包括 電連接到晶片9100之積體電路之凸塊。固定連接器9200可在固定區921中將堆疊晶片9100彼此互相連接固定。黏著層9500可局部地導入固定連接器9200之接合部附近，以強化固定連接器9200在固定區921中之結合力。可將接觸凸起9400形成為包括附著在浮動區923中之晶片9100表面上之凸塊。晶片9100可藉由夾在其中之接觸凸起9400而彼此互相間隔開。當力量施加於堆疊結構920而捲曲堆疊結構920時，接觸凸起9400可作為在晶片9100之間力量的傳導器。接觸凸起9400能以一絕緣材料形成以將晶片9100彼此互相電氣絕緣。
參考第10圖，根據諸實施例之撓性堆疊封裝體可以記憶卡1800之型式提供。例如，記憶卡1800可包括例如非揮發性記憶體裝置(nonvolatile memory device)之記憶體1810和記憶體控制器1820。記憶體1810和記憶體控制器1820可儲存資料和讀取已儲存之資料。
記憶體1810可包括應用本發明之諸實施例之封裝體技術之非揮發性記憶體裝置中之至少任何一種。記憶體控制器1820可控制記憶體1810，使得回應來自主機1830之讀/寫請求，讀取已儲存資料或儲存資料。
參考第11圖，根據一實施例之撓性堆疊封裝體可應用在一電子系統2710。電子系統2710可包括控制器2711、輸入/輸出單元2712及記憶體2713。控制器2711、輸入/輸出單元2712及記憶體2713可經由匯流排2715而彼此互相耦接，其中匯流排2715係提供資料移 動之路徑。
例如，控制器2711可包括至少一微處理器、至少一數位訊號處理器、至少一微控制器及能夠實行與這些組件相同功能之邏輯裝置中之至少任何一種。控制器2711和記憶體2713可包括根據本發明之實施例之撓性堆疊封裝體中之至少任何一種。輸入/輸出單元2712可包括選自小型鍵盤(keypad)、鍵盤(keyboard)、顯示裝置、觸控螢幕(touch screen)等中之至少一種。記憶體2713係用於儲存資料之裝置。記憶體2713可儲存資料及/或由控制器2711所執行之指令，及類似者。
記憶體2713可包括例如DRAM之揮發性記憶體裝置及/或例如快閃記憶體之非揮發性記憶體裝置。例如，快閃記憶體可被安裝至諸如行動終端(mobile terminal)或桌上型電腦之資訊處理系統(information processing system)。快閃記憶體可組成固態硬碟(solid state disk，SSD)。在此情況下，電子系統2710可穏定地儲存快閃記憶體系統中之大量資料。
電子系統2710可進一步包括構造成將資料傳送到通信網路或從通信網路接收資料之界面2714。界面2714可以是有線或無線的型式。例如，界面2714可包括天線或有線的或無線的收發器(transceiver)。
電子系統2710可實現成行動系統、個人電腦、工業電腦或實行不同功能之邏輯系統。例如，行動系統可以是個人數位助理(PDA)、可攜式電腦、平板電腦、行動電話、智慧型手機、無線電話、膝上型電腦、 記憶卡、數位音樂系統及資訊傳送/接收系統中之任何一種。
在電子系統2710係一種能夠實行無線通信之設備的情況下，電子系統2710可以使用在例如分碼多工多重存取(code division multiple access，CDMA)、全球行動通信系統(global system for mobile communication，GSM)、北美數位蜂窩(north American digital cellular，NADC)、改良型分時多工存取(enhanced-time division multiple access，E-TDMA)、寬頻分碼多工存取(wideband code division multiple access，WCDAM)、CDMA2000、長期演進技術(long term evolution，LTE)及無線寬頻互聯網(wireless broadband Internet，Wibro)等的通信系統中。
如上文所述，根據實施例之撓性堆疊封裝體可提供能夠捲曲或彎曲之堆疊封裝體。在撓性堆疊封裝體被使用在穿戴式電子系統之情況，穿戴式電子系統能被改良而具有大量儲存能量和多功能之特性。
發明概念之實施例因例示性目的已揭示於上文中。本技術領域的技術人員將理解的是在不背離揭示於隨附申請專利範圍中之發明概念之範圍和精神，各種不同的修飾、添加和取代係有可能的。
10‧‧‧單元封裝體
11‧‧‧第一單元封裝體
12‧‧‧第二單元封裝體
20‧‧‧堆疊結構
21‧‧‧固定區
23‧‧‧浮動區
100‧‧‧晶片
200‧‧‧固定連接器
201‧‧‧第一固定連接器
202‧‧‧第二固定連接器
300‧‧‧撓性層
310‧‧‧下撓性層
330‧‧‧上撓性層
400‧‧‧接觸凸起
410、411‧‧‧第一接觸凸起
430、432‧‧‧第二接觸凸起
500‧‧‧黏著層

Claims (20)

  1. 一種撓性堆疊封裝體，其包含：一第一單元封裝體和一第二單元封裝體，該第一單元封裝體和該第二單元封裝體係依序堆疊，該第一單元封裝體和第二單元封裝體之每一者係具有一固定區和一浮動區；及一固定件，連接且固定該第一和該第二單元封裝體之該等固定區之每一固定件，其中該第一和第二單元封裝體之每一者係包括一下撓性層、一位於該下撓性層上之上撓性層及一位於該下撓性層和該上撓性層之間的晶片。
  2. 如申請專利範圍第1項之撓性堆疊封裝體，進一步包含複數個第一接觸凸起，該複數個第一接觸凸起係自該第一單元封裝體之該浮動區之一底表面朝向該第二單元封裝體之該浮動區之一頂表面凸出，其中該複數個第一接觸凸起係構造成將施於該第一單元封裝體之該浮動區之力量傳導到該第二單元封裝體之該浮動區。
  3. 如申請專利範圍第2項之撓性堆疊封裝體，進一步包含一個以上的第二接觸凸起，該一個以上的第二接觸凸起係自該第二單元封裝體之該浮動區之一頂表面朝向該第一單元封裝體之該浮動區之一底表面凸出，其中該一個以上的第二接觸凸起之至少一者係設置在該複數個第一接觸凸起之間。
  4. 如申請專利範圍第2項之撓性堆疊封裝體， 其中該等第一接觸凸起係在該浮動區內與該第一單元封裝體之該下撓性層相結合；其中該等第一接觸凸起之尖端部係在該浮動區內與該第二單元封裝體之該上撓性層相接觸；且其中該第一單元封裝體係藉由該等第一接觸凸起與該第二單元封裝體分離。
  5. 如申請專利範圍第2項之撓性堆疊封裝體，其中該等第一接觸凸起之每一者係包括一高分子材料、一橡膠材料或一彈性材料。
  6. 如申請專利範圍第1項之撓性堆疊封裝體，其中每一單元封裝體之該下撓性層和該上撓性層係構成一撓性層；且其中該撓性層係包括一高分子材料、一橡膠材料或一彈性材料。
  7. 如申請專利範圍第1項之撓性堆疊封裝體，其中每一單元封裝體之該下撓性層和該上撓性層係構成一撓性層；且其中該撓性層係包括一聚醯亞胺材料。
  8. 如申請專利範圍第1項之撓性堆疊封裝體，其中每一單元封裝體之位於每一下撓性層和每一上撓性層之間的該晶片係被每一個別單元封裝體之該下撓性層和該上撓性層所封裝。
  9. 如申請專利範圍第1項之撓性堆疊封裝體，其中該第一和第二單元封裝體之該等固定區係位於該第一和第二單元封裝體之中心部；且 其中該第一和第二單元封裝體之該等浮動區係位於該第一和第二單元封裝體之二邊緣。
  10. 如申請專利範圍第1項之撓性堆疊封裝體，其中該第一和第二單元封裝體之該等固定區係位於該第一和第二單元封裝體之第一邊緣；且其中該第一和第二單元封裝體之該等浮動區係位於該第一和第二單元封裝體與該等第一邊緣相對之第二邊緣。
  11. 如申請專利範圍第1項之撓性堆疊封裝體，其中該固定件係將該第一單元封裝體電連接至該第二單元封裝體。
  12. 如申請專利範圍第11項之撓性堆疊封裝體，其中該固定件包括：一穿透該第一單元封裝體之第一貫穿電極；及一穿透該第二單元封裝體之第二貫穿電極。
  13. 如申請專利範圍第11項之撓性堆疊封裝體，進一步包含一黏著層，將該第一單元封裝體之該固定區附著至該第二單元封裝體之該固定區，其中該黏著層係設置在該第一和第二單元封裝體之間以圍繞該固定件。
  14. 如申請專利範圍第1項之撓性堆疊封裝體，進一步包含具有一空腔之一封裝基板，其中一包含該第一和第二單元封裝體之堆疊結構係位於該空腔內。
  15. 如申請專利範圍第14項之撓性堆疊封裝體，其中該封裝基板包括： 一覆蓋該堆疊結構之一底表面之下基板；一覆蓋該堆疊結構之一頂表面之上基板；一中間基板，設置在該下基板和該上基板之邊緣間，以提供該空腔；及複數個第三接觸凸起，係自該上基板朝向該堆疊結構之一頂表面凸出，以作為力量之傳導器，其中該下基板和該上基板之每一者係包括一互連結構，該互連結構係將該固定件與該下基板或該上基板相結合。
  16. 如申請專利範圍第15項之撓性堆疊封裝體，其中該上基板和該下基板係包含一撓性材料。
  17. 一種撓性堆疊封裝體，其包含：一第一晶片和一第二晶片，該第一晶片和該第二晶片係依序堆疊，該第一晶片和第二晶片之每一者係具有一固定區和一浮動區；及一將該第一晶片之該固定區連接且固定至該第二晶片之該固定區之固定件。
  18. 如申請專利範圍第17項之撓性堆疊封裝體，進一步包含複數個第一接觸凸起，該複數個第一接觸凸起係自該第一晶片之該浮動區之一底表面朝向該第二晶片之該浮動區之一頂表面凸出，其中該複數個第一接觸凸起係構造成將施於該第一晶片之該浮動區之力量傳導到該第二晶片之該浮動區。
  19. 如申請專利範圍第18項之撓性堆疊封裝體， 其中該第一接觸凸起係使該第一晶片與該第二晶片絕緣；且其中該固定件係將該第一晶片電連接至該第二晶片。
  20. 一種撓性堆疊封裝體，其包含：一第一單元封裝體和一第二單元封裝體，該第一單元封裝體和該第二單元封裝體係依序堆疊，該第一單元封裝體和第二單元封裝體之每一者係具有一固定區和一浮動區；及一固定件，連接且固定該第一和該第二單元封裝體之該等固定區之每一固定件，其中該第一和第二單元封裝體之每一者係包括一將一晶片封裝至其內部之撓性層。
TW102146013A 2013-06-05 2013-12-13 撓性堆疊封裝體、包含此撓性堆疊封裝體的電子系統及包含此撓性堆疊封裝體的記憶卡 TWI609477B (zh)

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US11355475B2 (en) 2015-11-24 2022-06-07 Taiwan Semiconductor Manufacturing Company, Ltd. Singulation and bonding methods and structures formed thereby
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US9269657B2 (en) 2016-02-23
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TWI609477B (zh) 2017-12-21
US20140361427A1 (en) 2014-12-11

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