TW201439335A - 鉭濺鍍靶及其製造方法 - Google Patents

鉭濺鍍靶及其製造方法 Download PDF

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TW201439335A
TW201439335A TW102145544A TW102145544A TW201439335A TW 201439335 A TW201439335 A TW 201439335A TW 102145544 A TW102145544 A TW 102145544A TW 102145544 A TW102145544 A TW 102145544A TW 201439335 A TW201439335 A TW 201439335A
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仙田真一郎
永津光太郎
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Jx日鑛日石金屬股份有限公司
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Abstract

一種鉭濺鍍靶,於其濺鍍面,(200)面之位向率超過70%,且(222)面之位向率在30%以下。藉由控制靶之結晶位向,而具有下述效果:降低鉭靶之放電電壓,使電漿容易產生,且提升電漿之穩定性。

Description

鉭濺鍍靶及其製造方法
本發明係關於一種鉭濺鍍靶及其製造方法。尤其是關於一種用於形成LSI中作為銅配線之擴散阻擋層的Ta膜或TaN膜的鉭濺鍍靶及其製造方法。
以往,一直使用鋁作為半導體元件之配線材料,但隨著元件之微細化、高積集化,浮現出配線延遲之問題,而開始使用電阻較小之銅來代替鋁。銅作為配線材料非常有效,但由於銅本身為活潑之金屬,故會有擴散至層間絕緣膜而造成污染之問題,必須於銅配線與層間絕緣膜之間形成Ta膜或TaN膜等擴散阻擋層。
通常,Ta膜或TaN膜係藉由對鉭靶進行濺鍍來形成。迄今為止對於鉭靶,關於對濺鍍時之性能造成之影響,已知靶所含有之各種雜質、氣體成分、結晶之面方位或結晶粒徑等會對成膜速度、膜厚之均勻性、顆粒(particle)產生等造成影響。
例如,於專利文獻1記載有:自靶厚之30%的位置朝向靶之中心面,形成為(222)位向優先的結晶組織,藉此提升膜之均勻性。
又,於專利文獻2記載有:使鉭靶之結晶位向為無規(未統一於特定之結晶方位),藉此提高成膜速度,並提升膜之均勻性。
又,於專利文獻3記載有:於濺鍍面選擇性地增多原子密度高之(110)、 (200)、(211)之面方位,藉此提升成膜速度,且藉由抑制面方位之變動來提升均勻性。
並且,於專利文獻4記載有:使利用X射線繞射求出之(110) 面強度比因濺鍍表面部分之位置所產生之變動在20%以內,藉此提升膜厚均勻性。
又,於專利文獻5記述有:將型鍛(swaging)、擠出、旋轉鍛造、無潤滑之鍛粗鍛造與時脈軋製(clock rolling)組合使用,可製作具有非常強之(111)、(100)等之結晶學織構的圓形金屬靶。
其他,於下述專利文獻6,記載有一種鉭濺鍍靶之製造方 法,係對鉭鑄錠實施鍛造、退火、壓延加工,於最後組成加工後,進一步以1173K以下之溫度進行退火,使未再結晶組織在20%以上90%以下。
又,於專利文獻7,揭示有如下之技術:藉由鍛造、冷壓延 等加工與熱處理,而使靶濺鍍面之波峰的相對強度為(110)>(211)>(200),使濺鍍特性穩定化。
並且,於專利文獻8記載有:對鉭鑄錠進行鍛造,於此鍛造步驟進行2次以上之熱處理,進一步實施冷壓延,並進行再結晶化熱處理。
然而,上述專利文獻皆無下述構想:藉由控制靶濺鍍面之結晶位向,以降低鉭靶之放電電壓,使電漿容易產生,且提升電漿之穩定性。
專利文獻1:日本特開2004-107758號公報
專利文獻2:國際公開2005/045090號
專利文獻3:日本特開平11-80942號公報
專利文獻4:日本特開2002-363736號公報
專利文獻5:日本特表2008-532765號公報
專利文獻6:日本特許第4754617號
專利文獻7:國際公開2011/061897號
專利文獻8:日本特許第4714123號
本發明之課題在於:對於鉭濺鍍靶,藉由控制靶濺鍍面之結晶位向,以降低鉭靶之放電電壓,使電漿容易產生,且提升電漿之穩定性。
本發明之課題尤其是在於提供一種鉭濺鍍靶,該靶適用於形成由Ta膜或TaN膜等構成之擴散阻擋層,該擴散阻擋層可有效防止因活潑之Cu的擴散所造成之配線周圍的污染。
為了解決上述課題,本發明提供以下發明。
1)一種鉭濺鍍靶,於其濺鍍面,(200)面之位向率超過70%,且(222)面之位向率在30%以下。
2)如上述1)記載之鉭濺鍍靶,於其濺鍍面,(200)面之位向率在80%以上,且(222)面之位向率在20%以下。
3)一種擴散阻擋層用薄膜,係使用上述1)或2)記載之濺鍍靶形成。
4)一種半導體元件,使用有上述3)記載之擴散阻擋層用薄膜。
又,本發明提供:
5)一種鉭濺鍍靶之製造方法,係對經熔解鑄造之鉭鑄錠進行鍛造及再結晶退火後,進行壓延及熱處理,於靶之濺鍍面,形成(200)面之位向率超過70%,且(222)面之位向率在30%以下的結晶組織。
6)如上述5記載之鉭濺鍍靶之製造方法,其中,對經熔解鑄造之鉭鑄錠進行鍛造及再結晶退火後,進行壓延及熱處理,於靶之濺鍍面,形成(200)面之位向率在80%以上,且(222)面之位向率在20%以下的結晶組織。
7)如上述5)或6)記載之鉭濺鍍靶之製造方法,其中,使用壓延輥直徑在500mm以下之壓延輥,以壓延速度10m/分以上、壓延率超過80%進行冷壓延。
8)如上述5)至7)中任一項記載之鉭濺鍍靶之製造方法,其以溫度900℃~1400℃進行熱處理。
9)如上述5)至8)中任一項記載之鉭濺鍍靶之製造方法,其中,在壓延及熱處理後,藉由切削、研磨進行表面精加工。
本發明之鉭濺鍍靶,藉由控制靶濺鍍面之結晶位向,而具有下述優異之效果:降低鉭靶之放電電壓,使電漿容易產生,且提升電漿之穩定性。尤其是具有下述優異之效果:可形成由Ta膜或TaN膜等構成之擴散阻擋層,該擴散阻擋層能有效防止因活潑之Cu的擴散所造成之配線周圍的污染。
本發明之鉭濺鍍靶的特徵在於:提高其濺鍍面之(200)面的位向率,並且降低(222)面之位向率。
鉭之晶體結構由於是體心立方晶格結構(簡稱BCC),故相較於(200)面,(222)面鄰接之原子間距離較短,(222)面較(200)面處於原子較密 集堆積之狀態。因此,於濺鍍之時,(222)面會較(200)面釋出更多之鉭原子,濺鍍速率(成膜速度)會變快。
於本發明中,使鉭濺鍍靶濺鍍面之(200)面的位向率超過 70%,並且使(222)面的位向率未達30%。較佳使(200)面的位向率在80%以上,且(222)面的位向率在20%以下。
藉由以此方式提高濺鍍面之(200)面的位向率且降低(222)面的位向率,而在通常之條件下,濺鍍速率(成膜速度)會變慢。然而,當無須過度提升成膜速度之情形時,由於可降低鉭靶之放電電壓,故具有容易產生電漿,可使電漿穩定之優點。
通常,藉由濺鍍形成鉭膜時,會調整電壓及電流使能以設定 之輸入電功率維持放電。然而,有時會因為一些影響使得電流降低,而想要將電功率維持在一定值,故提升電壓,通常,將此種狀態稱為放電異常。
本發明,對於鉭濺鍍靶,藉由控制靶濺鍍面之結晶位向,以降低鉭靶之放電電壓,使電漿穩定,故可抑制發生上述濺鍍時之放電異常。尤其是使放電電壓在620V以下,且使放電電壓變動在20V以下,藉此可減低放電異常發生率。
於本發明中,位向率係指:將藉由X射線繞射法所得之 (110)、(200)、(211)、(310)、(222)、(321)各繞射波峰之測定強度標準化,使各個面方位之強度的總和為100時,特定之面方位的強度比。另,標準化係使用JCPDS(Joint Committee for Powder Diffraction Standard)。
例如,(200)面之位向率(%),係[[(200)之測定強度/(200)之JCPDS強度]/Σ(各面之測定強度/各面之JCPDS強度)]×100。
本發明之鉭濺鍍靶,可用於形成銅配線之Ta膜或TaN膜等 擴散阻擋層。即使於將氮導入濺鍍時之環境來形成TaN膜之情形時,本發明之濺鍍靶藉由控制靶濺鍍面之結晶位向,亦具有可降低鉭靶之放電電壓、使電漿容易產生且提升電漿之穩定性的優異效果,故在形成具備有該Ta膜或TaN膜等擴散阻擋層之銅配線時,以及在製造具備有該銅配線之半導體元件時,可提升製品產率。
本發明之鉭濺鍍靶,係藉由下述步驟製造。若顯示其例,首 先,通常使用4N(99.99%)以上之高純度鉭作為鉭原料。藉由電子束熔解等將其熔解,並對其進行鑄造製作鑄錠或小胚(billet)。接著,對該鑄錠或小胚進行鍛造、再結晶退火。具體而言,例如進行如下操作:鑄錠或小胚-合模鍛造-1100~1400℃之溫度的退火-冷鍛造(一次鍛造)-再結晶溫度~1400℃之溫度的退火-冷鍛造(二次鍛造)-再結晶溫度~1400℃之溫度的退火。
接著,進行冷壓延。藉由調整此冷壓延之條件,可控制本發 明之鉭濺鍍靶的位向率。具體而言,壓延輥宜為輥直徑小者,較佳在500mm以下。又,壓延速度宜儘可能地快,較佳在10m/min以上。並且,於僅實施1次壓延之情形時,壓延率較佳為較高且超過80%,於反覆進行2次以上壓延之情形時,係使壓延率在60%以上,且必須使靶之最終厚度與壓延1次之情形時相同。壓延率總計宜超過80%。
接著,進行熱處理。藉由一併調整冷壓延之條件及冷壓延後 進行之熱處理條件,可控制本發明之鉭濺鍍靶的位向率。具體而言,熱處理溫度以較高為佳,較佳為900~1400℃。該溫度雖亦取決於壓延所導入之 變形量,但為了獲得再結晶組織,必須於900℃以上之溫度進行熱處理。另一方面,以超過1400℃之溫度進行熱處理,在經濟上並不佳。然後,藉由對靶表面進行機械加工、研磨加工等精加工,製成最後之製品。
藉由上述之製造步驟製造鉭靶,於本發明中尤其重要的是對於靶濺鍍面之結晶位向,提高(200)之位向率,且降低(222)之位向率。
與控制位向息息相關的主要是壓延步驟。於壓延步驟中,藉由控制壓延輥之直徑、壓延速度、壓延率等參數,可改變壓延時所導入之變形量或分佈,而可控制(200)面之位向率及(222)面之位向率。
為了有效進行面位向率之調整,需要某程度反覆設定條件,若一旦可調整(200)面之位向率及(222)面之位向率,則藉由設定其製造條件,而可製造恆常特性(具有一定程度之特性)之靶。
通常,於製造靶之情形時,較有效的是使用壓延輥直徑在500mm以下之壓延輥,使壓延速度在10m/min以上,1道次之壓延率為8~12%。然而,只要為可達成本發明之結晶位向的製造步驟,則並不一定僅限定於此製造步驟。下述之條件設定是有效的:於一連串之加工中,以鍛造、壓延破壞鑄造組織,且充分地進行再結晶化。
並且,宜在對經熔解鑄造而成之鉭鑄錠或小坯進行鍛造並施以壓延等加工之後,進行再結晶退火,使組織微細且均勻化。
實施例
接著,基於實施例說明本發明。以下所示之實施例僅是為了容易理解,本發明並不受該此等實施例限制。亦即,本發明當然包含基於本發明之技術思想的變形及其他實施例。
對純度99.995%之鉭原料進行電子束熔解,對其進行鑄造製成直徑195mm之鑄錠。接著,以室溫對該鑄錠進行合模鍛造製成直徑150mm,並以1100~1400℃之溫度對其進行再結晶退火。再次以室溫對其進行鍛造製成厚度100mm、直徑150mm(一次鍛造),並以再結晶溫度~1400℃之溫度對其進行再結晶退火。進一步以室溫對其進行鍛造製成厚度70~100mm、直徑150~185mm(二次鍛造),並以再結晶溫度~1400℃之溫度對其進行再結晶退火,而製得靶原材料。
(實施例1)
於實施例1,使用壓延輥直徑為400mm之壓延輥,以壓延速度10m/min、壓延率86%,對所製得之靶原材料進行冷壓延,製成厚度14mm、直徑520mm,並以1000℃之溫度對其進行熱處理。然後,對表面進行切削、研磨而製成靶。
藉由以上步驟,可獲得具有(200)面之位向率為84.3%、(222)面之位向率為9.9%之結晶組織的鉭濺鍍靶。
使用該濺鍍靶實施濺鍍,結果放電電壓為613.5V,放電電壓變動為7.1V,放電異常發生率為3.5%,呈良好之狀態。將此結果示於表1。
通常於計算放電異常發生率之情形時,係藉由下述方式進 行:將電壓到達電源上限值1000V之次數除以總放電次數,而於本實施例中,亦以該條件進行。鉭膜之成膜係以下述條件進行(以下之實施例、比較例亦同)。
<成膜條件>
電源:直流方式
功率:15kW
到達真空度:5×10-8Torr
環境氣體組成:Ar
濺鍍氣壓:5×10-3Torr
濺鍍時間:15秒
(實施例2)
於實施例2,使用壓延輥直徑為400mm之壓延輥,以壓延速度15m/min、壓延率88%,對所製得之靶原材料進行冷壓延,製成厚度14mm、直徑520mm,並以900℃之溫度對其進行熱處理。然後,對表面進行切削、研磨而製成靶。
藉由以上步驟,可獲得具有(200)面之位向率為77.7%、(222)面之位向率為16.2%之結晶組織的鉭濺鍍靶。
使用該濺鍍靶實施濺鍍,結果放電電壓為614.7V,放電電壓變動為12.3V,放電異常發生率為5.8%,呈良好之狀態。將此結果示於表1。
(實施例3)
於實施例3,使用壓延輥直徑為400mm之壓延輥,以壓延速度20m/min、壓延率82%,對所製得之靶原材料進行冷壓延,製成厚度14mm、直徑520mm,並以1100℃之溫度對其進行熱處理。然後,對表面進行切削、研磨而製成靶。藉由以上步驟,可獲得具有(200)面之位向率為74.3%、(222)面之位向率為14.8%之結晶組織的鉭濺鍍靶。使用該濺鍍靶實施濺鍍,結果放電電壓為603.2V,放電電壓變動為18.2V,放電異常發生率為6.0%,呈良好之狀態。將此結果示於表1。
(實施例4)
於實施例4,使用壓延輥直徑為500mm之壓延輥,以壓延速度15m/min、壓延率90%,對所製得之靶原材料進行冷壓延,製成厚度14mm、直徑520mm,並以800℃之溫度對其進行熱處理。然後,對表面進行切削、研磨而製成靶。藉由以上步驟,可獲得具有(200)面之位向率為71.4%、(222)面之位向率為20.7%之結晶組織的鉭濺鍍靶。使用該濺鍍靶實施濺鍍,結果放電電壓為614.1V,放電電壓變動為15.3V,放電異常發生率為7.0%,呈良好之狀態。將此結果示於表1。
(實施例5)
於實施例5,使用壓延輥直徑為500mm之壓延輥,以壓延速度20m/min、壓延率84%,對所製得之靶原材料進行冷壓延,製成厚度14mm、直徑520mm,並以1400℃之溫度對其進行熱處理。然後,對表面進行切削、研磨而製成靶。藉由以上步驟,可獲得具有(200)面之位向率為70.8%、(222)面之位向率為19.7%之結晶組織的鉭濺鍍靶。使用該濺鍍靶實施濺鍍,結果放電電壓為611.2V,放電電壓變動為12.2V,放電異常發生率為8.1%,呈良好之狀態。將此結果示於表1。
(比較例1)
於比較例1,使用壓延輥直徑為650mm之壓延輥,以壓延速度15m/min、壓延率80%,對所製得之靶原材料進行冷壓延,製成厚度14mm、直徑520mm,並以800℃之溫度對其進行熱處理。然後,對表面進行切削、研磨而製成靶。藉由以上步驟,可獲得具有(200)面之位向率為43.6%、(222)面之位向率為39.1%之結晶組織的鉭濺鍍靶。使用該濺鍍靶實施濺鍍,結 果放電電壓為622.5V,放電電壓變動為17.0V,放電異常發生率為16.6%,呈不佳之狀態。將此結果示於表1。
(比較例2)
於比較例2,使用壓延輥直徑為500mm之壓延輥,以壓延速度10m/min、壓延率78%,對所製得之靶原材料進行冷壓延,製成厚度14mm、直徑520mm,並以800℃之溫度對其進行熱處理。然後,對表面進行切削、研磨而製成靶。藉由以上步驟,可獲得具有(200)面之位向率為60.1%、(222)面之位向率為24.0%之結晶組織的鉭濺鍍靶。使用該濺鍍靶實施濺鍍,結果放電電壓為627.0V,放電電壓變動為18.0V,放電異常發生率為20.5%,呈不佳之狀態。將此結果示於表1。
(比較例3)
於比較例3,使用壓延輥直徑為500mm之壓延輥,以壓延速度15m/min、壓延率85%,對所製得之靶原材料進行冷壓延,製成厚度14mm、直徑520mm,並以800℃之溫度對其進行熱處理。然後,對表面進行切削、研磨而製成靶。藉由以上步驟,可獲得具有(200)面之位向率為51.4%、(222)面之位向率為37.3%之結晶組織的鉭濺鍍靶。使用該濺鍍靶實施濺鍍,結果放電電壓為624.0V,放電電壓變動為25.1V,放電異常發生率為26.2%,呈不佳之狀態。將此結果示於表1。
(比較例4)
於比較例4,使用壓延輥直徑為650mm之壓延輥,以壓延速度20m/min、壓延率86%,對所製得之靶原材料進行冷壓延,製成厚度14mm、直徑520mm,並以1000℃之溫度對其進行熱處理。然後,對表面進行切削、 研磨而製成靶。藉由以上步驟,可獲得具有(200)面之位向率為66.2%、(222)面之位向率為31.0%之結晶組織的鉭濺鍍靶。使用該濺鍍靶實施濺鍍,結果放電電壓為603.4V,放電電壓變動為28.4V,放電異常發生率為18.3%,呈不佳之狀態。將此結果示於表1。
如以上之實施例及比較例所示,位於本發明之條件範圍者,具有下述優異之效果:降低鉭靶之放電電壓,使電漿容易產生,且提升電漿之穩定性。亦即,相較於比較例,具有下述優異之效果:可使放電電壓降低,並可抑制放電電壓之變動,及可減低放電異常發生率。
本發明提供一種鉭濺鍍靶,藉由控制靶濺鍍面之結晶位向,而具有下述效果:降低鉭靶之放電電壓,使電漿容易產生,且提升電漿之穩定性。本發明之鉭濺鍍靶,尤其適用於形成由Ta膜或TaN膜等構成之擴散阻擋層,該擴散阻擋層可有效防止因活潑之Cu的擴散所造成之配線周圍的污染。

Claims (9)

  1. 一種鉭濺鍍靶,於其濺鍍面,(200)面之位向率超過70%,且(222)面之位向率在30%以下。
  2. 如申請專利範圍第1項之鉭濺鍍靶,於其濺鍍面,(200)面之位向率在80%以上,且(222)面之位向率在20%以下。
  3. 一種擴散阻擋層用薄膜,係使用申請專利範圍第1或2項之濺鍍靶而形成。
  4. 一種半導體元件,使用有申請專利範圍第3項之擴散阻擋層用薄膜。
  5. 一種鉭濺鍍靶之製造方法,係對經熔解鑄造之鉭鑄錠進行鍛造及再結晶退火後,進行壓延及熱處理,於靶之濺鍍面,形成(200)面之位向率超過70%,且(222)面之位向率在30%以下的結晶組織。
  6. 如申請專利範圍第5項之鉭濺鍍靶之製造方法,其中,對經熔解鑄造之鉭鑄錠進行鍛造及再結晶退火後,進行壓延及熱處理,於靶之濺鍍面,形成(200)面之位向率在80%以上,且(222)面之位向率在20%以下的結晶組織。
  7. 如申請專利範圍第5或6項之鉭濺鍍靶之製造方法,其中,使用壓延輥直徑在500mm以下之壓延輥,以壓延速度10m/分以上、壓延率超過80%進行冷壓延。
  8. 如申請專利範圍第5至7項中任一項之鉭濺鍍靶之製造方法,其以溫度900℃~1400℃進行熱處理。
  9. 如申請專利範圍第5至8項中任一項之鉭濺鍍靶之製造方法,其中,在壓延及熱處理後,藉由切削、研磨進行表面精加工。
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