TW201312714A - 堆疊式基板模組 - Google Patents

堆疊式基板模組 Download PDF

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TW201312714A
TW201312714A TW100132410A TW100132410A TW201312714A TW 201312714 A TW201312714 A TW 201312714A TW 100132410 A TW100132410 A TW 100132410A TW 100132410 A TW100132410 A TW 100132410A TW 201312714 A TW201312714 A TW 201312714A
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substrate
stacked
solderable
pads
module
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TW100132410A
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Hsun-Fa Li
Yun-Tsung Li
Chun-Chi Chiu
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Universal Scient Ind Shanghai
Universal Global Scient Ind Co
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Priority to TW100132410A priority Critical patent/TW201312714A/zh
Priority to US13/282,554 priority patent/US20130062111A1/en
Priority to DE102011054961A priority patent/DE102011054961A1/de
Publication of TW201312714A publication Critical patent/TW201312714A/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/13Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49805Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49833Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the chip support structure consisting of a plurality of insulating substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/141One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/117Pads along the edge of rigid circuit boards, e.g. for pluggable connectors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/144Stacked arrangements of planar printed circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/04Assemblies of printed circuits
    • H05K2201/042Stacked spaced PCBs; Planar parts of folded flexible circuits having mounted components in between or spaced from each other
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10378Interposers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431Details of mounted components
    • H05K2201/10439Position of a single component
    • H05K2201/10477Inverted
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2018Presence of a frame in a printed circuit or printed circuit assembly
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04Soldering or other types of metallurgic bonding
    • H05K2203/0465Shape of solder, e.g. differing from spherical shape, different shapes due to different solder pads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3436Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3442Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Combinations Of Printed Boards (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

一種堆疊式基板模組,包括第一基板與第二基板。第一基板具有數個銲墊,且上述銲墊分別自第一基板的堆疊區內延伸至堆疊區外。第二基板外側邊具有數個可銲端,上述可銲端分別自第二基板外側邊延伸至第二基板上下兩表面。其中,第二基板堆疊於第一基板之堆疊區內,且第二基板側邊與堆疊區邊緣對齊,所述銲墊與可銲端的位置相對應。並且,所述銲墊與可銲端之間適於置放錫膏,並經由迴銲以連接銲墊與可銲端。藉此,提供一種得以目測方式檢測銲接情況的堆疊式基板模組。

Description

堆疊式基板模組
本發明是有關一種基板模組,且特別是有關於一種堆疊式基板模組。
有關習用的雙基板模組,其所採用的兩基板尺寸皆相同,亦即,上述兩基板的周緣大致呈齊平狀。因此,當雙基板模組欲銲接於電路板時,雙基板模組僅得利用對應電路板銲接面的表面進行銲接,此將無法使雙基板模組達到側面吃錫的效果,進而易導致銲接良率不高,且目測不易得知銲接是否有缺失(如空銲)。
本發明實施例在於提供一種堆疊式基板模組,其利於製造者以目測方式判斷銲接結果。
本發明實施例提供一種堆疊式基板模組,包括:一第一基板,其具有數個銲墊,且該些銲墊分別自該第一基板的一堆疊區內延伸至該堆疊區外;以及一第二基板,其外側邊具有數個可銲端,該些可銲端分別自該第二基板外側邊延伸至該第二基板上下兩表面;其中,該第二基板堆疊於該第一基板之該堆疊區內,且該第二基板側邊與該堆疊區邊緣對齊,該些銲墊與該些可銲端的位置相對應,該些銲墊與該些可銲端之間適於置放錫膏,並經由迴銲以連接該些銲墊與該些可銲端。
綜上所述,本發明實施例所提供的堆疊式基板模組藉由第二基板堆疊於第一基板之堆疊區內,且第二基板側邊與堆疊區邊緣對齊,以利製造者以目測方式判斷第一與第二基板的銲接結果是否有缺失。
為使能更進一步瞭解本發明之特徵及技術內容,請參閱以下有關本發明之詳細說明與附圖,但是此等說明與所附圖式僅係用來說明本發明,而非對本發明的權利範圍作任何的限制。
[第一實施例]
請參閱圖1至圖9所示,其為本發明的第一實施例,其中,圖1、圖5至圖6、和圖9為本實施例的立體示意圖,圖2至圖4、圖7、和圖8為本實施例的平面示意圖。
復參照圖1所示,本實施例為一種堆疊式基板模組,包括相互堆疊的第一基板1與第二基板2。上述第一基板1具有數個銲墊11,且所述銲墊11分別自第一基板1的堆疊區12內延伸至堆疊區12外。
更詳細的說,所述第一基板1表面可區分為檢測區13、堆疊區12、及元件區14。上述檢測區13位於堆疊區12外側,且所述銲墊11分別自堆疊區12延伸至檢測區13。而元件區14位於堆疊區12內側,且元件區14可形成有數個用以銲接電子元件3的銲墊141,藉以使電子元件3銲接於元件區14。此外,第一基板1的另一表面亦可用以銲接電子元件3’(如圖2所示)。
所述第二基板2的外形大致對應於第一基板1的堆疊區12。再者,第二基板2外側邊具有數個可銲端21,且上述可銲端21分別自第二基板2外側邊延伸至第二基板2上下兩表面。
更詳細的說,每一可銲端21的截面呈U形(如圖3所示),亦即,每一可銲端21自第二基板2外側邊朝同一方向彎折延伸至第二基板2上下兩表面,且每一可銲端21位於第二基板2上下兩表面的部位相互對應。
所述第二基板2堆疊於第一基板1之堆疊區12內,且第二基板2側邊與堆疊區12邊緣對齊,上述銲墊11與可銲端21的位置相對應。並且,銲墊11與可銲端21之間適於置放錫膏(solder paste)4(如圖3所示),上述錫膏4可經由迴銲(Reflow)以連接銲墊11與可銲端21。
更詳細的說,置放於可銲端21與銲墊11之間的錫膏4,其經由迴銲所產生的附著物因受到內聚力的影響(傾向與可銲接材料相互鍵結),使其延伸至可銲端21位於第二基板2外側邊的部位(如圖4所示)。
藉此,上述錫膏4經迴銲後,可使其與第二基板2的連接面積增加,進而使第一基板1和第二基板2的結合更為穩固。並且,如圖5所示,製造者得以目測的方式觀察錫膏4迴銲所產生的附著物是否延伸至可銲端21位於第二基板2外側邊的部位,藉以判斷第一基板1與第二基板2是否有銲接上的缺失(如:空銲)產生。
此外,於本實施例中,第二基板2以方環狀為例,但於實際應用時,第二基板2亦可為L狀、直線狀、或其他合適形狀。當第二基板2呈L狀時,堆疊式基板模組經迴銲後可形成如圖5A所示之結構。
再者,請參閱圖6和圖7所示,上述第二基板2上下兩表面的其中一表面銲接於第一基板1,而另一表面得用以銲接於電路板5。所述電路板形成有數個銲接墊51,且上述銲接墊51的形狀與位置大致對應於第一基板1的銲墊11。並且,第二基板2的可銲端21與電路板5的銲接墊51之間適於置放錫膏4’,所述錫膏4’可經由迴銲以連接銲接墊51與可銲端21。
更詳細的說,置放於可銲端21與銲接墊51之間的錫膏4’,其經由迴銲所產生的附著物因受到內聚力的影響(傾向與可銲接材料相互鍵結),使其延伸至可銲端21位於第二基板2外側邊的部位(如圖8所示)。
藉此,上述錫膏4’經迴銲後,可使其與第二基板2的連接面積增加,進而使第二基板2和電路板5的結合更為穩固。並且,如圖9所示,製造者得以目測的方式觀察錫膏4’迴銲所產生的附著物是否延伸至可銲端21位於第二基板2外側邊的部位,藉以判斷電路板5與第二基板2是否有銲接上的缺失(如:空銲)產生。
[第二實施例]
請參閱圖10所示,其為本發明的第二實施例,本實施例與第一實施例類似,差異主要在於第二基板2外側邊凹設形成有數個凹槽22。
更詳細的說,上述凹槽22呈弧狀且貫通第二基板2上下兩表面,並且可銲端21分別位於凹槽22且延伸至第二基板2上下兩表面。因此,置放於可銲端21與銲墊11之間的錫膏4(圖未示),其經由迴銲所產生的附著物將延伸至可銲端21位於上述凹槽22的部位。藉此,本實施例可增加第二基板2的銲接面積,以使第一基板1與第二基板2的接合更為穩固。
同理,本實施例的第二基板2用以銲接於電路板5時(圖未示),由於置放於可銲端21與銲接墊51之間的錫膏4’,其經由迴銲所產生的附著物將延伸至可銲端21位於上述凹槽22的部位。藉以使第二基板2的銲接面積增加,進而令電路板5與第二基板2的接合更為穩固。
[實施例的功效]
根據本發明實施例,上述堆疊式基板模組可藉由錫膏4、4’經迴銲所產生的附著物延伸至可銲端21位於第二基板2外側邊的部位,使第二基板2上下兩表面分別更為穩固地連接於第一基板1和電路板5。
並且,製造者得以目測的方式觀察錫膏4、4’迴銲所產生的附著物是否延伸至可銲端21位於第二基板2外側邊的部位,藉以判斷第二基板2是否與第一基板1或電路板5產生銲接上的缺失。
此外,藉由第二電路板5的凹槽22設計,可令第二基板2的可銲接面積增加,進而使第二基板2上下兩表面分別更為穩固地連接於第一基板1和電路板5。
以上所述僅為本發明之實施例,其並非用以侷限本發明之專利範圍。
1...第一基板
11...銲墊
12...堆疊區
13...檢測區
14...元件區
141...銲墊
2...第二基板
21...可銲端
22...凹槽
3、3’...電子元件
4、4’...錫膏
5...電路板
51...銲接墊
圖1為本發明堆疊式基板模組的立體分解示意圖;
圖2為本發明堆疊式基板模組第一基板兩表面皆銲接電子元件的平面示意圖;
圖3為本發明堆疊式基板模組第一與第二基板之間設置有錫膏的平面示意圖;
圖4為本發明堆疊式基板模組設置於第一與第二基板之間的錫膏經迴銲後的平面示意圖;
圖5為本發明堆疊式基板模組設置於第一與第二基板之間的錫膏經迴銲後的立體示意圖;
圖5A為本發明堆疊式基板模組第二基板呈L狀,且設置於第一與第二基板之間的錫膏經迴銲後的立體示意圖;
圖6為本發明堆疊式基板模組用以設置於電路板的立體示意圖;
圖7為本發明堆疊式基板模組第二基板與電路板之間設置有錫膏的平面示意圖;
圖8為本發明堆疊式基板模組設置於第二基板與電路板之間的錫膏經迴銲後的平面示意圖;
圖9為本發明堆疊式基板模組設置於第二基板與電路板之間的錫膏經迴銲後的立體示意圖;及
圖10為本發明堆疊式基板模組第二實施例的立體示意圖。
1...第一基板
11...銲墊
2...第二基板
21...可銲端

Claims (10)

  1. 一種堆疊式基板模組,包括:一第一基板,其具有數個銲墊,且該些銲墊分別自該第一基板的一堆疊區內延伸至該堆疊區外;以及一第二基板,其外側邊具有數個可銲端,該些可銲端分別自該第二基板外側邊延伸至該第二基板上下兩表面;其中,該第二基板堆疊於該第一基板之該堆疊區內,且該第二基板側邊與該堆疊區邊緣對齊,該些銲墊與該些可銲端的位置相對應,該些銲墊與該些可銲端之間適於置放錫膏,並經由迴銲以連接該些銲墊與該些可銲端。
  2. 如申請專利範圍第1項所述之堆疊式基板模組,其中,置放於該些可銲端與該些銲墊之間的錫膏,其經由迴銲所產生的附著物延伸至該些可銲端位於該第二基板外側邊的部位。
  3. 如申請專利範圍第2項所述之堆疊式基板模組,其中,該第一基板具有一檢測區,該檢測區位於該堆疊區外側,該些銲墊分別自該堆疊區延伸至該檢測區。
  4. 如申請專利範圍第1項所述之堆疊式基板模組,其中,該第一基板具有一元件區,該元件區位於該堆疊區內側,該第一基板的元件區用以銲接至少一電子元件。
  5. 如申請專利範圍第1項所述之堆疊式基板模組,其中,每一可銲端自該第二基板外側邊朝同一方向彎折延伸至該第二基板上下兩表面。
  6. 如申請專利範圍第1項所述之堆疊式基板模組,其中,每一可銲端的截面呈U形,且每一可銲端位於該第二基板上下兩表面的部位相互對應。
  7. 如申請專利範圍第1項所述之堆疊式基板模組,其中,該第二基板上下兩表面的其中一表面銲接於該第一基板,另一表面用以銲接於一電路板。
  8. 如申請專利範圍第7項所述之堆疊式基板模組,其中,該電路板形成有數個銲接墊,該些銲接墊的位置與形狀大致對應於該第一基板的該些銲墊,該第二基板的該些可銲端與該電路板的該些銲接墊之間適於置放錫膏,並經由迴銲以連接該些銲接墊與該些可銲端。
  9. 如申請專利範圍第8項所述之堆疊式基板模組,其中,置放於該些可銲端與該些銲接墊之間的錫膏,其經由迴銲所產生的附著物延伸至該些可銲端位於該第二基板外側邊的部位。
  10. 如申請專利範圍第1項所述之堆疊式基板模組,其中,該第二基板外側邊凹設形成數個凹槽,該些凹槽呈弧狀且貫通該第二基板上下兩表面,該些可銲端分別位於該些凹槽且延伸至該第二基板上下兩表面。
TW100132410A 2011-09-08 2011-09-08 堆疊式基板模組 TW201312714A (zh)

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