TW201203348A - Plasma etching method - Google Patents

Plasma etching method Download PDF

Info

Publication number
TW201203348A
TW201203348A TW099125078A TW99125078A TW201203348A TW 201203348 A TW201203348 A TW 201203348A TW 099125078 A TW099125078 A TW 099125078A TW 99125078 A TW99125078 A TW 99125078A TW 201203348 A TW201203348 A TW 201203348A
Authority
TW
Taiwan
Prior art keywords
film
etching
pattern
plasma
protective film
Prior art date
Application number
TW099125078A
Other languages
English (en)
Chinese (zh)
Inventor
Kazumasa Ookuma
Akito Kouchi
Kenichi Kuwahara
Michikazu Morimoto
Go Saito
Original Assignee
Hitachi High Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi High Tech Corp filed Critical Hitachi High Tech Corp
Publication of TW201203348A publication Critical patent/TW201203348A/zh

Links

Classifications

    • H10P50/244—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H01L21/31133—Etching organic layers by chemical means
    • H01L21/31138—Etching organic layers by chemical means by dry-etching
    • H10P50/283—
    • H10P50/287—
    • H10P50/73—
    • H10P76/2041—

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Inorganic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
TW099125078A 2010-07-01 2010-07-29 Plasma etching method TW201203348A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010150710A JP2012015343A (ja) 2010-07-01 2010-07-01 プラズマエッチング方法

Publications (1)

Publication Number Publication Date
TW201203348A true TW201203348A (en) 2012-01-16

Family

ID=45400037

Family Applications (1)

Application Number Title Priority Date Filing Date
TW099125078A TW201203348A (en) 2010-07-01 2010-07-29 Plasma etching method

Country Status (4)

Country Link
US (1) US20120003838A1 (enExample)
JP (1) JP2012015343A (enExample)
KR (1) KR101203914B1 (enExample)
TW (1) TW201203348A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI668735B (zh) * 2017-08-31 2019-08-11 Taiwan Semiconductor Manufacturing Co., Ltd. 半導體裝置及其製造方法
US11244858B2 (en) 2017-08-31 2022-02-08 Taiwan Semiconductor Manufacturing Company, Ltd. Etching to reduce line wiggling

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101425760B1 (ko) * 2010-08-27 2014-08-01 도쿄엘렉트론가부시키가이샤 에칭 방법, 기판 처리 방법, 패턴 형성 방법, 반도체 소자의 제조 방법, 및 반도체 소자
JP6173684B2 (ja) * 2012-12-25 2017-08-02 株式会社日立ハイテクノロジーズ 半導体装置の製造方法
KR102106256B1 (ko) 2013-07-03 2020-05-04 삼성전자 주식회사 포토 마스크 및 그 제조 방법
JP6748354B2 (ja) 2015-09-18 2020-09-02 セントラル硝子株式会社 ドライエッチング方法及びドライエッチング剤
WO2017170405A1 (ja) 2016-03-29 2017-10-05 東京エレクトロン株式会社 被処理体を処理する方法
JP6770848B2 (ja) 2016-03-29 2020-10-21 東京エレクトロン株式会社 被処理体を処理する方法
KR102375256B1 (ko) * 2017-05-26 2022-03-16 주성엔지니어링(주) 기판 처리 장치 및 기판 처리 방법
JP6363266B2 (ja) * 2017-06-22 2018-07-25 株式会社日立ハイテクノロジーズ 半導体装置の製造方法
JP7045954B2 (ja) 2018-07-25 2022-04-01 東京エレクトロン株式会社 ハードマスク用膜を形成する方法および装置、ならびに半導体装置の製造方法
KR102756671B1 (ko) 2019-02-21 2025-01-17 삼성디스플레이 주식회사 감광성 수지 조성물, 이를 이용한 표시 장치 및 표시 장치의 제조 방법
CN111785613B (zh) * 2019-04-04 2025-03-28 长鑫存储技术有限公司 半导体结构的形成方法以及半导体结构

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0372087A (ja) * 1989-08-10 1991-03-27 Toshiba Corp ドライエッチング方法
JP3407086B2 (ja) * 1994-06-17 2003-05-19 日本テキサス・インスツルメンツ株式会社 半導体装置の製造方法
US7361607B2 (en) * 2003-06-27 2008-04-22 Lam Research Corporation Method for multi-layer resist plasma etch
US7316785B2 (en) * 2004-06-30 2008-01-08 Lam Research Corporation Methods and apparatus for the optimization of etch resistance in a plasma processing system
US7253118B2 (en) * 2005-03-15 2007-08-07 Micron Technology, Inc. Pitch reduced patterns relative to photolithography features
US7981810B1 (en) * 2006-06-08 2011-07-19 Novellus Systems, Inc. Methods of depositing highly selective transparent ashable hardmask films
US20100330805A1 (en) * 2007-11-02 2010-12-30 Kenny Linh Doan Methods for forming high aspect ratio features on a substrate

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI668735B (zh) * 2017-08-31 2019-08-11 Taiwan Semiconductor Manufacturing Co., Ltd. 半導體裝置及其製造方法
US10475700B2 (en) 2017-08-31 2019-11-12 Taiwan Semiconductor Manufacturing Company, Ltd. Etching to reduce line wiggling
US11244858B2 (en) 2017-08-31 2022-02-08 Taiwan Semiconductor Manufacturing Company, Ltd. Etching to reduce line wiggling
US12322651B2 (en) 2017-08-31 2025-06-03 Taiwan Semiconductor Manufacturing Company, Ltd. Etching to reduce line wiggling

Also Published As

Publication number Publication date
JP2012015343A (ja) 2012-01-19
US20120003838A1 (en) 2012-01-05
KR20120002900A (ko) 2012-01-09
KR101203914B1 (ko) 2012-11-23

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