TW201201268A - Method for dicing wafer, connection method and connected structure body - Google Patents

Method for dicing wafer, connection method and connected structure body Download PDF

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Publication number
TW201201268A
TW201201268A TW100118995A TW100118995A TW201201268A TW 201201268 A TW201201268 A TW 201201268A TW 100118995 A TW100118995 A TW 100118995A TW 100118995 A TW100118995 A TW 100118995A TW 201201268 A TW201201268 A TW 201201268A
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TW
Taiwan
Prior art keywords
wafer
film
attached
cutting
adhesive layer
Prior art date
Application number
TW100118995A
Other languages
English (en)
Inventor
Junichi Nishimura
Original Assignee
Sony Chemical & Inf Device
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Publication date
Application filed by Sony Chemical & Inf Device filed Critical Sony Chemical & Inf Device
Publication of TW201201268A publication Critical patent/TW201201268A/zh

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201201268 六、發明說明： 【發明所屬之技術領域】 本發明，係關於依序積層接著層與具有透射性之保護 膜而成之附有接著膜之晶圓之切割方法、連接方法及連接 構造體。 本申請係以於日本2010年6月2日申請之日本專利申 請號2010 — 126919為基礎主張優先權者，藉由參照該申請 而援用於本申請案。 【先前技術】 COB(ChiP〇nB〇ard)等封裝、構裝方法中，存在多數個 將IC(ICtegrated Circuit)固定於基板上之方法，例如就構裝 方法而言有1C表面背面（面朝上、或面朝下），就接著層（固 定材料）而言有糊或膜、導電粒子之有無等各種方法。作為 在切割以前對晶圓貼附接著層之工法，可舉出使用 ACF(Anisotropic Conductive Film,異方性導電膜）戈 NCF(Non Particle Conductive Film，無微粒導電膜）之工法 等。使用了 ACF或NCF之工法中，接著層係位於Ic之功 能面。 晶圓之切割工法中有「雷射（Dry)」或「電漿（Dry)」、 「切刀（Wet)」。此等工法中以Dry環境（乾燥之環境）進行 之雷射或電漿之工法對加工中之污染係有利的。然而，用 於此等雷射或電漿之工法之裝置並非一般，裝置成本 切刀之三倍以上。又，在進行切割時，為了進行定位 (圖案 201201268 辨識)需圖案為可視或以IR拍攝機透視。然而，ir拍攝機 並未裝備於一般之切刀切割裝置。 又，在使用切刀切割工法分割晶圓（單片化）時，晶圓係 暫時被曝於用於加工之純水。此純水之功能之一可舉出有 洗淨。於此純水中，係右田τ > 丫诉虿因加工而削落之晶圓之屑（主要係 石夕）等分散。此等晶圆之屬當於加工構件表面無黏性（黏著性） 時係會被沖掉。然而’為具有黏性之構件之情形，晶圓之 屬係被構件捕捉而難以洗淨，而產生因切削屑導致之污 染。當切削屑附著於接著層後，由於切削屬所附著之面係 ic之功能面’因此在進行最終之構裝時，恐有切削屑接觸 (attack)於1C之功能面之情形。又，在切割薄型之晶圓時， 有於晶圓產生剝離(破損）’加工性非良好之問題。 [專利文獻] [專利文獻1]曰本特開2〇〇5 — 1〇丨29〇號公報 [專利文獻2]曰本特開2〇〇5 — 175 1 36號公報 【發明内容】 本發明係有鑑於上述習知之實情而提出者，其目的在 ^提供使切割晶圓時之加工性良好之晶圓之切割方法、 連接方法及連接構造體。 於2發明之晶圓之切割方法，其具有：貼附步驟，係將 有面具有電路圖案之晶圓之該一面依序積層接著層斑具 =之保護膜而成之附有接著膜之晶圓之另—面貼附 ^帶；拍攝步驟，係藉由接收在前述附有接著膜之晶 4 201201268 圓之一面反射而透射過前述接著層及前述保護膜之光，、 拍攝該附有接著膜之晶圓中之該晶圓之一面之影像；= 位：決定步驟’根據在前述拍攝步驟拍攝之影像，決：二 割前述附有接著膜^L a圓# , ' η $接者膜之0曰圓之位置，切削槽形成步驟 在^分割位置決定步驟決定之位置，於前述附有 =曰曰圓形成從該附有接著膜之晶圓之_面側未達另— =:切削槽’保護構件配設步驟，於形成有前述切削 分判卡π …呆邊臈之表面配設保護構件； 糟由研削配設有前述保護構件之附有接著膜之 曰a圓之另一面而將該附有接著臈 =有接著膜…，該晶片具備在於一… 圖案之晶片之一面積層有前述接著層之附有接著層之曰 片、以及前述保護膜；以及拾取步驟 曰13 之晶片拾取前述附有接著層之晶片。j、附有接者膜 本發明之連接方法’具有壓接步驟，係將以上述之晶 =割方法拾取之附有接著層之晶片透過接 :有電極之電路基板，以連接該電極 片之電路圓案。 巧按者層之日a =明之連接構造體，係藉由上述連接方法而製得。 根據本發明，能防止切割晶圓時之剝離 時之加工性良好。 曰曰圓 【實施方式】 以下，參照圖式依照以 貝序說明適用本發明之晶 201201268 之切割方法、連接方法及連接構造體之具體實施形態之一 例。 1. 晶圓之切割方法 1 -1.貼附步驟 1 - 2.拍攝步驟 1-2-1.切割裝置 1-2-2.拍攝方法 1-3.分割位置決定步驟 1-4.切削槽形成步驟 1-5.保護構件配設步驟 1-6.分割步驟 1- 7.拾取步驟 2. 連接方法及連接構造體 2- 1.壓接步驟 3. 其他實施形態 4. 實施例 < 1.晶圓之切割方法> 如圖1所示，本實施形態之晶圓之切割方法，具有貼 附步驟S 1、拍攝步驟S2、分割位置決定步驟S3、切削槽形 成步驟S4、保護構件配設步驟S5、分割步驟S6、拾取步驟 S7 ° < 1 -1 ·貼附步驟〉 如圖2、圖3所示，貼附步驟S1中，係將附有接著膜 之晶圓39之另一面1 Ob貼附於切割帶18，該晶圓39係將 201201268 接者層22與具有透射性 .A <保邊膜24依序積層在於—面 有電路圖案即突塊16之 很 面具 ,0μ ^ 日囫1(3之—面（表面）而成。例如， 在貼附步驟S1中係進行如下之處理。 首先如圖2所不，將所準備之晶圓1 〇固定於治具1 2。 作為晶圓1 〇，能嚴φ ^ 。 牛出例如石夕晶圓等半導體晶圓。於曰 圓10之一面1 〇 a形成有格 日日 百格子狀之劃線14。於晶圓1 〇之— 面l〇a形成有電路圖案即突塊16。 a _ 1 2具備例如具有較晶圓！ 〇直徑大之直徑之環狀 或框狀之框架20與-面具有接著性之切割帶18。 切割帶18係例如貼附於框架2〇之一面側，展開於框 架2〇之内側。晶目10例如貼附於治具12之中央部。又， 晶圓10 -面1〇a(以下亦稱為「功能面心」）之另—面（相 反側之面）1〇b貼附於切割帶18。作為切割帶18，係使用例 如會因照射紫外線而剝離力變小之黏著膜。藉政匕，在將晶 圓10分割成複數個晶片21後，藉由對切割帶18照射紫外 線’在拾取各個晶片21日寺能從切割帶18容易地分離晶片 2卜 接著，如圖3所示，於晶圓1〇之功能面心配置積層 保護膜24與接著層22而構成之接著膜26。 接著層22包含例如膜形成樹脂、液狀硬化成分及硬化 劑。又，接著層22,亦可包含例如各種橡膠成分、柔軟劑、 各種填料類等添加劑或導電性粒子。接著層22可係 NCF(Non Panicle Conductive Film，無微粒導電膜）或 ACF(Anis〇tr〇pic Conductive Film，異方性導電膜）、或積層 201201268 有該等者。 / 乍為膜形成樹脂能例示苯氧基樹脂、聚醋樹脂、聚醯 树脂、聚醯亞胺樹脂。臈形成樹脂，從材料之取得容易 逆接了隸之觀點來看，最好係包含苯氧基樹脂。作 ··.、液狀硬化成》’能例示液狀環氧樹脂、丙烯酸。液狀硬 化成分，從連接可靠性及硬化物穩定性之觀點來看最好 係具有2以上之官能基。作為硬化劑，在液狀硬化成分為 液狀環氧樹脂之情形’能例示味唾、胺類、疏鹽、鏽鹽、 齡類。液狀硬化成分為丙稀酸之情形，能例示有機過氧化 物作為硬化劑。 接著層22之厚度最好係突塊16之高度以上之厚度。 亦即’接著層22之厚度最好係能覆蓋突塊i 6之厚度。 "保護膜24係在使用切割裝置等分割晶1〇時防止切 削層等附著於接著層22。料保護犋24，能舉出例如聚酯 膜、聚對苯二甲酸乙二醋膜等塑膠材料、冑品質紙、玻璃 紙之紙類等。 作為保護膜24，能使用例如具有透射可視光之功能 者。藉此’即使係使用廉價之光學系統，亦能在將保護膜 24及接著層22貼附於晶圓10之狀態下拍攝晶圓1〇表面之 影像。亦即，即使不使用如汛拍攝機之類高價之光學系統， 亦能拍攝形成於晶圓1〇之功能面之劃線14、突塊丨6 '對 準標記等之影像。 保護膜24亦可吸收可視光中特定波長之光。保護膜24 亦可吸收波長為440nm以上70〇nma下之光中特定波長之 201201268 光此清形下，在拍攝晶圓10表面之可視光影像後，在該 可視光影像保護膜24存在之區域係被著色。藉此，能根： 拍攝晶圓ίο表面之可視光影像’判別保護臈24之有無。 即使係保護膜24吸收特定波長之光之情形，在保嘆 Μ可使可視光t上述料波長之光以外之光充分透射時， 在保護膜24存在之區域中能判別晶® e 保護膜24之厚度最好係5Q〜⑽之範圍。在保護 膜24之厚度未滿心爪時，會有使用切割裝置等分割晶圓 之步驟途令保護臈24從接著層22剝離之情形與保護 膜24之厚度為5〇_以上之情形相較加工性較差。若保護 膜24之厚度超過刚㈣，則於保護膜24上塗布接著層η 而製造接著膜26時，於保護膜24上會難以塗布接著層η。 保護臈24與接著層22之間之剝離力最好係(Μ7Ν/ 5cm以上。此處’所謂保護膜24與接著層22之間之剝離力 係根據例如；ISZG237 _示於18G度方向呈了_離之時之 剝離力。保護膜24與接著層22之間之剝離力未滿Ο.·〆 5cm時，會有使用切割裝置等分割晶圓ι〇之步驟、亦即於 後詳述之分割步驟S6途中後述之附有接著膜之晶片“從 保護膜24剝離之情形，與保護膜24與接著層22之間之剝 離力係0.1 7N/ 5cm以上之情形相較加工性較差。又，保護 膜24與接著層22之間之剝離力最好係2.0N/5cm以下。 其原因在於’在保護膜24與接著廣22之間之剝離力超過 2顧/5°"時’會有保護膜僅-部分剝離而殘留，於拾取步 驟S7中之剝離性變得不良好之故。 201201268 保護膜24與接著層22之間之剝離力能藉由對保護膜 24表面施以離模處理來調整。離模處理，例如能藉由將石夕 系之剝離劑塗布於保護膜24表面後，加熱保護膜24而使 保護膜24乾燥來實施。 保護膜24與接著層22之間之剝離力亦可較依據圖2 說明之於治具12接著晶圓1〇之階段中晶圓1〇與切割帶18 之剝離力小。藉此，如於後詳述，能於拾取步驟S7中使加 工晶圓1 0後之保護膜24之剝離性良好。 接著膜26最好係波長為440nm以上、70〇nm以下之光 之透射率為74%以上。此光之透射率’能藉由保護膜24或 接著層22之材質、厚度、表面處理等來調整。光之透射率， 能2由添加於保護膜24或接著層22之添加劑之種類或添 加量來調整。例如’藉由於接著層22添加無機填料： 控制接著層22之光之透射率。藉由机 b ^干稽田叹成此種透射率，即能 t上所述，即使不使用如1尺拍攝機之類高價之光學系統， 2拍攝形成於晶圓1〇之功能面之劃線M、突塊16:對 準標記等之影像。 對 …处波长馬440nm以上、7〇〇細以下之光 于率’係指波長為440nm以上、 700nm以下之光之透剔 之最大值為74%以上。又，异夕凑 ^ ^ . a 透射率會因接著膜26之 度而相異。因此’所謂光之透射 10之狀態下接著膜26之厚度中 ：貼附於晶 aa 尤之透射率。例如，垃 膜26亦可係在440nm以上、〜 接 射率為74〇/〇以上。 王軏圍之光之 10 201201268 其次，例如圖3所示，使用按壓裝置28將接著膜％ 貼附於晶圓1 0。 按壓裝置28具備例如載台30與壓接頭32。載二3〇載 置例如晶圓10。又，晶圓1〇係在被治具12保持之狀離下 載置於載台30。又，載台30具有例如加熱裝置34。此^卜， 在將接著膜26貼附於晶圓1〇之階段中，亦 』J +使用加熱 裝置34。 壓接頭32例如圖3所示具有按壓構件％與保持按壓 構件36之保持部38。壓接頭32係將按壓構件36往載台 儿側按壓。按壓構件3 6以例如彈性體構成。能使用石夕橡: 荨之彈性體（elast。贿）^藉此，與金屬製之按壓構件相較: 能將接著膜26均一地貼附於晶圓1〇。 接著，按壓裝置28係將於表面配置有接著膜％之曰 二:°夹於載台3〇與壓接頭32之間按壓。亦即，以保持： 之按壓構件36將接著膜26㈣於晶目1。之功 猎此，能將接著膜26貼附於晶圓1〇。 ^以上方式’於貼附步驟81中，附有膜之晶圓中之 曰曰〇之另一面被貼附於切割帶。 "^^拍攝步驟〉 拍攝步驟S2，係藉由技％ + 圓10之^ 接收在附有接著膜之晶圓39之晶 < —面l〇a(以下稱為「a 射而读μ 日日圓10之功能面10a」。；)反 耵而透射過接著層22及 )汉 之影像。 ’、、之光，以拍攝功能面1 〇a -2-1 ·切割裝置> 201201268 拍攝步驟S2,係使用例如圖4所示之切割裝置4〇。切 割裝置40,具備夾頭平纟42、對準載纟44、拍攝部μ、 切削部48、以及控制部52。 夾頭平台42係藉由例如未圖示之減驅裝置吸引治具 1 2，並將治具丨2固定於夾頭平台42上。 對準載台44係根據例如控制部52之指示使夾頭平台 42移動於χ方向及丫方向。 :攝部46具有例如照明晶圓1〇之照明構件、接收在 ., 九學系統、拍攝光學系統所捕捉之 ::拍攝元件。拍攝部46藉由接收在晶圓〖。之功能面⑽ =透射過接著層22及保護膜24之光，以拍攝晶圓ι〇 之影像。拍攝部46係將所拍攝之影像之資訊 發送至控制部52。拍攝部46雖盔 it ^ 4r ^ …特別限疋，但從能使用廉 先W理由來看’最好係、拍攝可見光影像。 刀削部48係根據控制部52之指示，切削晶圓10。切 削4 48具有例如切削晶圓1() τι ^ ^ „ 刀刀50。切削部48係將旋 轉之切刀50按壓於晶圓1〇以切削晶圓1〇等。 驅動部56係從控制部52之与 晶圓H)之位… ”2之衫像處理部54接收與分刻 日日圓I υ之位置相關之資 10之位置動$ %係根據與分割晶圆 之 =相關之資讯，驅動對準載台料及切削部^。藉 切。U裝置40能將晶圓1〇分割（單片 ^。。·拍攝方法〉 拍攝步驟S2，係例如使用 處理。 使用上迷之切割裝置40進行下述 12 201201268 首先，拍攝部46藉由垃 而透射過接著層22及保護膜24:光1〇?力能面_反射 能面心之影像1次，拍攝::攝晶圓之功 至控制部仏其次，㈣裝置4()^t拍攝之影像發送 攝部46所拍攝之影像之資訊。〜像處理部54接收拍 <1_3.分割位置決定步驟> 像^割位置決定步驟S3,係根據在拍攝步驟S2拍攝之影 二了割附有接著膜之晶圓39之位置。例如分割位置 ^步驟S3係、如圖5所示，影像處理部M從晶圓ι〇之功 月b面1 〇a之影像辨識劃 圓1。之位置。 線4之位置’決定沿劃線14分割晶 <1-4.切削槽形成步驟> :削槽形成步驟S4，係例如圖6所示，根據在分割位 /'疋步驟S3決定之位置，於附有接著膜之晶圓39形成 從附有接著膜之晶圓39之—面39a側未達另—面州之深 度之切削槽6 1。 例如，切削槽形成步驟S4，係使用上述圖5所示之切 割裝置40進行以下之處理。 首先’在影像處理部54決定沿劃線14將晶圓1〇於χ 方向分割時，驅動部56係驅動對準載台44，使夾頭平台 42移動而使劃線14之一端位於切刀5〇之下方。 其次，驅動部56驅動切削部48，在使切刀5〇已旋轉 之狀態下使切削部4 8移動至下方，使切刀5 〇壓接於晶圓 10 〇 13 201201268 其次，驅動部56驅動對準載 x方向。 使日日圓1〇移動於 藉此’切削槽形成步驟S”，係沿劃線 10,形成從附有接著膜之晶圓39之_自 二曰= 3:广之切削槽61、亦即形成形成有與晶片 相當之深度之切削槽61之附有接著膜之晶圓39。 < 1 - 5.保護構件配設步驟> 保護構件配設步驟S5，係於在㈣槽形成步驟 有切削槽ό 1之附有接著膜之曰 ν成 設保護構件62。 圓39之保護膜24之表面配 2如圖7(A)、圖7(Β)所示，保護構件配設步驟W，係 附接者膜之晶圓39從切割帶18剝離，且於附 膜之晶圓39之-面州側貼附保護構件6 = =:::2能舉出例如研磨帶。黏著劑為了其後= =，：破剝離時黏著成分不殘留於附有接著膜之晶圓3: 子係使用紫外線照射型之保護帶、亦即u 設有保護構件62 $ 亡μ 〇时 ^ 配 分割步二 附接者膜之晶圓39係被移行至次- 分割步驟> 分割步驟S6中，係例如圖8所 件配射步驟S5中配 #由研削在保護構 巾^有保指件62之时接著膜之晶圓 面现’而將附有接著膜之晶圓39分割。藉此， 具個附有接著膜之晶片6〇,該晶片60具備在於一面 具有大塊16少曰y ο! 足6之曰曰片之一面積層有接著層22之附有接著 14 201201268 層之晶片64、以及保護膜24。 例如，分割步驟S6能藉由至少具備夾頭平台、研削磨 石、驅動研削磨石之驅動部、支撐驅動部以導引上下方向 之移動之導引部、使驅動部精密地移動於上下方向之移動 用驅動部之研削裝置來進行。 配設有保護構件62之附有接著膜之晶圓39係如圖g 所不，使另一面39b朝上，使保護構件62抵接於夾頭平台 (未圖示）而載置固定，—邊供應研削水一邊驅動研削磨石以 研削附有接者膜之晶圓39之另一面39b側。又，附有接著 膜之晶圓39係如圖8所示，全面均等地研削至在切削槽形 成步驟S4形成之切削槽61露出為止。 此，錯由研削附有接著膜之晶圓39之另一面39b 側，將附有接著膜夕日圆,n八_ “Μ B ®分J，藉此，形成具備附有接 曰之aa片64、以及保護磨24之複數個附有接著膜之晶片 削揭如*1 形成之複數個附有接著膜之^ 6G，具有對應切 s 61,衣度之厚度，亦即具有完工厚度。 < 1 - 7.拾取步驟> 取⑽鱼^步驟Μ ’從附有接著膜之晶片6〇之保護膜24拾 取（剝離）附有接著層之晶片64。 拾取步驟87中’係如圖9所示，首先，使附有 透^片60之背面_側朝上並使保護 側，：：切：帶18貼附載置於框架2〇。 拉展，從複Si將附有接著膜之晶片60往圖9之箭頭方向 附有接著膜之晶片60之保護膜24之各個 15 201201268 拾取附有接者層之晶片64。 如以上所說明，本實施形態 曰日圓之切割方法，在女人 分割步驟S6中，研削配設有保護 ^係^ ΑΓΠ， 再件Μ之附有接著腺夕 日日圓39之另一面39b，將附有接著膜 、 、之日日圓3 9分割，蕤此 防止切割晶圓H)時之剝離。所謂剝 藉此 # 彳糸^藉由例如研削 處理而於晶片上產生裂開、缺損、 所則 教痕4。例如，太膏 形態之晶圓之切割方法，係即使在 '專晶圓（例如5〇 以下之晶圓）時亦能防止剝離，使切割 n日日圓時之加工性良好。 又，本實施形態之晶圓之切割方法， 係在刀割步驟S6 中’藉由研削配設有保護構件62之附古祕— 炙附有接者膜之晶圓39 之另一面39b以將附有接著膜之晶圓39分割，且如上述， 使接著層22與保護膜24之剝離力成為既定值。藉此^由 於分割步驟S6中，能防止附有接著層 安考層之晶片Μ從保護膜 24剝離’因此能使切割晶圓時之加工性良好。 再者，本實施形態之晶圓之切割方、本 四〜々万沄，係在切削槽形 成步驟S4中，形成從附有接著膜之晶圓 _ J V心一面3 9 a側 未達另一面39b之深度之切削槽61。藉此，能在切割步驟 S6中防止分割晶圓10時之切削屑等之異物之污染。亦即， 本實施形態之晶圓之切割方法，由於能在接著層22表面被 保護膜24覆蓋之狀態下製造附有接著膜之晶片6〇，因此能 防止於接著層22表面附著切削屑。因此，例如在上述分判 步驟S6中’即使以研削磨石一邊供應研削水一邊研削附有 接著膜之晶圓39之另一面39b側，由於沿直線形成之各切 削槽61未達附有接著膜之晶圓39之外周端緣，因此不會 16 201201268 有π切削水從附有#著膜之晶E 39《外周％緣渗透内部而 污染晶片。 <2_連接方法及連接構造體> 如圖9所示’本實施形態之連接方法，具有貼附步驟 S 1、拍攝步驟S2、分割位置決定步驟S3、切削槽形成步驟 S4、拾取步驟S5、壓接步驟％。此外，貼附步驟μ〜拾取 步驟S 5，由於與上述圖丨所示之處理相同，因此省略其詳 細說明。 <2-1.壓接步驟> 壓接步驟S8中，係將在拾取步驟S7拾取之附有接著 層之晶片64透過接著層22壓接於具有電極72之電路基板 70，以連接電極72與附有接著層之晶片64之突塊μ。 例如，壓接步驟S8中，係使用如圖u所示之按壓裝 置28進行下述處理。 、 首先’於電路基板70上暫搭載複數個附有接著層之晶 片64。亦即，將已確認保護膜24已剝離之附有接著層之晶 片64配置於電路基板7〇表面之既定位置。附有接著層: 晶片64與電路基板70 ’係被對齊成在按壓兩者時附有接著 層之晶片64之突塊16與電路基板70之電極72會電氣 接。 " 接著，將配置有附有接著層之晶片64之電路基板7〇 載置於按壓裝置28之載台30上。 其次，以保持於壓接頭32之按壓構件36將附有接著 層之晶片64按壓於電路基板70之表面。例如，可舉出藉 17 201201268 由被稱為EBS(Elasticity Bonding System，彈性接合系統） 工法之將電路基板整體在以彈性體覆蓋之狀態按壓之方 法，將複數個於同一基板上暫配置之晶片一次壓接之方 法。EBS工法中，係使用由彈性體構成之壓接構件，其於 壓接頭32本體之與電路基板70對向之部分設有凹部。亦 即，EBS工法中，係藉由熱壓接頭（具有由覆蓋印刷基板整 體之彈性體構成）按壓複數個附有接著層之晶片64，將附有 接著層之晶片64 —次壓接。藉此，能將附有接著層之晶片 64透過接著層22 —次構裝於電路基板7〇表面。 如上述，本實施形態之連接方法，係如圖12所示，能 製造透過接著層22而連接附有接著層之晶片64之突塊16 與電路基板70之電極72之連接構造體8〇。 <3.其他實施形態> 上述分割位置決定步驟S3中，影像處理部M亦可從 晶圓10之功能面之影像辨識突塊16或對準標記之位置， 以辨識劃線14之位置。 又，上述按壓構件36亦可係彈性體。藉此，即使係在 將複數個附有接著層之晶片64同時按壓於電路基板川之 表面之情形’亦能良好地連接附有接著層之晶片Μ與電路 工…㈣中，係說明了於按壓構件36使用彈 性體⑷ast。聽），將複數個附有接著層之晶片Μ — 於電路基板70之情形。然而 著層之” “ m 、電路基板70構裝附有接 之方法並不限定於此。例如，亦可不使用彈 201201268 64構裝於電路基 片64逐—構裝於 性體（elastomer)，來將附有接著層之晶片 板70。又，亦可將複數個附有接著層之晶 電路基板70。 又，上述實施形態中，係說明·7估田 > 两壯职 凡乃了使用按壓裝置28將接 者膜26貼附於晶圓10之情形。沐而，收拉益时η 热而’將接者膜26貼附於 晶圓10之方法並不限定於此。伽‘ .^ ^ Λ 例如，亦可使用滾子積層機 8將接著膜26貼附於晶圓1 〇。 又，按壓構件36並非僅限定於上述刪，並非妨礙一 般之熱壓接壓接頭(陶竞或金屬等硬質壓接頭)或超音波壓 接頭之使用。 例如’亦可如圖13所示將附有接著層之晶片64接著 於電路基板70。_ 13中，係對與圖i至圖12相同或類似 之部分賦予與圖1至圖] 、』代口 ί主圖12相同之參照符號，省略重複之發 明。 按壓裝置82 ’係藉由倒裝晶片接合將電路基板7〇與晶 片2丨電氣連接。按壓裝置82具備载台84與陶竟工具8卜 按壓裝置82及載台84公gii ι 軌口 84刀別具有與按壓裝置28及載台30 相同之構成。 |小町呵旁接者層之晶片64對電路基板7( 按壓陶竞卫具86亦可將複數個附有接著層之晶片Μ逐 —對電路基板70按壓。陶究工具86亦可包含碳化矽、氮 化矽、氮化鋁等陶瓷。陶瓷工具％亦可係壓接頭之一例。 陶瓷工具86亦可具有加熱陶瓷工具％之加埶裝置88。加 熱裝置88亦可係陶究加熱器。 ’ 19 201201268 八，攸附有接著膜之晶片6〇剝離附有接著層之晶片μ 後，切割裝置40之拍攝部46亦可拍攝晶圓1〇表面Z與像 處理部54能處理晶圓1〇表面之影像，確：附 有接者層之晶片64是否從附有接著膜之晶片6〇剝離。 例如，作為保護膜24,在使用吸收波長為44〇nm以上 ㈣以下之光中特定波長之光之材料時晶圓1〇表面之 可見光影像中保護膜24所存在之區域係看似被著色。获 此，能確認附有接著層之晶片64是否從附有接著臈 曰 60之保護膜24剝離。影像處理部54亦可選別從附有:著 膜之晶片60之保護膜24剝離之附有接著層之晶片μ 附有：著Γ:亦可由從附有接著膜之晶片6°分離出各個 J有接者層之“ 64之拾取裝置確認附有接著層之晶片“ 疋否從附有接著膜之晶片60剥離。 如，在從附有接著膜之晶片6〇分離出各個附有 接者層之晶片64之於敗^罢 ,* 取裝置，拾取附有接著層之晶片64 之情形，在未從附有接菩肢 ^ 膜之晶# 60之保護膜24剝離斛 有接著層之晶片64時，盥你仅二sΛ 寸 曰μ < 與從保蠖膜24已剝離附有接著層 之曰曰4時比較，係在拾取褒置之前端與切割帶18之距 離更遠的地點拾取裝置與附有接著層之晶“4彼此接觸。 :此’亦可根據拾取裝置所檢測之屢力變化，確 著層之晶片64是否ρ你取4 士 ‘有接 剝離。 疋否已從附有接著膜之晶片60之保護膜以
f實施例J 以下說明本發明之具體實施例。此外，本發明之範圍 20 201201268 並不限定於下述任一實施例。 <接著膜之製作> ，使用厚度3〇Mm之⑽作為接著層。作為各接著膜之 保護膜係使用與厚度之離模處理方法厚 、 對苯二甲酸乙二酯膜（以下稱為「ρΕτ膜」）。又、 <使用黏結劑α之接著膜> 使用黏結劑α之接著膜係以以下步驟製作。首先，於 苯氧基樹脂（ΥΡ-50,東都化成股份有限公司製）ι〇質量部、、 液狀環氧樹脂（ΕΡ828，日本環氧樹脂股份有限公司（ΜΜ EPOXY RESINS)製）1〇 質量部、咪 r坐糸潛在性硬化劑 (N〇懦㈣394 1 HP ’旭化成股份有限公司製）i 5 f量部、橡 膠成分（RKB，Resinous化成股份有限公司製）5質量部及石夕 院偶合劑（Α·187’ M()mentlve㈣咖咖_灿公司 製）1質量部添加甲笨Π)〇質量部並授拌，調整出均一之樹 脂溶液（以下稱為「黏結劑α」）。 其次，使用塗布棒於各保護膜上塗布上述樹脂溶液。 將塗布有樹脂溶液之保護膜置人㈣之烤爐，使溶媒揮發 ㈣㈣㈣燥’藉此製作料制接 膜即PET膜而構成之接著膜。· '、保4 <使用黏結劑/5之接著膜> 使用黏結劑万之接著膜’除了使用於點結劑“之組成 添加有1〇0質量部之無機填料（不定形石夕氧平均粒徑0.5" m ADMATECHS公司製）去f Lv ~r*必上「 )者（以下稱為「黏結劑万」）以外，亦 可與使用黏結劑《之接著膜同樣地製作。 21 201201268 接著膜中，接著層與保護膜之剝離力，係於保護膜上 塗布接著層前藉由對保護膜表面施以離模處理來調整。離 模處理，係藉由在將矽系之剝離劑塗布於保護膜表面後， 加熱保護膜並使保護膜乾燥來實施。藉由調整矽系之剝離 劑之組合，製作接著層與保護膜之剝離力相異之表1所示 之實施例1〜實施例10及表2所示之比較例1〜比較例3 之接著膜。 [表1] 分割步卿 黏結劑 保護膜之 厚度 [//m] 剝離力 (N/5cm) 透射率C5/ (全光線透务 )) 卜率） 圖案辨識 性 加工性 440nm 550nm 700nm 實施例1 A a 100 0.17 79 92 95 〇 〇 實施例2 A a 100 0.22 80 92 95 〇 ◎ 實施例3 A a 100 0.3 80 91 95 〇 ◎ 實施例4 A a 100 0.72 81 91 95 〇 〇 實施例5 A a 100 1 79 92 95 〇 〇 實施例6 A a 50 0.3 85.6 95 96 〇 Δ 實施例7 A β 50 0.3 58 70 76 Δ Δ 實施例8 A a 100 0.1 81 91 96 〇 Δ 實施例9 A a 100 1.8 78 90 95 〇 Δ 實施例10 A β 100 0.22 54 65 73 Δ 〇 [表2]
分割步驟 黏結劑 保護膜之 厚度 [^m] 剝離力 (N/5cm) (全; 440η m L射率(°/ t線透务 550η m ο 卜率） 700η m 圖案辨識 性 加工性 比較例1 B a 100 0.22 80 91 95 〇 X 比較例2 C a 100 0.22 80 91 95 〇 X 比較例3 D a 100 0.22 80 91 95 〇 X <關於透射率>
接著膜之透射率，係使用 CM-3600d(KONICA MINOLTA股份有限公司製）測定全光線透射率。接著膜之 22 201201268 透射率係以以下步驟算出。首先，將各接著膜於玻璃基板 、附成接著膜之接著層與玻璃基板對向，準備測定材 料。玻璃基板之厚度係l lmm。其次，測定玻璃基板單體 之全光線透射率。測定係使透射之綠36Gnm連續變化至 74〇nm為止來實施。其次，針對所準備之各測定試料亦同樣 地測疋全光線透射率。以玻璃基板單體之全光線透射率 1 00%算出各接著膜之透射率。 <關於保護膜之厚度〉 表2所示之保遵膜之厚度係使用測微器 (Mitutoyo股份有限公司製）測定。 <辞護膜對接著膜之剝離力> 表1及表2所示之保護膜對接著膜之剝離力係使用 Tensilon(股份有限公司㈣咖製）測定。拉展方向為⑽ 度方向。拉展方法& 丁型剝離。拉展速度設定為每分 3〇〇mm。測定係以溫度23±2。〇、溫度55±1〇%1^之條件實 施。 <關於切割試驗> 實施例卜實施例Π)中，作為切割試驗，係進行圖] 所示之各步驟之處理、亦即於附有接著層之晶圓形成切削 槽後進行研削處理。 石夕晶圓：直徑為"’厚度為。又，形成於石夕 晶圓之突塊向度為25"〇1。 2削槽形成步驟S4巾’藉由切割裝置（dfd_65i)於附 有接著膜之晶圓形成從附有接著膜之晶圓之一面側未達另 23 201201268 一面之深度之切削槽。切刀係使用NBC-ZB2030-0.04t(股份 有限公司Disco製）。切刀之厚度係40 // m。切刀之轉數設 定為30000rpm。切刀之進給速度設定為10mm/sec。 分割步驟S6中，係使用研削裝置（DFD-8540股份有限 公司 Disco製）將附有接著膜之晶圓之各個分割成 0.3mmX6·3mm之附有接著膜之晶片。加工條件係將粗削切 削速度設為0.4# m/ sec，將完工切削速度設為〇 3 # m/ sec °研削後之晶圓厚度為2〇〇 “ m。以下，將以實施例1〜 實施例1 0進行之處理稱為「切割步驟A」。 比較例1中，在圖1所示之切削槽形成步驟S4中，除 了於附有接著膜之晶圓形成從附有接著膜之晶圓之一面側 達到另一面之深度之切削槽以外，其他係與實施例1〜實施 例10同樣地進行切割試驗。以下，將以比較例i進行 理稱為「切割步驟B J 。 乂 中，除了在圖1所示之分割步驟S6進行石 S4里:、使B曰圓之厚度成為2〇0 "巾後，在切削槽形成兰 於附有接著膜之晶圓形成從附有接著膜之 侧違到_工 施伽丨 之深度之切削槽以外，其他係與實施例卜 〇同樣地進行切割試驗。以下，將以j 2 處理稱為「切割步驟C」。 一㈣以 比較例3中，险·f尤，# —国， 在貼附步驟S1 Φ 所示之分割步驟S6, "後，於曰圓貼1進行研削處理以使晶圓之厚度成為20( 行切割下接著膜以外，其他係與比較例2同樣地 乂下，將以比較例3進行之處理稱為「切 24 201201268 步驟D」。 <圖案辨識性評價> 圖案之辨識(·生’係以搭載於dfd_65i (股份有限公司
DlSC〇製）之CCD拍攝機觀察形成於石夕晶圓表面之圖案。圓 案之線寬為30#m。 ，係指裝置辨識 又’圖案辨識性 亦即圖案辨識性 表1及表2中，圖案辨識性為「〇 分數為8 0以上、亦即圖案辨識性良好 為「△」，係指裝置辨識分數為未滿80 並非良好。 <關於加工性> 力I·生係、藉由觀察在圖i所示之分割步驟％中之研 削處理時之晶片飛散或晶片偏移及研削處理後之剝離程产 來評價。 Λ 表1及表2中，加工性為「◎」係指無晶片飛散、晶 片偏移且無剝離(10點平均中無不良)。加工性為「〇」係 指無晶片飛散、晶片偏移且剥離為小⑽點平均中，不1為 未滿10%)。加工性為「△伤妒 加、丄 （ ^ Δ」係私於一部分有偏移（1〇點平
均中，不良為未滿30%)。加工性為「X 八」係扎有很多剝離 (10點平均中，不良為未滿5〇%)。 <實施例及比較例之評價結果> 如表1所示’實施例卜實施例1〇中，加工 膜剝離性及連接可靠性均良好。特別是，實施_ 2及實施 例3中，加工性與其他實施例相較更為良好。 & 另一方面，如表2所示，比較例1中，由於在圖以斤 25 201201268 示之切削槽形成牛 步驟S4中未於附有接著膜之晶圓形成從附 有接者膜之晶圓 — _ —面側未達另一面之深度之切削槽，即 進仃上述切割步驟 輝β ’因此加工性並非良好。 削掸m纟2所不’比較例2中’由於在圖1所示之切 削槽形成步驟9 ώ + 未於附有接著膜之晶圓形成從附有接著 膜之晶圆之—而办丨Α 1 側未達另一面之深度之切削槽，即進行上 述切割步驟C，+ λ 因此加工性並非良好。 又，如表2所示’比較例3中’由於在圖！所示之切 削槽形成步勘[士 + 曰 驟S4中未於附有接著膜之晶圓形成從附有接著 、曰曰圓之一面側未達另一面之深度之切削槽，即進行上 述切割步驟D，因此加工性並非良好。 【圖式簡單說明】 圖1係用以說明本實施形態之晶圓之切割方法一例之 流程圖。 圖2係顯示於治具接著晶圓之階段之—例之概略圖。 圖3係顯示於晶圓貼附接著膜之階段之一例之概略圖。 圖4係顯示載置有附有接著膜之晶圓之切割裝置之一 例之概略圖。 & 圖5係顯示拍攝步驟及分割位置決定步驟夕 略圖。 诹之-例之概 圖6係顯示切削槽形成步驟之一例之概略圖。 圖7Α係顯示在保護構件配設步驟中，於形成有切削槽 之附有接著骐之晶圓之保護膜表面配設保護 傅件之階段之 26 201201268 一例之概略圖，圖7B係顯示在保護構件配設步驟中’將附 有接著膜之晶圓從切割帶剝離之一例之概略圖。 圖8係顯示分割步驟之一例之概略圖。 圖9係顯示拾取步驟之一例之概略圖。 81 10係用以說明本實施形態之連接方法一例之流程 圖。 圖1 1係顯示壓接步驟之一例之概略圖。 陽】12 糸顯示在壓接步驟被壓接之連接構造體之一例之 概略圖。 . 13 » 員示壓接步驟之另一例之概略圖。 【主 10 1 〇a l〇b 12 14 16 18 20 21 22 24 26 要元件符號說明】 晶圓 一面 另一面 治具 劃線 突塊 切割帶 框架 晶片 接著層 保護膜 接著膜 27 201201268 28 按壓裝置 30 載台 32 壓接頭 34 加熱裝置 36 按壓構件 38 保持部 39 附有接著膜之晶圓 39a 一面 39b 另一面 40 切割裝置 42 夾頭平台 44 對準載台 46 拍攝部 48 切削部 50 切刀 52 控制部 54 影像處理部 56 驅動部 60 附有接著膜之晶片 60b 背面 61 切削槽 62 保護構件 64 附有接著層之晶片 70 電路基板 28 201201268 72 電極 80 連接構造體 84 載台 86 陶瓷工具 29

Claims (1)

  1. 201201268 七、申請專利範圍： 1 ·種晶圓之切割方法，其具有： 貼附步驟， 依序積層接著層：：面具有電路圖案之晶圓之該-面 之晶圓之另1 有透射性之保護膜而成之附有接著膜 面貼附於切割帶； 攝步驟’係藉由接收在前述附有接著膜之曰圓 面反射而透射、a ‘ 町，祓者膜之晶圓之一 附有=膜之拍攝該 像二定步驟，根據在前述拍攝步驟拍攝之影 刀口j前述附有接著膜之晶圓之位置； 之位：削槽形成步驟’根據在前述分割位置決定步驟決定 晶圓之 述附有接著膜之晶圓形成從該附有接著膜之 面側未達另一面之深度之切削槽； ::構：配設步驟’於形成有前述切削槽之附有接著 膜之I圓之别述保護膜之表面配設保護構件； 分割步驟，藉由研削配設有前述保護構件之 ^晶圆之另-面而將該附有接著膜之晶圓分割 電路圖荦之？Π :晶片具備在於—面具有前述 曰 系<0日片之一面積層有前述接著層之附有接著層之 晶片、以及前述保護膜；以及 “拾取步驟’從前述附有接著膜之晶片拾取前述附有接 著層之晶片。 2·如申請專利範圍第1項之晶圓之切割方法，其中，依 序積層則述接著層與前述保護膜而成之接著膜，係波長4扣 30 201201268 〜700nm之光之透射率為74%以上。 3.如申請專利範圍第丨或2項之晶圓之切割方法，其 中，剛述保護膜與前述接著層之剝離力係〇 .丨7N/ 5cm以上。 4_如申請專利範㈣u 3項中任一項之晶圓之切割方 法，其中，前述保護膜之厚度係5〇〜1〇〇Am。 5.如申請專利範圍第1至4項中任一項之晶圓之切割方 法，其中，依序積層前述接著層與前述保護膜而成之接著 膜包含NCF或ACF。 6 _ —種連接方法，具有壓接步驟，係將以申請專利範圍 第1至5項中任一項之晶圓之切割方法拾取之附有接著層 之晶片透過前述接著層壓接於具有電極之電路基板，以連 接s玄電極與該附有接著層之晶片之前述電路圖案。 7. 如申請專利範圍第6項之連接方法’其中，前述接著 層係NCF或ACF。 8. 如申請專利範圍第6或7項之連接方法，其中，前述 壓接步驟具有以保持於壓接頭之彈性體將前述附有接著層 之晶片按壓於前述電路基板表面之按壓階段。 9. 如申請專利範圍第8項之連接方法，其中，前述按壓 階段具有以前述彈性體將複數個前述附有接著層之晶片同 時按壓於前述電路基板表面之階段。 10. —種連接構造體，係藉由申請專利範 中任-項之連接方法而製得。 項 31
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Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3065309B1 (ja) * 1999-03-11 2000-07-17 沖電気工業株式会社 半導体装置の製造方法
JP4776188B2 (ja) * 2004-08-03 2011-09-21 古河電気工業株式会社 半導体装置製造方法およびウエハ加工用テープ
JP4925669B2 (ja) * 2006-01-13 2012-05-09 ソニーケミカル＆インフォメーションデバイス株式会社 圧着装置及び実装方法
JP2008098427A (ja) * 2006-10-12 2008-04-24 Toshiba Corp 半導体装置の製造方法
JP5032231B2 (ja) * 2007-07-23 2012-09-26 リンテック株式会社 半導体装置の製造方法
JP2009212300A (ja) * 2008-03-04 2009-09-17 Hitachi Chem Co Ltd 半導体ウエハのバックグラインド方法、半導体ウエハのダイシング方法、及び半導体チップの実装方法
JP5141366B2 (ja) * 2008-05-14 2013-02-13 東レ株式会社 半導体用接着フィルムおよびこれを用いた半導体装置の製造方法

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TWI603425B (zh) * 2013-09-26 2017-10-21 迪思科股份有限公司 processing method
CN104716094A (zh) * 2013-12-17 2015-06-17 株式会社迪思科 器件晶片的加工方法
CN104733385A (zh) * 2013-12-19 2015-06-24 株式会社迪思科 器件晶片的加工方法
CN109390248A (zh) * 2017-08-09 2019-02-26 志圣科技（广州）有限公司 切膜装置及其切膜方法
TWI794333B (zh) * 2017-12-28 2023-03-01 日商三星鑽石工業股份有限公司 劃線裝置以及劃線方法

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