TW201201008A - Composite semiconductor memory device with error correction - Google Patents
Composite semiconductor memory device with error correction Download PDFInfo
- Publication number
- TW201201008A TW201201008A TW100106888A TW100106888A TW201201008A TW 201201008 A TW201201008 A TW 201201008A TW 100106888 A TW100106888 A TW 100106888A TW 100106888 A TW100106888 A TW 100106888A TW 201201008 A TW201201008 A TW 201201008A
- Authority
- TW
- Taiwan
- Prior art keywords
- composite semiconductor
- memory device
- data
- interface
- memory
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1044—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices with specific ECC/EDC distribution
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/38—Response verification devices
- G11C29/42—Response verification devices using error correcting codes [ECC] or parity check
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/611—Specific encoding aspects, e.g. encoding by means of decoding
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C2029/0411—Online error correction
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Read Only Memory (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US31613810P | 2010-03-22 | 2010-03-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW201201008A true TW201201008A (en) | 2012-01-01 |
Family
ID=44648192
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW100106888A TW201201008A (en) | 2010-03-22 | 2011-03-02 | Composite semiconductor memory device with error correction |
Country Status (8)
| Country | Link |
|---|---|
| US (2) | US9098430B2 (enExample) |
| EP (1) | EP2550661A4 (enExample) |
| JP (1) | JP2013522779A (enExample) |
| KR (1) | KR20120137416A (enExample) |
| CN (1) | CN102812519A (enExample) |
| CA (1) | CA2791931A1 (enExample) |
| TW (1) | TW201201008A (enExample) |
| WO (1) | WO2011116454A1 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI501083B (zh) * | 2013-07-03 | 2015-09-21 | Storart Technology Co Ltd | 針對快閃儲存系統以bch及ldpc引擎進行檢測與修正錯誤的方法 |
Families Citing this family (38)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW201201008A (en) * | 2010-03-22 | 2012-01-01 | Mosaid Technologies Inc | Composite semiconductor memory device with error correction |
| KR20130012737A (ko) * | 2011-07-26 | 2013-02-05 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 및 이를 포함하는 반도체 시스템 |
| US8922243B2 (en) | 2012-12-23 | 2014-12-30 | Advanced Micro Devices, Inc. | Die-stacked memory device with reconfigurable logic |
| US9697147B2 (en) | 2012-08-06 | 2017-07-04 | Advanced Micro Devices, Inc. | Stacked memory device with metadata management |
| US8972826B2 (en) | 2012-10-24 | 2015-03-03 | Western Digital Technologies, Inc. | Adaptive error correction codes for data storage systems |
| US9021339B2 (en) | 2012-11-29 | 2015-04-28 | Western Digital Technologies, Inc. | Data reliability schemes for data storage systems |
| US9059736B2 (en) | 2012-12-03 | 2015-06-16 | Western Digital Technologies, Inc. | Methods, solid state drive controllers and data storage devices having a runtime variable raid protection scheme |
| US9026888B2 (en) * | 2012-12-21 | 2015-05-05 | Intel Corporation | Method, system and apparatus for providing access to error correction information |
| US9214963B1 (en) | 2012-12-21 | 2015-12-15 | Western Digital Technologies, Inc. | Method and system for monitoring data channel to enable use of dynamically adjustable LDPC coding parameters in a data storage system |
| US9135185B2 (en) | 2012-12-23 | 2015-09-15 | Advanced Micro Devices, Inc. | Die-stacked memory device providing data translation |
| US9201777B2 (en) | 2012-12-23 | 2015-12-01 | Advanced Micro Devices, Inc. | Quality of service support using stacked memory device with logic die |
| US9065722B2 (en) | 2012-12-23 | 2015-06-23 | Advanced Micro Devices, Inc. | Die-stacked device with partitioned multi-hop network |
| US9170948B2 (en) | 2012-12-23 | 2015-10-27 | Advanced Micro Devices, Inc. | Cache coherency using die-stacked memory device with logic die |
| KR102084553B1 (ko) * | 2013-01-03 | 2020-03-04 | 삼성전자주식회사 | 메모리 시스템 |
| EP2992435B1 (en) | 2013-04-30 | 2020-12-30 | Hewlett-Packard Enterprise Development LP | Memory node error correction |
| US9286948B2 (en) | 2013-07-15 | 2016-03-15 | Advanced Micro Devices, Inc. | Query operations for stacked-die memory device |
| CN104750569A (zh) | 2013-12-30 | 2015-07-01 | 深圳市中兴微电子技术有限公司 | 一种实现数据纠错的方法及装置 |
| JP6131207B2 (ja) | 2014-03-14 | 2017-05-17 | ウィンボンド エレクトロニクス コーポレーション | 半導体記憶装置 |
| KR102221752B1 (ko) * | 2014-03-20 | 2021-03-02 | 삼성전자주식회사 | 메모리 장치의 프로그램 방법 및 이를 포함하는 데이터 독출 방법 |
| US20150311920A1 (en) * | 2014-04-25 | 2015-10-29 | Agency For Science, Technology And Research | Decoder for a memory device, memory device and method of decoding a memory device |
| US10002043B2 (en) * | 2014-08-19 | 2018-06-19 | Samsung Electronics Co., Ltd. | Memory devices and modules |
| KR102214556B1 (ko) * | 2014-08-19 | 2021-02-09 | 삼성전자주식회사 | 메모리 장치 및 모듈 |
| US10002044B2 (en) | 2014-08-19 | 2018-06-19 | Samsung Electronics Co., Ltd. | Memory devices and modules |
| CN104217765B (zh) * | 2014-09-09 | 2017-11-24 | 武汉新芯集成电路制造有限公司 | 闪存芯片操作时间的测量方法 |
| KR102231441B1 (ko) * | 2014-12-17 | 2021-03-25 | 에스케이하이닉스 주식회사 | 메모리 시스템 및 메모리 시스템의 동작 방법 |
| US10209895B2 (en) | 2016-02-18 | 2019-02-19 | Toshiba Memory Corporation | Memory system |
| CN106598499A (zh) * | 2016-12-14 | 2017-04-26 | 深圳市中博睿存科技有限公司 | 一种基于fpga的分布式文件系统架构 |
| KR102688433B1 (ko) * | 2017-05-07 | 2024-07-26 | 에스케이하이닉스 주식회사 | 메모리 장치, 이를 포함하는 메모리 시스템 및 메모리 시스템의 동작 방법 |
| KR102688423B1 (ko) * | 2017-07-05 | 2024-07-26 | 에스케이하이닉스 주식회사 | 메모리 장치, 이를 포함하는 메모리 시스템 및 메모리 시스템의 동작 방법 |
| US10545860B2 (en) * | 2017-08-10 | 2020-01-28 | Samsung Electronics Co., Ltd. | Intelligent high bandwidth memory appliance |
| US10331345B2 (en) * | 2017-09-29 | 2019-06-25 | Intel Corporation | Method and apparatus for reducing silent data errors in non-volatile memory systems |
| US10719394B2 (en) * | 2017-10-25 | 2020-07-21 | Innogrit Technologies Co., Ltd. | Systems and methods for fast access of non-volatile storage devices |
| TWI680375B (zh) * | 2018-08-23 | 2019-12-21 | 慧榮科技股份有限公司 | 具有分散式信箱架構的多處理器系統及其處理器錯誤檢查方法 |
| KR102766573B1 (ko) * | 2018-09-21 | 2025-02-12 | 삼성전자주식회사 | 복수의 에러 정정 기능을 갖는 메모리 장치 및 메모리 시스템과 그 동작 방법 |
| US20200127685A1 (en) * | 2018-10-19 | 2020-04-23 | Nyquist Semiconductor Limited | Systems and methods for a hybrid non-volatile storage system |
| JP7184632B2 (ja) * | 2018-12-25 | 2022-12-06 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| US11210167B2 (en) * | 2019-10-28 | 2021-12-28 | Intel Corporation | Memory wordline isolation for improvement in reliability, availability, and scalability (RAS) |
| US11537326B2 (en) | 2020-09-10 | 2022-12-27 | Western Digital Technologies, Inc. | Relocation flow using CbA technology |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7206891B2 (en) * | 2002-09-26 | 2007-04-17 | Lsi Logic Corporation | Multi-port memory controller having independent ECC encoders |
| JP3757204B2 (ja) * | 2002-12-06 | 2006-03-22 | ファナック株式会社 | エラー検出/訂正方式及び該方式を用いた制御装置 |
| US7904786B2 (en) * | 2003-03-06 | 2011-03-08 | Hewlett-Packard Development Company, L.P. | Assisted memory system |
| US8291295B2 (en) * | 2005-09-26 | 2012-10-16 | Sandisk Il Ltd. | NAND flash memory controller exporting a NAND interface |
| KR100681429B1 (ko) * | 2005-10-24 | 2007-02-15 | 삼성전자주식회사 | 반도체 메모리 장치 및 그것의 비트 에러 검출 방법 |
| CN101324867B (zh) | 2007-06-16 | 2011-07-20 | 深圳市硅格半导体有限公司 | 基于半导体存储介质的数据管理装置及管理方法 |
| TWI357733B (en) * | 2008-03-25 | 2012-02-01 | Ralink Technology Corp | Method for error-correcting code selection for mim |
| WO2010013437A1 (ja) * | 2008-07-30 | 2010-02-04 | パナソニック株式会社 | 誤り訂正機能付きコントローラ、誤り訂正機能付き記憶装置、及び誤り訂正機能付きシステム |
| US8134852B2 (en) * | 2008-10-14 | 2012-03-13 | Mosaid Technologies Incorporated | Bridge device architecture for connecting discrete memory devices to a system |
| CN101527171B (zh) | 2009-04-17 | 2012-05-23 | 成都市华为赛门铁克科技有限公司 | 一种多通道并行纠错的闪存控制方法和装置 |
| TW201201008A (en) * | 2010-03-22 | 2012-01-01 | Mosaid Technologies Inc | Composite semiconductor memory device with error correction |
-
2011
- 2011-03-02 TW TW100106888A patent/TW201201008A/zh unknown
- 2011-03-02 WO PCT/CA2011/000229 patent/WO2011116454A1/en not_active Ceased
- 2011-03-02 KR KR1020127027284A patent/KR20120137416A/ko not_active Withdrawn
- 2011-03-02 CA CA2791931A patent/CA2791931A1/en not_active Abandoned
- 2011-03-02 CN CN201180014974XA patent/CN102812519A/zh active Pending
- 2011-03-02 US US13/038,461 patent/US9098430B2/en active Active
- 2011-03-02 JP JP2013500288A patent/JP2013522779A/ja active Pending
- 2011-03-02 EP EP11758700.6A patent/EP2550661A4/en not_active Withdrawn
-
2015
- 2015-07-09 US US14/795,114 patent/US9411680B2/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI501083B (zh) * | 2013-07-03 | 2015-09-21 | Storart Technology Co Ltd | 針對快閃儲存系統以bch及ldpc引擎進行檢測與修正錯誤的方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| EP2550661A4 (en) | 2013-10-09 |
| CA2791931A1 (en) | 2011-09-29 |
| KR20120137416A (ko) | 2012-12-20 |
| CN102812519A (zh) | 2012-12-05 |
| US9411680B2 (en) | 2016-08-09 |
| US9098430B2 (en) | 2015-08-04 |
| JP2013522779A (ja) | 2013-06-13 |
| WO2011116454A1 (en) | 2011-09-29 |
| US20150309867A1 (en) | 2015-10-29 |
| EP2550661A1 (en) | 2013-01-30 |
| US20110231739A1 (en) | 2011-09-22 |
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