TW201135892A - Chip adapter board - Google Patents
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- TW201135892A TW201135892A TW099111271A TW99111271A TW201135892A TW 201135892 A TW201135892 A TW 201135892A TW 099111271 A TW099111271 A TW 099111271A TW 99111271 A TW99111271 A TW 99111271A TW 201135892 A TW201135892 A TW 201135892A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49147—Assembling terminal to base
- Y10T29/49149—Assembling terminal to base by metal fusion bonding
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49147—Assembling terminal to base
- Y10T29/49151—Assembling terminal to base by deforming or shaping
- Y10T29/49153—Assembling terminal to base by deforming or shaping with shaping or forcing terminal into base aperture
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Geometry (AREA)
- Combinations Of Printed Boards (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
Description
201135892 六、發明說明: 【發明所屬之技術 [〇(肌]本發明係關於一種轉接板,尤指一種用於轉接晶片的轉 接板。 [先前技術】 [0002] 目前,電路板上都會安裝有各種各樣的晶片,但由於某 種原因(如首次使用新的晶片或設計失誤)可能會造成電 路板上用於安裝晶片的晶片安裝區域的尺寸與晶片不匹 配,使晶片無法安裝在電路板上,如此,需重新進行電 ^ 路板的佈線設計’且原來生產的電路板無法使用’大大 提高了成本。 ' 【發明内容】 [0003] 鑒於上述内容,有必要提供一種轉接板,只將晶片安裝 在佈線與晶片不匹配的電路板上。 [0004] 一種晶片轉接板’用於將一晶片安裝在一電路板的一第 一晶片安裝區域上,且該晶片的本體的尺寸小於該第一 ) 晶片安裝區域的尺寸,該晶片轉接板為一尺寸與該第一 晶片安裝區域相匹配的板體,該板體的四周設有複數與 该第一晶片安裝區域上的第一焊盤--對應的凹口’中 心設有一與該晶片的本體的尺寸匹配的第二晶片安裝區 威,該第二晶片安裝區域的四週設有複數用於對應焊接 该晶片上引腳的第二焊盤,該等第二焊盤與該等凹口的 徊壁--對應電性連接。 [0005] 相較習知技術,本發明晶片轉接板透過在其上設置與該 晶片的本體的尺寸匹配的第二晶片安裝區域以將晶片安 099111271 表單編號 A0101 第 3 頁/共 17 頁 0992019837-0 201135892 裝在該第二晶片安裝區域,再將該晶片轉接板安裝在該 電路板的第一晶片安裝區域,進而實現了電路板與晶片 之間的連接,故無須對電路板的佈線進行重新設計,大 大降低了設計成本’節約了時間,提高了效率。 【實施方式】 [0006]請參考圖1至圖3,本發明晶片轉接板的第—較佳實施方 式200用於將一晶片300安裝在一電路板1〇〇的一晶片安 襞區域10上,且該晶片3〇〇的本體30與該晶片安裝區域 1〇的尺寸不匹配。其中,該晶片安裝區域1〇的四週設有 複數對應該晶片300上弓丨腳32的焊盤12,該晶片轉接板 200為一尺寸與該晶片安裝區域1〇相匹配的電路板板體, 其四周設有複數與該晶片安裝區域1〇上的焊盤12— 一對 應的半圓型凹口 26,每兩相鄰的凹口 26之間非電連接, 每一凹口 26的側壁用製作印刷電路板上導通孔的方式製 作。該晶片轉接板200中心設有一與該晶片300的本體30 的尺寸匹配的晶片安裝區域20。該晶片安裝區域20的四 週設有複數用於對應焊接該晶片300上引腳32的焊盤22, 。玄等焊盤22與該等凹口 26的御j壁一一對應電性連接,如 &過電路板上佈設的銅f|24電性連接。 請繼續參考圖4,去
表單編號A0101 第4頁/共17頁 虽需要將該晶片300安裝在該電路板1〇〇 ,首先,將該晶片轉接板200對應 ,此時該等凹口 26與該等焊 在該等凹口 26處熔入谭錫以將該等焊盤 一一電性焊接起來,由於該晶片轉接板 •該等凹口 26,故在熔錫時容易吃錫(因 099Π1271 0992019837-0 201135892 1 Ο 為設計成凹口結構可增大炫錫面積),使焊接牢固。然 後,將該晶片300放在該晶片轉接板2〇〇的晶片安裝區域 20上,並對應將該晶片300的引腳32焊接在該晶片轉接板 200的焊盤22上。如此’該晶片3〇〇的引腳32便透過該晶 片轉接板200與該電路板1〇〇上的焊盤丨2對應電性連接上 了,該晶片300即可配合電路板1〇〇上的其他元件(未示 出)進行後續工作了。由於該電路板1〇〇應用了該晶片轉 接板200對晶片300進行轉接,故無須對電路板1〇〇的佈 線進行重新設計,大大降低了設計成本,節約了時間, 提高了效率。該晶片轉弟板的第一較倖實綠方式2〇〇用於 將晶片30 0安裝在設計過大的晶片安裝區域1〇上。 [0008] Ο 請參考圖5至圖7,本發明晶片棒接板的第二較佳實施方 式500用於將一晶片600安裝在一電路板4 00的一晶片安 裝區域40上’且該晶片600的本體60與該晶片安裝區域 40的尺寸不匹配。其中,確晶片安裝區域40的四週設有 1 . 複數對應該晶片600占|丨腳&2的焊盤42,該晶片轉接板 500為一尺寸與該晶片600的本體60相匹配的電路板板體 ,其四周設有複數與該晶片600的引腳62--對應的焊盤 52,中心設有一與該晶片安裝區域40的尺寸匹配的開口 520。該晶片轉接板500的板体上沿該開口 520的四週設 有複數對應該晶片安裝區域40的焊盤42的半圓型凹口 56 ,每兩個相鄰的凹口 56之間非電連接,每一凹口 56的侧 壁用製作印刷電路板上導通孔的方式製作,該等焊盤52 與該等凹口 56的側壁--對應電性連接,如透過電路板 上佈設的銅箔54電性連接。 099111271 表單編號A0101 第5頁/共17頁 0992019837 201135892 [〇〇〇9]請繼續參考圖8 ’當需要將該晶片600安裝在該電路板400 的晶片安裝區域4 0上時,首先’將該晶片轉接板5 〇 〇放置 在該電路板400上’使開口 520與該晶片安裝區域4〇正對 ,此時該等凹口 56與該等焊盤42——對應,在該等凹口 56處熔入焊錫以將該等焊盤42與該等銅箔54--電性焊 接起來’由於該晶片轉接板200的開口 520週緣設計了該 專凹口 5 6 ’故在溶錫時容易吃錫,使焊接牢固。然後, 將該晶片600放在該晶片轉接板500上,並對應將該晶片 600的引腳62焊接在該晶片轉接板500的焊盤52上。如此 ’該晶片6 0 0的引腳62便透過該晶片轉接板5 〇 〇與該電路 板400上的焊盤42對應電性連接上了,該晶片6〇〇即可配 合電路板400上的其他元件(未示出)進行後續工作了。 該晶片轉接板的第二較佳實施方式500用於將晶片6〇〇安 裝在設計過小的晶片安裝區域40上。 [〇〇1〇] 綜上所述,本發明符合發明專利要件,爰依法提出專利 申請。惟,以上所述者僅為本發明之較佳實施例,舉凡 熟悉本案技藝之人士’在羞依丨本管明精神所作之等效修 飾或變化’皆應涵蓋於以下之申請專利範圍内。 【圖式簡單說明】 [0011] 圖1係一電路板的局部示意圖。 [0012] 圖2係本發明晶片轉接板的第一較佳實施方式的示意圖。 [0013] 圖3係一晶片的示意圖。 [0014] 圖4係圖3晶片透過圖2晶片轉接板安裝在圖j電路板上的 示意圖。 099111271 表單.編號A0101 第6頁/共17頁 0992019837-0 201135892 [0015] 圖5係一電路板的局部示意圖。 [0016] 圖6係本發明晶片轉接板的第二較佳實施方式的示意圖。 [0017] 圖7係一晶片的示意圖。 [0018] 圖8係圖7晶片透過圖6晶片轉接板安裝在圖5電路板上的 示意圖。 【主要元件符號說明】 [0019] 電路板:1 00、400 [0020] 焊盤:12、42、22、52 ❹ [0021] 晶片安裝區域:10、40、20 [0022] 晶片轉接板:200、500 [0023] 銅箔:24、54 [0024] 凹口 : 26、56 [0025] 晶片:300、600 [0026] 本體:30、60 [0027] 引腳:32、62 [0028] 開口 : 5 2 0 099111271 表單編號A0101 第7頁/共17頁 0992019837-0
Claims (1)
- 201135892 七、申請專利範圍: 1 . 一種晶片轉接板,用於將一晶片安裝在一電路板的一第一 晶片安裝區域上*且該晶片的本體的尺寸小於該第'一晶片 安裝區域的尺寸,該晶片轉接板為一尺寸與該第一晶片安 裝區域相匹配的板體,該板體的四周設有複數與該第一晶 片安裝區域上的第一焊盤——對應的凹口,中心設有一與 該晶片的本體的尺寸匹配的第二晶片安裝區域,該第二晶 片安裝區域的四週設有複數用於對應焊接該晶片上引腳的 第二焊盤,該等第二焊盤與該等凹口的侧壁——對應電性 連接。 2 .如申請專利範圍第1項所述之晶片轉接板,其中該等第二 焊盤與對應凹口之間是透過銅箔實現電性連接的。 3.如申請專利範圍第1項所述之晶片轉接板,其中該等凹口 為半圓形。 4 .如申請專利範圍第1項所述之晶片轉接板,其中每兩相鄰 的凹口之間非電連接,每一凹口的側壁係用製作印刷電路 板上導通孔的方式製作的。 5 . —種晶片轉接板,用於將·一晶片安裝在·一電路板的一晶片 安裝區域上,且該晶片的本體的尺寸大於該晶片安裝區域 的尺寸 '該晶片轉接板為·一尺寸與該晶片的本體相匹配的 板體,該板體的四周設有複數與該晶片的引腳——對應的 第一焊盤,中心設有一與該晶片安裝區的尺寸匹配的開口 ,該板體上延該開口的四週設有複數對應該晶片安裝區域 的第二焊盤的凹口,該等第一焊盤與該等凹口的側壁—— 對應電性連接。 099111271 表單編號A0101 第8頁/共17頁 0992019837-0 201135892 6 .如申請專利範圍第5項所述之晶片轉接板,其中該等第一 焊盤與對應凹口之間是透過銅箔實現電性連接的。 7 .如申請專利範圍第5項所述之晶片轉接板,其中該等凹口 為半圓形。 8 .如申請專利範圍第5項所述之晶片轉接板,其中每兩相鄰 的凹口之間非電連接,每一凹口的側壁係用製作印刷電路 板上導通孔的方式製作的。 〇 099111271 表單編號A0101 第9頁/共17頁 0992019837-0
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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TW099111271A TWI442534B (zh) | 2010-04-12 | 2010-04-12 | 晶片轉接板 |
US12/770,768 US8199519B2 (en) | 2010-04-12 | 2010-04-30 | Chip adapter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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TW099111271A TWI442534B (zh) | 2010-04-12 | 2010-04-12 | 晶片轉接板 |
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TW201135892A true TW201135892A (en) | 2011-10-16 |
TWI442534B TWI442534B (zh) | 2014-06-21 |
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TW099111271A TWI442534B (zh) | 2010-04-12 | 2010-04-12 | 晶片轉接板 |
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US (1) | US8199519B2 (zh) |
TW (1) | TWI442534B (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN112702836A (zh) * | 2020-12-28 | 2021-04-23 | 华进半导体封装先导技术研发中心有限公司 | 一种带侧壁焊盘的载片结构及其制作方法 |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN111372374B (zh) * | 2020-03-18 | 2021-12-03 | 上海第二工业大学 | 一种应用于pcb电路板的多通焊盘器件 |
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US5479319A (en) * | 1992-12-30 | 1995-12-26 | Interconnect Systems, Inc. | Multi-level assemblies for interconnecting integrated circuits |
US5850693A (en) * | 1995-01-31 | 1998-12-22 | Berg Technology, Inc. | Method of manufacturing an array of surface mount contacts |
US6326560B1 (en) * | 1999-08-04 | 2001-12-04 | Witek Enterprise Co., Ltd. | Adapter for a ball grid array device |
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JP2003258154A (ja) * | 2002-03-05 | 2003-09-12 | Fujitsu Ltd | 半導体素子の実装構造 |
SG107595A1 (en) * | 2002-06-18 | 2004-12-29 | Micron Technology Inc | Semiconductor devices and semiconductor device components with peripherally located, castellated contacts, assembles and packages including such semiconductor devices or packages and associated methods |
SG111069A1 (en) * | 2002-06-18 | 2005-05-30 | Micron Technology Inc | Semiconductor devices including peripherally located bond pads, assemblies, packages, and methods |
SG120123A1 (en) * | 2003-09-30 | 2006-03-28 | Micron Technology Inc | Castellated chip-scale packages and methods for fabricating the same |
TWI226735B (en) * | 2003-10-03 | 2005-01-11 | Asustek Comp Inc | Adaption board |
US7368814B1 (en) * | 2004-03-26 | 2008-05-06 | Ironwood Electronics, Inc. | Surface mount adapter apparatus and methods regarding same |
JP4343044B2 (ja) * | 2004-06-30 | 2009-10-14 | 新光電気工業株式会社 | インターポーザ及びその製造方法並びに半導体装置 |
-
2010
- 2010-04-12 TW TW099111271A patent/TWI442534B/zh not_active IP Right Cessation
- 2010-04-30 US US12/770,768 patent/US8199519B2/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112702836A (zh) * | 2020-12-28 | 2021-04-23 | 华进半导体封装先导技术研发中心有限公司 | 一种带侧壁焊盘的载片结构及其制作方法 |
CN112702836B (zh) * | 2020-12-28 | 2022-03-15 | 华进半导体封装先导技术研发中心有限公司 | 一种带侧壁焊盘的载片结构及其制作方法 |
Also Published As
Publication number | Publication date |
---|---|
US20110249418A1 (en) | 2011-10-13 |
TWI442534B (zh) | 2014-06-21 |
US8199519B2 (en) | 2012-06-12 |
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