TW201108395A - Semiconductor switch device and method for manufacturing semiconductor switch device - Google Patents
Semiconductor switch device and method for manufacturing semiconductor switch device Download PDFInfo
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- TW201108395A TW201108395A TW099107123A TW99107123A TW201108395A TW 201108395 A TW201108395 A TW 201108395A TW 099107123 A TW099107123 A TW 099107123A TW 99107123 A TW99107123 A TW 99107123A TW 201108395 A TW201108395 A TW 201108395A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 21
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/0883—Combination of depletion and enhancement field effect transistors
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- H—ELECTRICITY
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0605—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits made of compound material, e.g. AIIIBV
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- H—ELECTRICITY
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/095—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being Schottky barrier gate field-effect transistors
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- H—ELECTRICITY
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66848—Unipolar field-effect transistors with a Schottky gate, i.e. MESFET
- H01L29/66856—Unipolar field-effect transistors with a Schottky gate, i.e. MESFET with an active layer made of a group 13/15 material
- H01L29/66863—Lateral single gate transistors
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
- H01L29/812—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a Schottky gate
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823437—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
- H01L21/823456—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different shapes, lengths or dimensions
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- H—ELECTRICITY
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Junction Field-Effect Transistors (AREA)
- Electrodes Of Semiconductors (AREA)
Description
201108395 六、發明說明: 【發明所屬之技術領域】 本發明係關於一種以FET(場效 ,„ ^ 千導體元件構 成開關電路等之半導體開關裝置, 夂牛導體開關裝置之製 造方法。 【先前技術】 從第2代行動電話系統轉移至第3代行動電話系統之系統 正在進展。伴隨該系統轉移,行 ’、·’、 , 期电忐之别端部,於開關 電路使用積體邏輯電路及增幅電路等 屯吩子^檟體電路之例增 加。 如此:積體電路令,不僅尋求提高開關電路單體之特 隹,亦哥求作為積體電路整體之插入損失改善及隔離改善 等之特性提高。因此,某種積體電路係將抑制型FET(以下 稱為D型FET)與增強型FET(以下稱為E型FET)混載於單— 半導體基板上作為半導體開關裝置之構成(例如,參照專 利文獻1)。D型FET具有沒極電流開始流動時之臨限值電 壓成為負值之常開特性,具有比E型叩7插入損失小之特 徵而多用於開關電路。FET具有汲極電流開始流動時 之臨限值電壓成為正值之常關特性,多用於增幅電路及邏 輯電路。 [先前技術文獻] [專利文獻] [專利文獻1]日本特開2005-203642號公報 【發明内容】
146462.doc 201108395 [發明所欲解決之問題] 第3代行動電話系統除了來自第2代行動電話系統之問題 之高諧波失真(信號失真)以外,互調變失真(interm〇dulati〇n distortion)亦因進入接收路徑而發生接收錯誤故而成為大 問題。互調失真因存在於空中之妨害電波與發送波混雜而 產生。因此第3代行動電話系統中,第2代行動電話系統中 未成為問題之失真特性成為重要之特性,期望藉由減低高 諧波(harmonic)失真或互調失真而改善失真特性。 本甲^案發明人等發現構成 ....... ...七1<电浴 之線形性對於失真特性.造成大影響,因而完成本發明。 本發明之目的在於提供一種改善失真特性之構成之半導 體開關裝置’及半導體開關裝置之製造方法。 [解決問題之技術手段] 2明之半導體開關裝置’係將分別具備凹槽之複數之 + v體兀件例如£型fet 板。又,使用複數之半導體元:構之半導體基 關電路之連接雷技。t 關電路與連接於開 極、、及極雪太 半導體70件具備分別具有閘極電 成部及源極: = : = = ^ 形成部與源極電極形成部之間。配置於汲極電極 形狀為矩形剖面形狀之丰n生電路^極電極之外 極電極之外形狀虚拓, 兀件構成。連接電路具備閘 子狀或剖面T字狀等之半導體元件。㈣狀、例如剖面V 根據該構成,剖面 形狀之間極電極(以下稱為矩形間 146462.d〇( 201108395 極)中,浮游電容成分比剖 J卸V子狀或剖面τ字狀之閘極電 極(以下稱為V型閘極及τ型間技、哲‘ 光閘極)荨有所減少。該浮游電容 成分會於開關電路之關閉拉&十 <關閉%殘存’成為高頻信號洩漏之原 因,而使開關電路之失真特性亞 亏r生心化。又,矩形閘極中可形 成比V型閘極或τ型閘極等穿声 寻尤度更廣之凹槽。藉由形成寬 廣凹槽,於開關電路關閉時,可緩和閘極電極與源極電極 之間及問極電極與沒極電極之間之電位梯度,而可改善D 型FET之電容特性之線形性, 故了提鬲開關電路之失真特 性。 惟’若凹槽寬度增大則存在通道區域之電阻增大之虞。 本&月於》又想為對象之第3代行動電話系統中,相較 於通道區域之電阻抑制,以改善失真特性為更重要之課 題。因此本發明中,對於增大凹槽寬度而有效改善失真特 性之開關電路,係採用凹槽寬度易增大之矩形間極。另一 對於即使增大凹槽寬度肖失真特性之影響亦少之連 接電路,係形成V型閘極或丁型閘極,而抑制£型砰丁之通 道,域之電阻增大。又’所謂凹槽是指形成於沒極電極形 成部與源極電極形成部之間之剖面凹狀之槽部,該槽部寬 度即為凹槽寬度。 立凹L較好係由第丨凹槽部與比第1凹槽部更深之第2凹槽 邛構成,且為第2凹槽部之凹槽寬度比第丨凹槽部之凹枰 “ 夕#又形狀。藉此,可進一步減少產生於凹槽之浮游 電谷成分,而改善半導體元件之電容特性之線形性。 較佳為,第2凹槽部之凹槽寬度相對於第丨凹槽部之凹槽 146462.doc 201108395 寬度之比,相較於具備v型閘極或τ型閘極之半導體元件 者,以具備矩形閘極之半導體元件者為大。藉此,可確實 地改善開關電路之半導體元件之失真特性,且可抑制於連 接電路中半導體元件之通道區域之電阻增大。 本發明之半導體開關裝置㈣單一之半導體基板上形成 有分別具備凹槽之複數之半導體元件。又,使用複數之半 導體元件構成開關電路及連接於開關電路之連接電路。各 半導體元件具備分別具有閘極電極、沒極電極及源極電極 之閘極電極形成部、没極電極形成部及源極電極形成部。 閘極電極形成部配置於汲極電極形成部與源極電極形成部 之間。凹槽係由第i凹槽部、與比^凹槽部更深之第㈣ 槽部構成’且該凹槽為第2凹槽部之凹槽寬度比第】凹槽部 之凹槽寬度狹窄之多段形狀。第2凹槽部之凹槽寬度相對 2第1凹槽部之凹才曹寬度之比,相較於構成連接電路之半 導體元件者’以構成開關電路之半導體元件者為大。 藉此’可改善構成開關電路之半導體元件之電容特 線形性。 較佳為,第2凹槽部之凹槽寬度’相較於具備與剖面形 狀不同形狀之閘極電極之半導體元件者,以具備剖面矩形 ^之電極之半導體元件者為寬。藉此,可進—步確實地改 善開關電路之半導體元件之失真 大具将性同時可抑制於連接 電路之半導體元件之通道區域之電阻增大。 之=於半導體基板上形成設有具備ν型間極或丁担閉極 體疋件之放大器電路。藉此,放大器電路—體化於 146462.doc 201108395 半導體基板,而實現電路構成之高積體化及製造步驟之共 通化。 本發明之製造方法係於形成¥型閘極或丁型間極後形成 :♦因v型閘極或τ型閘極形狀複雜且製造步驟複 雜而時間較長,故假若¥型間極或τ型間極之形成前形成 矩形閉極,則將提高¥型閉極或Τ型閘極之製造步驟中因 ”、、荨ie成之損害波及矩形閘極之危險性。因此,製作製程 错由後形成平易之矩形閘極,可抑制損害。 [發明之效果] 根據本發明’可抑制增幅率低下或阻抗成分增加,同時 可改善半導體元件之電容特性之線形性。藉此,可改善失 真特性而抑制第3代行動電話系統之接收錯誤之發生等。 【實施方式】 <<第1實施形態》 以下,對本發明之第丨實施形態之半導體開關裝置丨基於 形成FET作為半導體元件之例進行說明。又本發明即使為 FET之一種的 HEMT(High Electron Mobility Transistor,高 電子遷移率電晶體)亦可較好地實施。 圖1係半導體開關裝置1之概略剖面圖。 半導體開關裝置1具備至少包含2種半導體元件E1、D1 之複數之半導體元件。此處,併置半導體元件£1與半導體 元件D1之構成例例示於圖中。 半導體開關裝置1具備半導體基板2,閘極電極4A、 4B,源極電極5A、5B,及汲極電極6A、6B。半導體基板 146462.doc 201108395 2具備作為半導體層之〇3八5層2八、在〇3八3層2八上磊晶成 長之通道層2B、在通道層2B上磊晶成長之接觸層2C。 半導體基板2具備除去接觸層2C、通道層2B及GaAs層2A 之局部而形成之槽3C。槽3C區劃形成各半導體元件之區 域,使GaAs層2A露出於外面。 半導體基板2具備於形成各半導體元件之區域除去接觸 層2C之局部而形成之凹槽3A、3B。凹槽3A、3B使通道層 2B露出於外面。 源極電極5A、5B及汲極電極6A、6B,分別形成於以接 觸層2C之凹槽3 A、3B之肋構成稜部之位置。源極電極 5A、5B與其正下方之接觸層2C構成本發明之源極電極形 成部。汲極電極6A、6B與其正下方之通道層2B構成本發 明之汲極電極形成部。 閘極電極4A、4B形成於凹槽3A、3B之最底面。閘極電 極4A—部分埋入於通道層2B而形成,閘極電極4B形成於 通道層2B上。從閘極電極4A、4B之凹槽3A、3B之最底面 突出之部位構成本發明之閘極電極形成部。 半導體元件E1係E型FET,由半導體基板2、閘極電極 4 A、源極電極5 A及 >及極電極6 A構成。間極電極4 A係形成 為剖面V字狀之V型閘極(以下稱為V型閘極4A)。半導體基 板2中形成半導體元件E1之區域,形成凹槽3A。凹槽3A係 由加工接觸層2C形成之第1凹槽部、與加工通道層2B形成 之第2凹槽部而構成之剖面2段狀。第1凹槽部之凹槽寬度 L1比第2凹槽部之凹槽寬度L2大。 146462.doc 201108395 半導體元件D1係D型FET,由半導體基板2、閘極電極 4B、源極電極5B及汲極電極6B構成。閘極電極4β係形成 為剖面矩形狀之矩形閘極(以下稱為矩形閘極4B)。於半導 體基板2中形成半導體元件D1之區域,形成凹槽凹槽 3Β係由加工接觸層2〇:形成之第1凹槽部,與加工通道層^ 形成之第2凹槽部構成之剖面2段狀。第丨凹槽部之凹槽寬 度L1’比第2凹槽部之凹槽寬度L2'大。 本實施形態之半導體元件D1中,因採用矩形閘極4Β, 可減少其表面積’故與採用乂型間極或了型間極之情形相 比,可減少於半導體基板2及源極電極5Β、沒極電極诏之 間之浮游電容成分4,藉由於半導體元件ει中形成寬度 比凹槽寬度L2更大之凹槽寬度^,,可緩和通道層扣之^ 位梯度’改善電容特性之線形性。 啄办『生另一方面,於半導體元 件E,採用V型閘極,而加也丨秘p 士 而抑制增幅率之降低及阻抗成分之 增加。 此處 以D型FET為例對半 明0 導體元件之電容特性進行說 圖2⑷係顯示_阳關閉時之源極韵間電容&齡 間極-源極間電壓Vgs之關係之圖表。該圖表 型 7之情形與㈣”閘極之情形進行比= 顯:’閉極-源極間電虔Vgs以所謂逆方向電壓顯示。 之==中可形間極之電容C—是比V型間極 間IS:抑制閘極電極與没極電極及源極電極之 146462.doc 201108395 又’從該圖表中可確認’於電壓Vgs&〇.8 v左右之夾斷 电壓大之區域,電容c〇ff之變化斜率係矩形閘極比V型閘 極小。可確認藉由採用矩形閘極,藉由擴大第丨凹槽部之 凹槽寬度,可緩和電容Coff之偏壓依存性,提高線形性。 圖2(B)係顯示源極-沒極間電容c〇ff,與於2段形狀之矩 形閘極中第2凹槽部之凹槽寬度相對於第丨凹槽部之凹槽寬 度之比之L2’/L1,之關係之圖表。此處,比較顯示以閘極_ 源極間電壓Vgs為相同條件之數據。 從該圖表中可確認,凹槽寬度之比l2VL1,越大,電容
Coff越降低。即,可知第2凹槽部之凹槽寬度越大電容〇〇订 越降低β 此處雖對矩形閘極中凹槽寬度之比不同之數據進行說 明,但無論閘極形狀如何該關係性均成立。因此,構成開 關電路之半導體元件等較好為,欲降低電容c〇ff2半導體 元件之凹槽寬度之比,比降低其他電容c〇ff之必要性小之 半導體元件之凹槽寬之比更大。 接著,對半導體開關裝置丨之電路構成之—例進行說 明。 " 圖3(A)係說明半導體開關裝置!之構成例之概略電路 圖。半導體開關裝置1具備開關電路sw與邏輯電路 LOGIC。 圖3(B)係說明開關電路SW之構成例之概 % -电路圖。開 關電路SW由複數之半導體元件D1構成,且借私 八備輸入輪出琿 PORT1、PORT2與天線埠ANT。該開關電路sw藉由輸入至 146462.doc -10· 201108395 控制端子之控制電壓,各半導體元件01成為開啟狀態或關 閉狀態,而選擇輸入輸出埠P0RT1、p〇RT2之對天線埠 ANT之連接。 此處,所有構成開關電路SW之半導體元件均為具備矩 形問極4B之半導體元件D卜藉此,於各半導體元件⑴有 關電容特性之線形性提高,開關電路8霤成為具備極良好 之失真特性者。 圖3(C)係說明邏輯電路LOGIC之構成例之概略電路圖。 邏輯電路LOGIC由半導體元件D1與半導體元件£1構成。該 邏輯電路LOGIC基於輸入至輸入埠之控制電壓vcti將邏輯 位準之電壓輸出至開關電路SW之控制端子。 此處,於邏輯電路LOGIC中,藉由設置具備乂型閘極之 半導體元件E1,與所有半導體元件E1之閘極電極形成部均 為剖面矩形狀之情形相比,可抑制半導體元件E1之增幅率 之降低及抑制阻抗成分增加。 接著’說明半導體開關裝置1之製造步驟之一例。 圖4(A)係顯示製造程序之區域分割步驟之狀態之剖面 圖。 該步驟中,於區劃半導體基板2之複數之半導體元件之 位置形成槽3C。具體而言,首先準備具備^心層2八、通 道層2B及接觸層2C之平板狀半導體基板2。又,藉由钱刻 等以從接觸層2C至GaAs層2A之深度形成槽%。該步驟結 束後,移至下一歐姆電極形成步驟。 圖4(B)係顯示該製造程序中歐姆電極形成步驟之狀態之 146462.doc 201108395 剖面圖。 該步驟中,於以槽3C區劃之各區域,形成由汲極電極 6A、6B及源極電極5A、频成之歐姆電極。各歐姆電極 藉由金屬蒸鍍法等形成。該步驟結束後,移至下一 刻步驟。 圖4(C)係顯示該製造程序中共通蝕刻步驟之狀態之剖 圖。 該步驟中,形成凹槽3A、3B各自之第丄凹槽部i3A' …體而5,首先,以光微影術形成抗蝕膜。然後, 以濕蝕刻或乾蝕刻法去除接觸層2C之局部。之後,去除抗 蝕膜。該步驟結束後,移至下一 E型FET蝕刻步驟。 圖4(D)係顯示該製造程序之E型fet蝕刻步驟之狀態之 剖面圖。 該步驟中,形成凹槽3A之第2凹槽部13C。具體而言, 首先,於半導體基板2上以光微影術形成抗蝕膜uA。於抗 蝕膜ha,形成具有與v型閘極4A之下面形狀一致之錐形 之抗姓固。接著,以光學微影術形成積層於抗餘膜HA上 之k餘膜11B。於抗蝕膜丨丨6上,形成具有與V型閘極4八之 俯視形狀-致之開口形狀之抗钮窗。接著,以濕钮刻法或 乾蝕刻法等去除通道層23之局部。該步驟結束後,移至下 一E型FET閘極電極形成步驟。 圖4(E)係顯示該製造程序之FET閘極電極形成步驟之 狀態之剖面圖。 該步驟中,形成V型閘極4A。具體而言’首先,利用前 146462.doc .. 201108395 步驟形成之抗蝕膜11A、11B實施金屬蒸鍍法。接著,去 除抗餘膜11A、11B。此處’ V型閘極4 A之成形,係共用前 步驟所利用之抗蝕膜,而削減抗蝕膜之形成程序β該步驟 結束後,移至下一 D型FET蝕刻步驟。 圖4(F)係顯示該製造程序之d型FET蝕刻步驟之狀態之剖 面圖。 該步驟中,形成凹槽3Β之第2凹槽部13D。具體而t, 首先,於半導體基板2上以光微影術形成抗蝕膜丨丨c。於抗 蝕膜1 ic上,形成具有與矩形閘極4B之俯視形狀一致之開 口形狀之抗蝕窗。接著,以濕蝕刻法或乾蝕刻法等去除通 道層2B之局部。該步驟結束後,移至下一dsfet閘極電 極形成步驟。 圖4(G)係顯示該製造程序之D型FET閘極電極形成步驟 之狀態之剖面圖。 s亥步驟中,形成矩形閘極4B。具體而言,首先,利用前 步驟形成之抗蝕膜11C實施金屬蒸鍍法。接著,去除抗蝕 膜lie。此處,矩形閘極4B之成形,係共用前步驟所利用 之抗韻膜,而削減抗姓膜之形成程序^ 藉由以上概略之製造程序製造半導體開關裝置丨、本實 施形態令,因於形成製造步驟較長之v型閘極4八之後形成 矩形閘極4B,故即使依次實施各類型之半導體元件之形 成亦T抑制之後形成之半導體元件之步驟對先行形成之 半導體元件產生之影響。 «第2實施形態》
[SJ 146462.doc 201108395 以下,對本發明之第2實施形態之半導體開關裝置21進 行說明。以下說明中,對與第1實施形態相同之構成標以 相同符號,省略其說明。 圖5係半導體開關裝置21之概略剖面圖。 半導體開關裝置21具備至少包含3種半導體元件E1、 Dl、D2之複數之半導體元件。 半導體元件D2係D型FET,由半導體基板22、閘極電極 24、源極電極25及汲極電極26構成。閘極電極24係形成為 V字狀之V型閘極(以下稱為V型閘極24)。於半導體基板22 之形成有半導體元件D2之區域,具備去除接觸層2C之局 部形成之凹槽23。凹槽23係剖面2段狀,與半導體元件E1 相同尺寸之凹槽寬度。源極電極25及汲極電極26分別形成 於凹槽23之肋之接觸層上。 於本實施形態之半導體元件D2藉由採用v型閘極24,比 採用矩形閘極之情形,凹槽寬度L2被極小化。藉此,抑制 該半導體元件D2令增寬率之降低及抑制阻抗成分增加。 接著,對半導體開關裝置1之電路構成之一例進行說 明。 圖6(A)係說明半導體開關裝置i之構成例之概略電路 圖。半導體開關裝置丨具備開關電路sw、邏輯電路 LOGIC、能1放大器pA與低雜訊放大器[να。 圖6(B)係說明開關電路,之構成例之概略電路圖。開 關電路S W由複數之半導體元件D丨構成。 此處,所有構成開關電路sw之半導體元件均係具備矩 146462.doc -14- 201108395 形閘極4B之半導體元件D1。藉此,各半導體元件D丨之有 關電容特性之線形性提高,開關電路8琢成為具備極良好 之失真特性者。 圖6(C)係說明邏輯電路LOGIC之構成例之概略電路圖。 邏輯電路LOGIC由半導體元件D2與半導體元件E1構成。該. 邏輯電路LOGIC基於輸入至輸入埠之控制電壓vcti將邏輯 位準之電壓輸出至開關電路Sw之控制端子。 此處’藉由以具備V型閘極之半導體元件E丨、〇2構成邏 輯電路LOGIC,可抑制半導體元件E1、〇2之增幅率之降低 及抑制阻抗成分增加。 圖6(D)係說明能量放大器pa與低雜訊放大器LNA之構成 例之概略電路圖。能量放大器pA與低雜訊放大器LNA由半 導體元件D2構成。藉此,可抑制半導體元件D2之增幅率 之降低及抑制阻抗成分增加。 «第3實施形態》 以下,對本發明之第3實施形態之半導體開關裝置3 i進 行說明。以下說明中,對與第丨及第2實施形態相同之構成 標以相同符號,省略其說明。 圖7係半導體開關裝置3 1之概略剖面圖。 半導體開關裝置3 1具備至少包含3種半導體元件E2、 D1、D3之複數之半導體元件。 半導體元件D3係D型FET,具備閘極電極34A。半導體 元件E2係E型FET ’具備閘極電極34B。閘極電極34A、 34B係形成為剖面T字狀之T型閘極。 146462.doc -15· 201108395 即使如本實施形態取代V型閘極採用T型閘極24,因與V 型閘極同樣地極小化凹槽寬度,故可抑制半導體元件之增 寬率之降低及抑制阻抗成分增加。 «第4實施形態》 以下’對本發明之第4實施形態之半導體開關裝置41進 行說明。以下說明中,對與第丨至第3實施形態相同之構成 標以相同符號,省略其說明。 圖8係半導體開關裝置41之概略剖面圖。 半導體開關裝置41具備至少包含3種半導體元件Ε2、 D4、D3之複數之半導體元件。 半導體元件D4係具備矩形閘極之d型FET,具備形成凹 槽43之半導體基板42。凹槽a以與半導體元件〇3及半導體 兀件Ε2相同尺寸之凹槽寬度構成。該半導體元件D4之構 造係作為構成開關電路3界之半導體元件而採用。 元件相同 ,可改善 之概略剖 如本實施形態關於凹槽寬度即使為與各半導體 尺寸,藉由併用Τ型閘極或V型閘極與矩形閘極 開關電路之失真特性。 【圖式簡單說明】 圖1係本發明之第1實施形態之半導體開關裝置 圖 2(A)、 圖2(A)、(Β)係圖1所示之半導體開關裝置之特性圖 圖3(A)〜(C)係圖1所示之半導體開關裝 置之概略電路
146462.doc • 16 - 201108395 序之各階段狀態之剖面圖。 圖5係本發明之第2實施形態之半導體開關裝置之概略剖 面圖。 圖6(A)〜(C)係圖5所示之半導體開關裝置之概略電路 圖。 圖7係本發明之第3實施形態之半導體開關裝置之概略剖 面圖。 圖8係本發明之第4實施形態之半導體開關裝置之概略剖 面圖。 【主要元件符號說明】 1 、 21 、 31 、 41 半導體開關裝置 2 半導體基板 3A、3B 凹槽 3C 槽 4A 閘極電極(V型閘極) 4B 閘極電極(V型閘極) 5A、5B 源極電極 6A、6B 汲極電極 El、D1 半導體元件 LOGIC 邏輯電路 SW 開關電路 146462.doc
Claims (1)
- 201108395 七、申請專利範圍: 一種半導體開關裝置’其係於半導體基板上形成分別具 備凹槽之複數之半導體元件;且 分別使用前述複數之半導體元件構成開關電路與連接 於前述開關電路之連接電路者; 各半導體元件具備: 具有汲極電極之汲極電極形成部;及 從則述凹槽之最底面突出,且配置於前述汲極電相 形成部與前述源極電極形成部之間之具有間極電極之聞 極電極形成部; 前述開關電路由前述閘極電極之外形狀為剖面矩形狀 之半導體元件構成; /則述連接電路具備前述閘極電極之外形狀為與剖面矩 形狀不同形狀之半導體元件。 2.如2求項!之半導體開關裝置,其"述凹槽包含形成 於前述汲極電極形成部與前述源極電極形成部之間之第 1凹槽部、及於前述閘極電極形成部之周圍比前述第… 槽部更深地形成之第2凹槽部,且前述凹槽係前述第2凹 槽部之凹槽寬度比前述第!凹槽部之凹槽寬度狹窄之多 段形狀。 3. ^‘求項2之半導體開關裝置,其中前述第2凹槽部之凹 二於前述第1凹槽部之凹槽寬度之比,相較於 …面矩形狀不同形狀之前述開極電極之半導體元 146462.doc 201108395 閘極電極之半導體元件 件者,以具備剖面矩形狀之前述 者為大。 4· -種半導體開關裝置,其係於半導體基板 備凹槽之複數之半導體元件;且 成刀 刀別使用月.J述複數之半導體元件構成開關電路與連接 於則述開關電路之連接電路者; 各半導體元件具備: 具有源極電極之源極電極形成部; 具有汲極電極之汲極電極形成部;及 ,且配置於前述汲極電極 之間之具有閘極電極之閘 從前述凹槽之最底面突出 形成部與前述源極電極形成部 極電極形成部; 極於前敍極電極形成部與前述源極電 成权間之第1凹槽部、及於前述間極電極形成部 :周圍:前述第二凹槽部更深地形成之第2凹槽部所構 且則述凹槽前述第2凹槽部之凹槽寬度比前述 槽。卩之凹槽寬度狭窄之多段形狀; 凹 月1J述第2凹槽部之凹槽甯庚& 样… 度相對於前述第1凹槽部之凹 =二,相較於構成前述連接電路之半導體元件 者Χ構成刖述開關電路之半導體元件者為大。 5·如請求項2或3之半導體開關裝置 之凹槽寬度’相較於具備與剖面形狀不同形狀乏::部 極電極之半導體元件者,以具備剖面矩形狀之前閘 電極之半導體元件者為寬。 〜4甲]極 146462.doc 201108395 6.如請求項1至4中任一項之 $ < +導體開關裝置,其中構成前 述開關電路之半導體元件係抑制型服。 7·如請求項丨至4中任一項 ^ χ 牛導體開關裝置,其中進而於 前述半導體基板上形成嘹右目 甲 --._ + °又有具備與前述剖面矩形狀不同 8. 形狀之則述閘極電極之半 一鍤導體凡件之放大器電路。 任馆 製造方法,其係如請求頂1 5 7由 任一項之半導艚 月水項1主7中 牛導體開關裝置之製造方 該製造方法係於形出ώ 極電榀夕at V成〇剖面矩形狀不同形壯夕乂 桠冤極之步驟後, / j ^狀之前述閘 之+规 灯形成剖面矩形狀之&、+. (步驟。 < 别述閘極電極 146462.doc
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2010
- 2010-03-11 TW TW099107123A patent/TWI509774B/zh active
- 2010-05-14 WO PCT/JP2010/058173 patent/WO2010134468A1/ja active Application Filing
- 2010-05-14 EP EP10777701.3A patent/EP2434538B1/en active Active
- 2010-05-14 JP JP2011514391A patent/JP5652392B2/ja active Active
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EP2434538A4 (en) | 2014-04-30 |
US20120091513A1 (en) | 2012-04-19 |
JP5652392B2 (ja) | 2015-01-14 |
EP2434538B1 (en) | 2018-08-22 |
CN102428550B (zh) | 2016-08-31 |
US8933497B2 (en) | 2015-01-13 |
JPWO2010134468A1 (ja) | 2012-11-12 |
EP2434538A1 (en) | 2012-03-28 |
WO2010134468A1 (ja) | 2010-11-25 |
TWI509774B (zh) | 2015-11-21 |
CN102428550A (zh) | 2012-04-25 |
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