TW200943486A - Anti-fuse and method for forming the same, unit cell of non volatile memory device with the same - Google Patents

Anti-fuse and method for forming the same, unit cell of non volatile memory device with the same

Info

Publication number
TW200943486A
TW200943486A TW098105536A TW98105536A TW200943486A TW 200943486 A TW200943486 A TW 200943486A TW 098105536 A TW098105536 A TW 098105536A TW 98105536 A TW98105536 A TW 98105536A TW 200943486 A TW200943486 A TW 200943486A
Authority
TW
Taiwan
Prior art keywords
same
fuse
forming
memory device
volatile memory
Prior art date
Application number
TW098105536A
Other languages
English (en)
Other versions
TWI478286B (zh
Inventor
Chang-Hee Shin
Ki-Seok Cho
Seong-Do Jeon
Original Assignee
Magnachip Semiconductor Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Magnachip Semiconductor Ltd filed Critical Magnachip Semiconductor Ltd
Publication of TW200943486A publication Critical patent/TW200943486A/zh
Application granted granted Critical
Publication of TWI478286B publication Critical patent/TWI478286B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5252—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive
    • H01L23/5254—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H10B20/20—Programmable ROM [PROM] devices comprising field-effect components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
TW098105536A 2008-02-20 2009-02-20 反熔絲及其形成方法和具有其之非揮發性記憶體裝置之單位單元 TWI478286B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020080015153A KR101051673B1 (ko) 2008-02-20 2008-02-20 안티퓨즈 및 그 형성방법, 이를 구비한 비휘발성 메모리소자의 단위 셀

Publications (2)

Publication Number Publication Date
TW200943486A true TW200943486A (en) 2009-10-16
TWI478286B TWI478286B (zh) 2015-03-21

Family

ID=40954288

Family Applications (1)

Application Number Title Priority Date Filing Date
TW098105536A TWI478286B (zh) 2008-02-20 2009-02-20 反熔絲及其形成方法和具有其之非揮發性記憶體裝置之單位單元

Country Status (5)

Country Link
US (2) US7880211B2 (zh)
JP (1) JP2009200497A (zh)
KR (1) KR101051673B1 (zh)
CN (2) CN101521190B (zh)
TW (1) TWI478286B (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI733044B (zh) * 2017-10-16 2021-07-11 美商賽諾西斯公司 具有改良之可程式性之單次可程式化單元

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102160178B (zh) * 2008-09-19 2013-06-19 株式会社半导体能源研究所 半导体器件
JP5299105B2 (ja) * 2009-06-16 2013-09-25 ソニー株式会社 二酸化バナジウムナノワイヤとその製造方法、及び二酸化バナジウムナノワイヤを用いたナノワイヤデバイス
WO2011023922A1 (en) * 2009-08-28 2011-03-03 X-Fab Semiconductor Foundries Ag Improved pn junctions and methods
GB0915501D0 (en) * 2009-09-04 2009-10-07 Univ Warwick Organic photosensitive optoelectronic devices
JP5590842B2 (ja) * 2009-09-29 2014-09-17 ルネサスエレクトロニクス株式会社 半導体記憶装置および半導体記憶装置の制御方法
WO2011040213A1 (en) * 2009-10-01 2011-04-07 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
KR101145383B1 (ko) * 2010-02-25 2012-05-15 에스케이하이닉스 주식회사 반도체 장치의 전기적 퓨즈 및 그 제조방법
KR101659834B1 (ko) * 2010-03-31 2016-09-27 삼성전자주식회사 반도체 퓨즈 회로, 상기 반도체 퓨즈 회로를 포함하는 반도체 장치, 및 상기 반도체 장치를 포함하는 반도체 모듈
US20120056257A1 (en) * 2010-09-02 2012-03-08 Mosys, Inc. Non-Volatile Memory System with Modified Memory Cells
EP2544227A1 (en) 2011-07-07 2013-01-09 eMemory Technology Inc. Non-volatile memory cell structure and method for programming and reading the same
CN103456711B (zh) * 2012-06-05 2016-03-23 中芯国际集成电路制造(上海)有限公司 鳍型反熔丝结构及其制造方法
KR101916463B1 (ko) * 2012-06-29 2018-11-07 에스케이하이닉스 주식회사 반도체 소자의 안티퓨즈 및 그 제조 방법
KR101731129B1 (ko) * 2012-08-02 2017-04-28 매그나칩 반도체 유한회사 Ｏｔｐ 메모리 셀 및 그 제조 방법
KR20150029848A (ko) 2013-09-10 2015-03-19 매그나칩 반도체 유한회사 메모리 프로그래밍 방법 및 이를 수행하는 장치
CN104576600B (zh) * 2013-10-10 2018-10-23 中芯国际集成电路制造(上海)有限公司 一种反熔丝结构
CN104576602B (zh) * 2013-10-15 2017-10-20 中芯国际集成电路制造(上海)有限公司 一种反熔丝结构
CN103745977B (zh) * 2014-01-14 2016-09-28 珠海创飞芯科技有限公司 Otp器件结构及其加工方法
US9496270B2 (en) * 2014-05-30 2016-11-15 Qualcomm Incorporated High density single-transistor antifuse memory cell
US9202815B1 (en) * 2014-06-20 2015-12-01 Infineon Technologies Ag Method for processing a carrier, a carrier, and a split gate field effect transistor structure
JP6549466B2 (ja) * 2015-10-22 2019-07-24 ラピスセミコンダクタ株式会社 半導体装置及び半導体装置の製造方法
KR102106664B1 (ko) 2016-06-22 2020-05-06 매그나칩 반도체 유한회사 Otp 셀 및 이를 이용한 otp 메모리 어레이
JP2018006525A (ja) 2016-06-30 2018-01-11 ルネサスエレクトロニクス株式会社 半導体装置
KR102178025B1 (ko) * 2016-08-09 2020-11-13 매그나칩 반도체 유한회사 감소된 레이아웃 면적을 갖는 otp 셀
KR101958518B1 (ko) * 2016-08-09 2019-03-15 매그나칩 반도체 유한회사 프로그래밍의 신뢰성이 개선된 otp 셀
DE102016124968B4 (de) * 2016-12-20 2024-01-18 Infineon Technologies Ag Ausbilden von Siliziumoxidschichten durch Oxidation mit Radikalen
KR102592928B1 (ko) * 2017-01-18 2023-10-24 삼성디스플레이 주식회사 데이터 보정 장치 및 이를 포함하는 표시 장치
US10720389B2 (en) * 2017-11-02 2020-07-21 Nanya Technology Corporation Anti-fuse structure
US11276697B2 (en) * 2018-04-02 2022-03-15 Intel Corporation Floating body metal-oxide-semiconductor field-effect-transistors (MOSFET) as antifuse elements
US10522556B1 (en) * 2018-07-13 2019-12-31 Nanya Technology Corporation Antifuse structure
WO2020014859A1 (zh) * 2018-07-17 2020-01-23 深圳市为通博科技有限责任公司 反熔丝、反熔丝的制造方法以及存储装置
KR102606814B1 (ko) * 2018-12-28 2023-11-29 에스케이하이닉스 주식회사 안티 퓨즈를 구비한 반도체장치 및 그 제조 방법
US10854545B1 (en) * 2019-09-26 2020-12-01 Nanya Technology Corporation Anti-fuse structure
KR102247375B1 (ko) 2020-07-03 2021-04-30 매그나칩 반도체 유한회사 메모리 프로그래밍 방법 및 이를 수행하는 장치

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5235335A (en) * 1992-06-02 1993-08-10 Texas Instruments Incorporated Circuit and method for tuning capacitor arrays
TW256940B (en) * 1994-09-12 1995-09-11 United Microelectronics Corp Thin film transistor and process thereof
US6087707A (en) * 1996-04-16 2000-07-11 Micron Technology, Inc. Structure for an antifuse cell
US6630724B1 (en) * 2000-08-31 2003-10-07 Micron Technology, Inc. Gate dielectric antifuse circuits and methods for operating same
EP1233453A3 (en) * 2001-02-19 2005-03-23 Kawasaki Microelectronics, Inc. Semiconductor integrated circuit having anti-fuse, method of fabricating, and method of writing data in the same
TW519761B (en) * 2001-11-19 2003-02-01 Silicon Integrated Sys Corp MOS device having dual-gate insulation layer and its manufacturing method
WO2005109516A1 (en) * 2004-05-06 2005-11-17 Sidense Corp. Split-channel antifuse array architecture
TWI256940B (en) 2004-06-18 2006-06-21 Walsin Lihwa Corp Integration manufacturing process for MEMS element
US7553704B2 (en) * 2005-06-28 2009-06-30 Freescale Semiconductor, Inc. Antifuse element and method of manufacture

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI733044B (zh) * 2017-10-16 2021-07-11 美商賽諾西斯公司 具有改良之可程式性之單次可程式化單元

Also Published As

Publication number Publication date
CN101521190A (zh) 2009-09-02
US20110079875A1 (en) 2011-04-07
KR101051673B1 (ko) 2011-07-26
CN102306643A (zh) 2012-01-04
US7880211B2 (en) 2011-02-01
KR20090089965A (ko) 2009-08-25
CN101521190B (zh) 2012-06-20
TWI478286B (zh) 2015-03-21
US20090206381A1 (en) 2009-08-20
JP2009200497A (ja) 2009-09-03
CN102306643B (zh) 2014-12-31
US8513770B2 (en) 2013-08-20

Similar Documents

Publication Publication Date Title
TW200943486A (en) Anti-fuse and method for forming the same, unit cell of non volatile memory device with the same
WO2008057392A3 (en) Methods of fabricating semiconductor devices including implanted regions for providing low-resistance contact to buried layers and related devices
TW200742045A (en) Semiconductor device having a recess channel transistor
TW200731530A (en) Semiconductor devices and methods for fabricating the same
WO2013049463A3 (en) Double gate ion sensitive field effect transistor
WO2010002516A3 (en) Low-cost double structure substrates and methods for their manufacture
IN2012DN06399A (zh)
EP2879189A3 (en) Solar cell and method of manufacturing the same
TW200731850A (en) Organic light-emitting transistor element and method for manufacturing the same
SG10201406869QA (en) Semiconductor device
TW200715566A (en) Display device and method of manufacturing the same
EP2051304A4 (en) SEMICONDUCTOR SUBSTRATE, METHOD FOR PRODUCING AN ELECTRODE, AND METHOD FOR MANUFACTURING SOLAR CELL
EP2058865A4 (en) PROCESS FOR FORMING SEMICONDUCTOR SUBSTRATE AND ELECTRODE AND METHOD FOR MANUFACTURING SOLAR BATTERY
WO2012037191A3 (en) Improved photovoltaic cell assembly and method
TW200709415A (en) Gate pattern of semiconductor device and method for fabricating the same
WO2011005284A3 (en) Encapsulated phase change cell structures and methods
IN2014DN09305A (zh)
GB2530197A (en) Tunneling field effect transistors (TFETS) with undoped drain underlap wrap-around regions
WO2009019864A1 (ja) 半導体装置とその製造方法および画像表示装置
TW200729516A (en) Semiconductor device and method for fabricating the same
WO2011071598A3 (en) Quantum-well-based semiconductor devices
MY167301A (en) Semiconductor device and method for producing same
GB201202356D0 (en) Semiconductor device structure and manufacturing method thereof
WO2011070316A3 (en) Electronic device
WO2013152275A3 (en) Hole carrier layer for organic photovoltaic device