200841029 九、發明說明： 【發明所屬之技術領域】200841029 IX. Description of the invention: [Technical field to which the invention belongs]
Circuk^ Γ/ί ^(Semiconductor Integrated 體電動裝置之接嘯路的半導體積 【先前技術】 體電路之^= 7積，電路’且藉由半導體積 示，=轉體述專利文獻1所 文獻π、曰本專利制平5-190637號公報 如圖3所示，說明此種裝置。 罟而3 * ’受測試對象(以下略稱dut)10例如以、'夜”論壯 ’了將半導體積體電路12搭載於‘狀自t:忿 定邦7η 由線未圖示)連接到複數之接腳^。DC(直、、“)、則 疋设置於ic測試器，且連接至DUT1〇的各C(直抓电)測 分。又，丄 ====: ^著，說明此種裝置之接腳間短路的測試動作 精由控制部30的控制’而電壓輸出到咖 接二' DC測疋部20再測定鄰接該所望接腳之贿1 f腳，且 ，因此控制部3〇即於DC測定部2〇所 ^^ 所布望值時，判定為接腳間短路。 、 电极大於 【發明内容】 200841029 (發明所欲解決之課題） 近年來’由於液晶顯示器逐 液晶驅動裝置趨向多接綱 化’且旦素數不斷增加， m，且接腳間之間隙則變窄=700接腳J而接腳間距約30v 所示，灰塵或塵均異物14著=有如圖5(a) 亦有如圖5(b)所示，異物豆路的狀態； ί ^而即使測試時並無接腳間短路==^^=腳的狀 因ΓίΓ發生短路，遂成為不良品的問題 但 法與一種IC測===:=供；；種^導體積體電路的測試方 間短路。 吏亚非儿全短路，仍可檢測出接腳 (解決課題之手段） 係路:請專，圍第1項之發明 半導體積體電路的接„短路。，咕《具有複數接腳之 導體產體積體電路， ❿ 生的波形轉體-魏的接聊所產 明中申;發明，係如中請專利範圍第1項之發 間短路抑定值，職ic 狀為^腳 申請專利範圍第3項之發明係一種^、、目彳〜抑m 複數接腳之半導體碰電路。 4知’肋測試具有 路之^接部，其於該半導體積體電 相鄰接顿增望接聊之 明中申圍第4項之發明，係如中請專利範圍第3項之$ W疋日樣若波形大於欺值，獅職部判定為接腳^ 6 200841029 短路。 申請專利範園第5項之孰M〆 之發明中，測試部具有#、如巾請專群3或4項 階躍訊號；測定部，用 以在所望接腳產生脈衝或 (發明之效果）·相鄰接腳。 依本發明，可獲得如下之效果： 依申請專利範園第〗、 將脈衝麵躍職加以輪 ^iC戦H或半導體積體電路 行接腳間短路之判定。因此，广體，體=路的接腳之波形，以進 腳間短路。 ，卩使並非完全短路，仍可檢測出接 依申讀專利範圍第3至 、 到半導體積體電路之所望接、且將脈衝或階躍訊號輸出 導體積體電路的相鄰卩糟由鄰接所望接腳之半 使並非完全短路，仍路韻，即 【實施方式】 圖1係顯示本發明 以下，參照圖式，詳細說明本發明。又 之一實施例的結構圖。 、於圖1中’ DUT10例如以液晶驅動裝置而 導體積體電路U搭載於TAB歸U，且將铸Jm: 由配線(未_連接到複數之接腳13。測試; 器，且電連，至rnmo的複數接腳，而於贿接= 生脈衝，再藉由鄰接該所望接腳之相鄰接腳的波形，以判定 間短路。此外，測試部40係針對DUT1〇之每一接腳，設 產生部4卜測定部42，以及控制部43。脈衝產生部41以例如： 動負載電路(Actwe Load Circuit)，於所望接腳產生脈衝。測邻 42則以例如A/D轉換部，測定相鄰接腳。控制部43控制脈σ 生部41及測定部42，且藉由測定部42的測定結果，以進行抝 200841029 .其次，說1種ΐ置:= 之波形例的圖表。脈衝產生邻 1係颁不DUT10之相鄰接腳 之所望接腳輸出脈二ί: 的接腳。又，若並未接腳間短路為接接士腳之_〇 而如圖5(b)所示，罝物】4茗、、 囷之波形a所示。 之測定結果大於判定值，由控制部=^=時點)若測定部42 巧―路。在此’測定結果與判定 ：MU為亚 =路或並未接腳間短路皆可。 腳’可^為接腳 雖不會變化成如波形b所示，但由於 路之情況， 而測定部42測二產該 望，輪出脈衝， =由此測定結果，進行接腳==相^^控制部 王紐路，仍可檢測出接腳間短路。 .口此即使並非完 此外’本發明並不限於此種情況 部，但亦可為比較器，或者⑽轉換部以及A/D轉換 出加以輸入的數位比較器二者的組合。此時，、^ 轉換部之輸 行接腳間短路之敏。又，於測定部 ^^卩43將不須進 間短路的結構。 円了包含用以判定接腳 躍訊i，蝴41係·树纽_結構，但亦可為階 又，雖顯示設有脈衝產生部41的钟 少 ，DUT1G本身將脈衝或階躍職㈣ ^^細其他結構， 測定相鄰接腳。 汁王接腳，且以測定部42 200841029 【圖式簡單說明】 圖1_示本發明之一實施例的結構圖。 圖2頒示DUT10之相鄰接腳之波形例的說明圖。 圖3顯示昔知之1C測試器的結構圖。 圖4顯示DUT10之具體結構的說明圖。 圖5(a)、5(b) DUT10之主要部的放大剖面圖。 【主要元件符號說明】Circuk^ Γ/ί ^(Semiconductor product of the sluice path of the Semiconductor integrated electric device [Prior Art] ^=7 product, circuit' of the body circuit and by semiconductor product, = 转 述 专利 专利 专利 专利 专利 专利Japanese Patent Laid-Open No. Hei 5-190637 discloses such a device as shown in Fig. 3. 罟 and 3 * 'The object to be tested (hereinafter abbreviated as dut) 10, for example, "night" is a strong semiconductor product. The body circuit 12 is mounted in a 'shape from t: 忿定邦 7η (not shown) is connected to a plurality of pins ^. DC (straight, "), then 疋 is set in the ic tester, and is connected to the DUT1 〇 Each C (straight grab) score. Further, 丄====: ^, the test operation of the short circuit between the pins of the device is described by the control of the control unit 30, and the voltage is output to the second DC measuring unit 20, and then the adjacent terminal is measured. In the case where the control unit 3 detects the value by the DC measuring unit 2, it is determined that the pin is short-circuited between the pins. The electrode is larger than [invention] 200841029 (problem to be solved by the invention) In recent years, "the liquid crystal display is moving toward a liquid crystal drive device, and the number of deniers is increasing, m, and the gap between the pins is narrowed." =700 pin J and the pin spacing is about 30v, dust or dust are foreign matter 14 = as shown in Figure 5 (a) also as shown in Figure 5 (b), the state of the foreign bean road; ί ^ and even when testing There is no short circuit between the pins ==^^=The shape of the foot is ΓίΓ Short circuit occurs, 遂 becomes a problem of defective products, but the method is tested with an IC ===:= supply; .吏 吏 非 全 全 全 全 仍 仍 仍 仍 仍 仍 ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( 接 接 接 接 接 接 接 接 接 接 接 接 接Volume body circuit, hygienic waveform swivel - Wei's liaison is produced by Ming Zhongshen; invention, such as the short-term suppression value of the first paragraph of the patent scope, the job ic is the patent range of the foot The invention of the three items is a semiconductor touch circuit of ^, 目彳~ mm plural pins. 4 Knowing that the rib test has a junction of the road, which is adjacent to the semiconductor integrated body The invention of the fourth item of the Ming Dynasty Shenwei is as follows: If the waveform of the W. 疋 样 样 大于 大于 大于 大于 大于 , , , , , , , , 波形 , 波形 波形 狮 狮 狮 狮 狮 狮 狮 狮 狮 狮 狮 狮 狮 狮 狮 狮 狮 狮 狮 狮 狮In the invention of M孰, the test part has #, such as a towel, a group of 3 or 4 step signals; and a measuring unit for generating a pulse or an effect of the invention on the desired pin. According to the present invention, the following effects can be obtained: According to the application for the patent garden, the pulse surface is moved to the wheel ^iC戦H or half. The determination of the short circuit between the pins of the bulk body circuit. Therefore, the waveform of the pin of the wide body and the body=path is short-circuited between the legs. If the circuit is not completely short-circuited, the third patent range can still be detected. Until the semiconductor integrated circuit is connected, and the pulse or step signal output of the adjacent volume circuit is adjacent to the half of the adjacent pin, so that it is not completely short-circuited, still the road, that is, [embodiment] BRIEF DESCRIPTION OF THE DRAWINGS In the following, the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 shows that the DUT 10 is mounted on the TAB to the U, for example, by a liquid crystal driving device. Will cast Jm: by wiring (not _ connected to the plurality of pins 13 test; device, and electrical, to rnmo's multiple pins, and bribe = raw pulse, and then by the adjacent pin The waveform of the adjacent leg is used to determine the short circuit. Further, the test unit 40 is provided with a generating unit 4 and a control unit 43 for each of the DUTs 1 . The pulse generating unit 41 is, for example, a dynamic load circuit. (Actwe Load Circuit), the pulse is generated at the desired pin The adjacent portion 42 measures the adjacent pins by, for example, an A/D conversion unit. The control unit 43 controls the pulse-synthesis unit 41 and the measurement unit 42 and performs the measurement result of the measurement unit 42 to perform 拗200841029. Let's say a diagram of the waveform example of the device: = pulse. The pulse generates the pin of the adjacent pin of the adjacent pin of the DUT10 that is not connected to the DUT10. Also, if there is no short circuit between the pins, it is connected. As shown in Fig. 5(b), the 】 】 茗 茗 茗 茗 茗 波形 波形 波形 波形 。 。 。 。 。 波形 波形 波形 波形 波形 波形 波形 波形 波形 波形 波形 波形 波形 波形 波形 波形 波形 波形 波形 波形 波形 波形 波形 波形 波形 波形 波形 波形 波形―路。 Here's the measurement results and judgment: MU is sub== or no short circuit between the pins. The foot 'may be a pin, although it does not change as shown by the waveform b, but due to the condition of the road, the measuring unit 42 measures the second production, and the pulse is rotated, and the result is measured, and the pin == phase ^^ Control Department Wang New Road, can still detect short circuit between the pins. The present invention is not limited to the above. The present invention is not limited to this case, but may be a combination of a comparator or (10) a conversion unit and an A/D conversion input digital comparator. At this time, the sensitivity of the short-circuit between the pins of the conversion unit is changed. Further, in the measuring unit, the structure is not required to be short-circuited.円 包含 包含 包含 包含 41 蝴 蝴 蝴 蝴 蝴 蝴 蝴 蝴 蝴 蝴 蝴 蝴 蝴 蝴 蝴 蝴 蝴 蝴 蝴 蝴 蝴 蝴 蝴 蝴 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 ^ Fine other structures, measuring adjacent pins. The juice king is attached to the foot, and the measuring unit 42 200841029 [Simplified description of the drawings] Fig. 1 is a structural view showing an embodiment of the present invention. FIG. 2 is an explanatory diagram showing an example of a waveform of an adjacent pin of the DUT 10. Figure 3 shows a block diagram of a conventional 1C tester. FIG. 4 shows an explanatory diagram of a specific structure of the DUT 10. 5(a) and 5(b) are enlarged cross-sectional views showing main parts of the DUT 10. [Main component symbol description]
10〜受測試對象， 11〜帶狀自動化黏合構裝捲帶 12〜半導體積體電路 U〜接腳 14〜異物 20〜DC測定部 30〜控制部 40〜測試部 41〜脈衝產生部 42〜測定部 43〜控制部 C〜腳間電容 R〜接腳間電阻 A/D〜轉換部 a〜並未接腳間短路時所 b〜異物差一點接觸到另形 之波形 为邊的接腳時所形成10 to test object, 11 to strip-shaped automatic bonded structure tape 12 to semiconductor integrated circuit U to pin 14 to foreign matter 20 to DC measuring unit 30 to control unit 40 to test unit 41 to pulse generating unit 42 to measurement When the portion 43 to the control unit C to the inter-foot capacitance R to the inter-pin resistance A/D to the conversion unit a are not short-circuited between the pins, the foreign matter is not in contact with the pin of the other shape. form