JPH10339756A - Method for inspecting short-circuiting between pins and lsi-testing device using it - Google Patents

Method for inspecting short-circuiting between pins and lsi-testing device using it

Info

Publication number
JPH10339756A
JPH10339756A JP9151966A JP15196697A JPH10339756A JP H10339756 A JPH10339756 A JP H10339756A JP 9151966 A JP9151966 A JP 9151966A JP 15196697 A JP15196697 A JP 15196697A JP H10339756 A JPH10339756 A JP H10339756A
Authority
JP
Japan
Prior art keywords
dut
signal pin
current
pins
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9151966A
Other languages
Japanese (ja)
Inventor
Yutaka Imao
裕 今尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yokogawa Electric Corp
Original Assignee
Yokogawa Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yokogawa Electric Corp filed Critical Yokogawa Electric Corp
Priority to JP9151966A priority Critical patent/JPH10339756A/en
Publication of JPH10339756A publication Critical patent/JPH10339756A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To perform inspection in a short time by grounding the power supply terminal and the grounding terminal of an LSI (DUT) to be tested, applying each different voltage to each signal pin of the DUT, measuring current that flows to each signal pin of the DUT, and judging whether the signal pin failed or not when a current value indicates an abnormal value. SOLUTION: An LSI-testing device controls voltage source/current measuring circuits 4a-4d according to control signals 101-104 and applies each different voltage to each signal pin of DUT 1 simultaneously. The circuits 4a-4d measure current that flows to each signal pin of the DUT 1. The circuit 4a measures a current value of approximately 100 mA, the circuits 4b and 4c measure -10 mA and 10 mA, and the circuit 4d measures several lens of μA. The voltage source/current measurement circuit measures a current value that is approximately several lens of μA when the signal pin is normal. The power supply terminal and the grounding terminal of the DUT 1 are grounded and at the same time each different voltage is applied to each signal pin and a current value is measured, thus inspecting short-circuiting between pins.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、LSI試験装置の
検査項目である被試験LSI(以下、DUT(Device un
der test)と呼ぶ。)のピン間ショート検査方法に関
し、特に1回の検査でどのピン間が不良かを判断するこ
とが可能な検査方法及びこの検査方法を用いたLSI試
験装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an LSI under test (hereinafter referred to as a DUT (Device un
der test). In particular, the present invention relates to an inspection method capable of determining which pin is defective in one inspection and an LSI test apparatus using the inspection method.

【0002】[0002]

【従来の技術】従来のLSI試験装置で行われるピン間
ショート検査とはDUTのある信号ピンが他の信号ピ
ン、電源端子等とショートするような不良の有無を判断
する検査である。
2. Description of the Related Art A short-circuit test between pins performed by a conventional LSI test apparatus is a test for judging whether a signal pin of a DUT is short-circuited with another signal pin, a power supply terminal or the like.

【0003】図2はこのような従来のピン間ショート検
査の方法の一例を示す構成ブロック図である。図2にお
いて1はDUT、2a,2b,2c及び2dは直流電圧
源と電流測定回路を併せ持つ電圧源/電流測定回路、1
00a,100b,100c及び100dは制御信号で
ある。
FIG. 2 is a configuration block diagram showing an example of such a conventional method of inspecting for shorts between pins. In FIG. 2, 1 is a DUT, 2a, 2b, 2c and 2d are voltage source / current measurement circuits having both a DC voltage source and a current measurement circuit.
00a, 100b, 100c and 100d are control signals.

【0004】制御信号100a,100b,100c及
び100dは電圧源/電流測定回路2a,2b,2c及
び2dに入力され、電圧源/電流測定回路2a,2b,
2c及び2dの出力はDUT1の各信号ピンに接続され
る。また、DUT1の電源端子及び接地端子は共に接地
される。
The control signals 100a, 100b, 100c and 100d are input to voltage source / current measuring circuits 2a, 2b, 2c and 2d, and are supplied to the voltage source / current measuring circuits 2a, 2b, 2d.
The outputs of 2c and 2d are connected to each signal pin of DUT1. The power terminal and the ground terminal of the DUT 1 are both grounded.

【0005】ここで、図2に示すピン間ショート検査方
法を説明する。LSI試験装置は制御信号100〜10
0dにより電圧源/電流測定回路2a〜2dを制御して
DUT1の各信号ピンに同時に数100mV程度の電圧
を印加する。
Here, a method of inspecting for short-circuit between pins shown in FIG. 2 will be described. The LSI test equipment has control signals 100 to 10
0d controls the voltage source / current measurement circuits 2a to 2d to simultaneously apply a voltage of about several hundred mV to each signal pin of the DUT 1.

【0006】また、同時に、電圧源/電流測定回路2a
〜2dはDUT1の各信号ピンに流れる電流を測定す
る。
At the same time, a voltage source / current measuring circuit 2a
2d measures the current flowing through each signal pin of the DUT1.

【0007】もし、ある信号ピンが電源端子若しくは接
地端子とショートしていれば異常な電流が流れるのでL
SI試験装置では異常電流が流れた場合には当該信号ピ
ンを不良と判断する。
If a certain signal pin is short-circuited with a power supply terminal or a ground terminal, an abnormal current flows.
When an abnormal current flows, the SI test apparatus determines that the corresponding signal pin is defective.

【0008】この結果、電源端子及び接地端子を接地す
ると共に全ての信号ピンに同時に電圧を印加して異常電
流の有無を判断することによりDUTのピン間ショート
検査を行うことが可能になる。
As a result, it is possible to perform a short-circuit test between DUT pins by grounding the power supply terminal and the ground terminal and simultaneously applying a voltage to all signal pins to determine the presence or absence of an abnormal current.

【0009】但し、図2に示すピン間ショート検査では
全ての信号ピンに同一電圧を印加するため信号ピン同士
でショートしてした場合には前述のような異常電流は流
れないので、信号ピン同士のショートを検出することが
できない。
However, in the pin-to-pin short-circuit test shown in FIG. 2, since the same voltage is applied to all the signal pins, if the signal pins are short-circuited, the abnormal current as described above does not flow. Cannot be detected.

【0010】図3はこのような問題を解決した従来のピ
ン間ショート検査の方法の他の例を示す構成ブロック図
である。図3において1,2a〜2d及び100a〜1
00dは図2と同一符号を付してあり、3a,3b,3
c及び3dはスイッチ回路である。
FIG. 3 is a block diagram showing another example of a conventional method for inspecting short-circuits between pins which solves such a problem. In FIG. 3, 1, 2a-2d and 100a-1
00d has the same reference numerals as in FIG. 2, and 3a, 3b, 3
c and 3d are switch circuits.

【0011】制御信号100a,100b,100c及
び100dは電圧源/電流測定回路2a,2b,2c及
び2dに入力され、電圧源/電流測定回路2a,2b,
2c及び2dの出力はスイッチ回路3a,3b,3c及
び3dの一方の入力端子にそれぞれ接続される。
The control signals 100a, 100b, 100c and 100d are input to voltage source / current measuring circuits 2a, 2b, 2c and 2d, and are supplied to the voltage source / current measuring circuits 2a, 2b, 2d.
Outputs of 2c and 2d are connected to one input terminals of switch circuits 3a, 3b, 3c and 3d, respectively.

【0012】スイッチ回路3a〜3dの出力端子はDU
T1の各信号ピンに接続され、DUT1の電源端子及び
接地端子とスイッチ回路3a〜3dの他方の入力端子は
接地される。
The output terminals of the switch circuits 3a to 3d are DU
The power supply terminal and the ground terminal of the DUT 1 and the other input terminals of the switch circuits 3a to 3d are connected to the respective signal pins of the T1.

【0013】ここで、図3に示すピン間ショート検査方
法を説明する。LSI試験装置は制御信号100aによ
り電圧源/電流測定回路2aを制御して数100mV程
度の電圧を出力させると共にスイッチ回路3a,3b,
3c及び3dを制御して、それぞれ図3中”イ”,”
ロ”,”ハ”及び”ニ”に示す入力端子を選択させる。
Here, a method of inspecting for a short between pins shown in FIG. 3 will be described. The LSI test apparatus controls the voltage source / current measurement circuit 2a by the control signal 100a to output a voltage of about several hundred mV, and switches the switch circuits 3a, 3b,
3c and 3d are controlled, respectively, as shown in FIG.
The input terminals shown in "b", "c" and "d" are selected.

【0014】スイッチ回路3aは図3中”イ”に示す入
力端子を選択するので図3中”ホ”に示す信号ピンには
電圧源/電流測定回路2aの出力電圧が印加されること
になる。
Since the switch circuit 3a selects the input terminal indicated by "a" in FIG. 3, the output voltage of the voltage source / current measuring circuit 2a is applied to the signal pin indicated by "e" in FIG. .

【0015】一方、スイッチ回路3b〜3dは図3中”
ロ”〜”ニ”に示す入力端子を選択するので図3中”
ホ”に示す信号ピン以外の信号ピンは接地電位となる。
On the other hand, the switch circuits 3b to 3d are shown in FIG.
Since the input terminals shown in "b" to "d" are selected,
The signal pins other than the signal pin shown in FIG.

【0016】また、電圧源/電流測定回路2aはDUT
1の図3中”ホ”に示す信号ピンに流れる電流を測定す
る。
The voltage source / current measuring circuit 2a is a DUT
The current flowing through the signal pin indicated by "e" in FIG. 3 is measured.

【0017】もし、図3中”ホ”に示す信号ピンが電源
端子,接地端子若しくは他の信号ピンとショートしてい
れば異常な電流が流れるのでLSI試験装置では異常電
流が流れた場合には図3中”ホ”に示す信号ピンを不良
と判断する。
If the signal pin indicated by "e" in FIG. 3 is short-circuited to the power supply terminal, the ground terminal or another signal pin, an abnormal current flows. The signal pin indicated by "e" in 3 is determined to be defective.

【0018】同様にして他の信号ピンの1本1本の良・
不良を順次検査することによりDUT1の不良を判断す
る。
Similarly, each of the other signal pins has a good
The defect of the DUT 1 is determined by sequentially inspecting the defects.

【0019】この結果、検査する信号ピン以外の信号ピ
ン、電源端子及び接地端子を接地すると共に検査する信
号ピンに電圧を印加して異常電流の有無を判断すること
によりDUTの信号ピン同士のショートを含めたピン間
ショート検査を行うことが可能になる。
As a result, the signal pins other than the signal pin to be inspected, the power supply terminal and the ground terminal are grounded, and a voltage is applied to the signal pin to be inspected to determine whether there is an abnormal current. It is possible to perform a pin-to-pin short-circuit inspection including

【0020】[0020]

【発明が解決しようとする課題】しかし、図3に示すピ
ン間ショート検査では信号ピン同士のショートも検出で
きるもののDUT1の有する信号ピンの数だけ検査を行
わなければならないので検査時間が長くなってしまい、
検査全体のスループットが悪化してしまうと言った問題
点があった。従って本発明が解決しようとする課題は、
短時間でピン間ショート検査を行うことが可能な検査方
法及びこの検査方法を用いたLSI試験装置を実現する
ことにある。
However, in the pin-to-pin short test shown in FIG. 3, a short circuit between signal pins can be detected, but the test must be performed by the number of signal pins of the DUT 1, so that the test time becomes long. Sisters,
There is a problem that the throughput of the whole inspection is deteriorated. Therefore, the problem to be solved by the present invention is:
An object of the present invention is to realize an inspection method capable of performing a short-circuit inspection between pins in a short time and an LSI test apparatus using the inspection method.

【0021】[0021]

【課題を解決するための手段】このような課題を達成す
るために、本発明の第1では、DUTの電源端子及び接
地端子を接地し、前記DUTの各信号ピンに各々異なっ
た値の電圧を印加し、前記DUTの各信号ピンに流れる
電流値を測定し、前記電流値が異常値を示した場合に当
該信号ピンの不良を判断することを特徴とする方法であ
る。
According to a first aspect of the present invention, a power supply terminal and a ground terminal of a DUT are grounded, and different signal voltages are applied to signal pins of the DUT. And measuring a current value flowing through each signal pin of the DUT, and determining that the signal pin is defective when the current value indicates an abnormal value.

【0022】このような課題を達成するために、本発明
の第2では、本発明の第1において、前記異常値の絶対
値が同一の電流が流れる2つの信号ピンが存在した場合
に当該2つの信号ピン同士がショートしていると判断す
ることを特徴とする方法である。
According to a second aspect of the present invention, there is provided a second aspect of the present invention wherein, when there are two signal pins through which a current having the same absolute value of the abnormal value flows, the second signal pin has the same absolute value. This is characterized in that it is determined that two signal pins are short-circuited.

【0023】このような課題を達成するために、本発明
の第3では、DUTのピン間ショート検査を行うLSI
試験装置において、電源端子及び接地端子が接地された
前記DUTの各信号ピンに電圧を印加すると共に前記D
UTの各信号ピンに流れる電流値を測定する電圧源/電
流測定回路を備え、前記DUTの各信号ピンに各々異な
った値の電圧を印加し前記電流値が異常値を示した場合
に当該信号ピンの不良を判断することを特徴とするもの
である。
In order to achieve the above object, according to a third aspect of the present invention, there is provided an LSI for inspecting a short circuit between pins of a DUT.
In the test apparatus, a voltage is applied to each signal pin of the DUT whose power supply terminal and ground terminal are grounded, and
A voltage source / current measuring circuit for measuring a current value flowing through each signal pin of the UT, wherein different voltages are applied to each signal pin of the DUT, and the signal indicates an abnormal value when the current value indicates an abnormal value; It is characterized by judging a defective pin.

【0024】このような課題を達成するために、本発明
の第4では、本発明の第3において、前記異常値の絶対
値が同一の電流が流れる2つの信号ピンが存在した場合
に当該2つの信号ピン同士がショートしていると判断す
ることを特徴とするものである。
According to a fourth aspect of the present invention, in the fourth aspect of the present invention, when there are two signal pins through which currents having the same absolute value of the abnormal value flow, there is provided a second aspect. It is characterized in that it is determined that two signal pins are short-circuited.

【0025】[0025]

【発明の実施の形態】以下本発明を図面を用いて詳細に
説明する。図1は本発明に係るピン間ショート検査の方
法の一実施例を示す構成ブロック図である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the drawings. FIG. 1 is a block diagram showing a configuration of an embodiment of a method for inspecting short-circuits between pins according to the present invention.

【0026】図1において1は図2と同一符号を付して
あり、4a,4b,4c及び4dは直流電圧源と電流測
定回路を併せ持つ電圧源/電流測定回路、101,10
2,103及び104は制御信号、5a,5b,5c,
5d,5e,5f,5g及び5hはDUT1内部の保護
ダイオードである。
In FIG. 1, reference numeral 1 denotes the same reference numeral as in FIG. 2, and reference numerals 4a, 4b, 4c and 4d denote voltage source / current measuring circuits having both a DC voltage source and a current measuring circuit;
2, 103 and 104 are control signals, 5a, 5b, 5c,
5d, 5e, 5f, 5g and 5h are protection diodes inside the DUT 1.

【0027】制御信号101,102,103及び10
4は電圧源/電流測定回路4a,4b,4c及び4dに
入力される。
Control signals 101, 102, 103 and 10
4 is input to voltage source / current measuring circuits 4a, 4b, 4c and 4d.

【0028】電圧源/電流測定回路4aの出力はDUT
1の信号ピンに接続されると共に保護ダイオード5aの
アノード及び保護ダイオード5bのカソードに接続され
る。
The output of the voltage source / current measuring circuit 4a is a DUT
1 and connected to the anode of the protection diode 5a and the cathode of the protection diode 5b.

【0029】同様に電圧源/電流測定回路4bの出力は
DUT1の信号ピンに接続されると共に保護ダイオード
5cのアノード及び保護ダイオード5dのカソードに、
電圧源/電流測定回路4cはDUT1の信号ピンに接続
されると共に保護ダイオード5eのアノード及び保護ダ
イオード5fのカソードに、電圧源/電流測定回路4d
の出力はDUT1の信号ピンに接続されると共に保護ダ
イオード5gのアノード及び保護ダイオード5hのカソ
ードにそれぞれ接続される。
Similarly, the output of the voltage source / current measurement circuit 4b is connected to the signal pin of the DUT 1 and connected to the anode of the protection diode 5c and the cathode of the protection diode 5d.
The voltage source / current measurement circuit 4c is connected to the signal pin of the DUT 1 and connected to the anode of the protection diode 5e and the cathode of the protection diode 5f by the voltage source / current measurement circuit 4d.
Are connected to the signal pin of the DUT 1 and to the anode of the protection diode 5g and the cathode of the protection diode 5h, respectively.

【0030】また、保護ダイオード5a,5c,5e及
び5gのカソードは電源端子に接続され、DUT1の電
源端子及び接地端子と保護ダイオード5b,5d,5f
及び5hのアノードは接地される。
The cathodes of the protection diodes 5a, 5c, 5e and 5g are connected to a power supply terminal, and the power supply and ground terminals of the DUT 1 and the protection diodes 5b, 5d, 5f.
And 5h anodes are grounded.

【0031】ここで、図1に示すピン間ショート検査方
法を説明する。LSI試験装置は制御信号101〜10
4により電圧源/電流測定回路4a〜4dを制御してD
UT1の各信号ピンに同時に各々異なった値の電圧を印
加させる。
Here, the method of inspecting for a short between pins shown in FIG. 1 will be described. The LSI test equipment controls the control signals 101 to 10
4 controls the voltage source / current measuring circuits 4a to 4d to
A voltage of a different value is simultaneously applied to each signal pin of the UT1.

【0032】また、同時に、電圧源/電流測定回路4a
〜4dはDUT1の各信号ピンに流れる電流を測定す
る。
At the same time, the voltage source / current measuring circuit 4a
4d measure the current flowing through each signal pin of the DUT1.

【0033】例えば、図1中”イ”、”ロ”、”ハ”及
び”ニ”に印加される電圧を”Vf1”、”Vf
2”、”Vf3”及び”Vfn”とし、それぞれの電圧
値を、 Vf1=0.10V (1) Vf2=0.11V (2) Vf3=0.12V (3) : Vfn=0.50V (4) とする。
For example, the voltages applied to "A", "B", "C" and "D" in FIG.
2 "," Vf3 ", and" Vfn ", and the respective voltage values are Vf1 = 0.10V (1) Vf2 = 0.11V (2) Vf3 = 0.12V (3): Vfn = 0.50V (4 ).

【0034】図1中”ニ”に示す信号ピンが正常だとす
れば図1中”ホ”に示すように保護ダイオード5gを介
して電源端子に”数10μA”程度の電流が流れる。
If the signal pin indicated by "d" in FIG. 1 is normal, a current of about several tens of .mu.A flows through the power supply terminal via the protection diode 5g as indicated by "e" in FIG.

【0035】一方、図1中”イ”に示す信号ピンがDU
T1の電源端子若しくは接地端子とショートしていると
すれば、図1中”イ”の信号ピンに印加された電圧がD
UT1の電源端子を介して接地されることになるので図
1中”ヘ”に示すような異常電流が流れる。
On the other hand, the signal pin indicated by "A" in FIG.
Assuming that the power supply terminal or the ground terminal of T1 is short-circuited, the voltage applied to the signal pin "A" in FIG.
Since the power supply terminal of the UT 1 is grounded through the power supply terminal, an abnormal current flows as indicated by "f" in FIG.

【0036】式(1)に示すように図1中”イ”に示す
信号ピンには”Vf1=0.10V”の電圧が印加され
ているので図1中”イ”に示す信号ピンと電源端子との
間の抵抗値を”1Ω”程度とすれば図1中”ヘ”に示す
異常電流”Ierr1”は、 Ierr1=0.10V/1Ω=100mA (5) となる。
As shown in equation (1), since the voltage of "Vf1 = 0.10 V" is applied to the signal pin shown by "A" in FIG. 1, the signal pin shown by "A" in FIG. Assuming that the resistance value between them is about 1 Ω, the abnormal current “Ierr1” indicated by “f” in FIG. 1 becomes Ierr1 = 0.10V / 1Ω = 100 mA (5).

【0037】さらに、図1中”ロ”及び”ハ”に示す信
号ピン同士がショートした場合、信号ピン間には電位差
が存在するため図1中”ト”に示すような異常電流が流
れる。
Further, when the signal pins indicated by "b" and "c" in FIG. 1 are short-circuited, an abnormal current flows as indicated by "g" in FIG. 1 because a potential difference exists between the signal pins.

【0038】式(2)及び式(3)に示すように図1
中”ロ”及び”ハ”に示す信号ピンには”Vf2=0.
11V”及び”Vf3=0.12V”の電圧が印加され
ているので各信号ピン間の抵抗値を”1Ω”程度とすれ
ば図1中”ト”に示す異常電流”Ierr2”は、 Ierr2=(0.12V−0.11V)/1Ω =10mA (6) となる。
As shown in equations (2) and (3), FIG.
The signal pins shown in the middle “b” and “c” have “Vf2 = 0.
Since the voltages of 11 V "and" Vf3 = 0.12 V "are applied, if the resistance value between each signal pin is set to about" 1Ω ", the abnormal current" Ierr2 "shown by" G "in FIG. (0.12V-0.11V) / 1Ω = 10mA (6)

【0039】即ち、電圧源/電流測定回路4aは”10
0mA”程度の電流値を測定し、電圧源/電流測定回路
4b及び4cは”−10mA”及び”10mA”程度の
電流値を測定し、電圧源/電流測定回路4dは”数10
μA”程度の電流値を測定することになる。
That is, the voltage source / current measuring circuit 4a is set to "10
A current value of about 0 mA "is measured, the voltage source / current measurement circuits 4b and 4c measure current values of about" -10 mA "and" 10 mA ", and the voltage source / current measurement circuit 4d measures" number 10 ".
A current value of about μA ″ will be measured.

【0040】従って、信号ピンが正常な場合には電圧源
/電流測定回路は”数10μA”程度の電流値を測定
し、信号ピンがDUT1の電源端子若しくは接地端子に
ショートしている場合には”100mA”程度の電流値
が電圧源/電流測定回路で測定される。
Therefore, when the signal pin is normal, the voltage source / current measuring circuit measures a current value of about “several tens μA”, and when the signal pin is short-circuited to the power terminal or the ground terminal of the DUT 1, A current value of about “100 mA” is measured by the voltage source / current measurement circuit.

【0041】また、信号ピン同士がショートした場合に
は印加される電圧が高い信号ピン側の電圧源/電流測定
回路で正の電流値が測定され、印加される電圧が低い信
号ピン側の電圧源/電流測定回路で負の電流値が測定さ
れることになる。
When the signal pins are short-circuited, a positive current value is measured by the voltage source / current measuring circuit on the signal pin side where the applied voltage is high, and the applied voltage is low on the signal pin side. A negative current value will be measured by the source / current measurement circuit.

【0042】即ち、電圧源/電流測定回路において”数
10μA”程度を超える異常な電流値が測定されればそ
の信号ピンは異常であることが分かり、もし、絶対値が
同一値の異常電流が測定されれば該当する信号ピン同士
がショートしていることが分かる。
That is, if an abnormal current value exceeding about several tens of μA is measured in the voltage source / current measuring circuit, it is understood that the signal pin is abnormal, and if an abnormal current having the same absolute value is detected. If measured, the corresponding signal pins are short-circuited.

【0043】この結果、DUT1の電源端子及び接地端
子を接地すると共に電圧源/電流測定回路で各信号ピン
に同時に各々異なった値の電圧を印加して各信号ピンに
流れる電流値を測定することにより、ピン間ショート検
査を行うことが可能になる。
As a result, the power supply terminal and the ground terminal of the DUT 1 are grounded, and a voltage source / current measuring circuit simultaneously applies different voltages to each signal pin to measure the current value flowing through each signal pin. Thereby, it is possible to perform a short-circuit inspection between pins.

【0044】また、1回の検査で信号ピン同士がショー
トしてる場合にどの信号ピン同士がショートしているの
かの特定が可能になる。
Further, when signal pins are short-circuited in one inspection, it is possible to specify which signal pin is short-circuited.

【0045】さらに、図3に示す従来例のように測定す
る信号ピンをスイッチ回路により順次選択する必要がな
いので短時間でピン間ショート検査を行うことが可能に
なる。
Furthermore, unlike the conventional example shown in FIG. 3, there is no need to sequentially select signal pins to be measured by a switch circuit, so that a short-circuit inspection between pins can be performed in a short time.

【0046】なお、図1に示す実施例ではDUT1の各
信号ピンには”0.10V”から”0.01V”刻みの
電圧を順次印加したが勿論これに限定される訳ではな
く、DUT1の信号ピンの数や信号ピンの最大定格等に
応じて適宜選択すれば良い。
In the embodiment shown in FIG. 1, voltages of "0.10 V" to "0.01 V" are sequentially applied to each signal pin of the DUT 1. However, the present invention is not limited to this. What is necessary is just to select suitably according to the number of signal pins, the maximum rating of signal pins, etc.

【0047】[0047]

【発明の効果】以上説明したことから明らかなように、
本発明によれば次のような効果がある。DUTの電源端
子及び接地端子を接地すると共に電圧源/電流測定回路
で各信号ピンに同時に各々異なった値の電圧を印加して
各信号ピンに流れる電流値を測定することにより、短時
間でピン間ショート検査を行うことが可能な検査方法及
びこの検査方法を用いたLSI試験装置が実現できる。
As is apparent from the above description,
According to the present invention, the following effects can be obtained. By grounding the power supply terminal and the ground terminal of the DUT and simultaneously applying different voltages to each signal pin by a voltage source / current measuring circuit and measuring the current value flowing through each signal pin, the pins can be quickly connected. An inspection method capable of performing an inter-short inspection and an LSI test apparatus using the inspection method can be realized.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係るピン間ショート検査の方法の一実
施例を示す構成ブロック図である。
FIG. 1 is a block diagram showing a configuration of an embodiment of a short-circuit inspection method between pins according to the present invention.

【図2】従来のピン間ショート検査の方法の一例を示す
構成ブロック図である。
FIG. 2 is a configuration block diagram showing an example of a conventional method of inspecting for shorts between pins.

【図3】従来のピン間ショート検査の方法の他の例を示
す構成ブロック図である。
FIG. 3 is a configuration block diagram showing another example of the conventional method of inspecting for shorts between pins.

【符号の説明】[Explanation of symbols]

1 DUT 2a,2b,2c,2d,4a,4b,4c,4d 電
圧源/電流測定回路 3a,3b,3c,3d スイッチ回路 5a,5b,5c,5d,5e,5f,5g,5h 保
護ダイオード 100a,100b,100c,100d,101,1
02,103,104制御信号
1 DUT 2a, 2b, 2c, 2d, 4a, 4b, 4c, 4d Voltage source / current measurement circuit 3a, 3b, 3c, 3d Switch circuit 5a, 5b, 5c, 5d, 5e, 5f, 5g, 5h Protection diode 100a , 100b, 100c, 100d, 101, 1
02, 103, 104 control signal

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】DUTの電源端子及び接地端子を接地し、 前記DUTの各信号ピンに各々異なった値の電圧を印加
し、 前記DUTの各信号ピンに流れる電流値を測定し、 前記電流値が異常値を示した場合に当該信号ピンの不良
を判断するピン間ショート検査方法。
1. A power supply terminal and a ground terminal of a DUT are grounded, voltages of different values are applied to respective signal pins of the DUT, and a current value flowing through each signal pin of the DUT is measured. A short-circuit inspection method between pins for determining a failure of the signal pin when the signal indicates an abnormal value.
【請求項2】前記異常値の絶対値が同一の電流が流れる
2つの信号ピンが存在した場合に当該2つの信号ピン同
士がショートしていると判断する特許請求の範囲請求項
1記載のピン間ショート検査方法。
2. The pin according to claim 1, wherein when there are two signal pins through which a current having the same absolute value of the abnormal value flows, it is determined that the two signal pins are short-circuited. Short circuit inspection method.
【請求項3】DUTのピン間ショート検査を行うLSI
試験装置において、 電源端子及び接地端子が接地された前記DUTの各信号
ピンに電圧を印加すると共に前記DUTの各信号ピンに
流れる電流値を測定する電圧源/電流測定回路を備え、 前記DUTの各信号ピンに各々異なった値の電圧を印加
し前記電流値が異常値を示した場合に当該信号ピンの不
良を判断することを特徴とするLSI試験装置。
3. An LSI for inspecting a short circuit between pins of a DUT.
A test apparatus, comprising: a voltage source / current measurement circuit that applies a voltage to each signal pin of the DUT to which a power terminal and a ground terminal are grounded and measures a current value flowing to each signal pin of the DUT. An LSI test apparatus, wherein different voltage values are applied to respective signal pins, and when the current value indicates an abnormal value, a defect of the signal pin is determined.
【請求項4】前記異常値の絶対値が同一の電流が流れる
2つの信号ピンが存在した場合に当該2つの信号ピン同
士がショートしていると判断することを特徴とする特許
請求の範囲請求項3記載のLSI試験装置。
4. When there are two signal pins through which a current having the same absolute value of the abnormal value flows, it is determined that the two signal pins are short-circuited. Item 3. An LSI test apparatus according to Item 3.
JP9151966A 1997-06-10 1997-06-10 Method for inspecting short-circuiting between pins and lsi-testing device using it Pending JPH10339756A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9151966A JPH10339756A (en) 1997-06-10 1997-06-10 Method for inspecting short-circuiting between pins and lsi-testing device using it

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9151966A JPH10339756A (en) 1997-06-10 1997-06-10 Method for inspecting short-circuiting between pins and lsi-testing device using it

Publications (1)

Publication Number Publication Date
JPH10339756A true JPH10339756A (en) 1998-12-22

Family

ID=15530117

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9151966A Pending JPH10339756A (en) 1997-06-10 1997-06-10 Method for inspecting short-circuiting between pins and lsi-testing device using it

Country Status (1)

Country Link
JP (1) JPH10339756A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008256632A (en) * 2007-04-09 2008-10-23 Yokogawa Electric Corp Testing method and ic tester of semiconductor integrated circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008256632A (en) * 2007-04-09 2008-10-23 Yokogawa Electric Corp Testing method and ic tester of semiconductor integrated circuit

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