TW200802086A - Improved pipelined digital signal processor - Google Patents

Improved pipelined digital signal processor

Info

Publication number
TW200802086A
TW200802086A TW095139563A TW95139563A TW200802086A TW 200802086 A TW200802086 A TW 200802086A TW 095139563 A TW095139563 A TW 095139563A TW 95139563 A TW95139563 A TW 95139563A TW 200802086 A TW200802086 A TW 200802086A
Authority
TW
Taiwan
Prior art keywords
compute unit
digital signal
signal processor
pipelined digital
algorithm
Prior art date
Application number
TW095139563A
Other languages
English (en)
Other versions
TWI350479B (en
Inventor
James Wilson
Joshua A Kablotsky
Yosef Stein
Colm J Prendergast
Gregory Yukna
Christopher M Mayer
Original Assignee
Analog Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Analog Devices Inc filed Critical Analog Devices Inc
Publication of TW200802086A publication Critical patent/TW200802086A/zh
Application granted granted Critical
Publication of TWI350479B publication Critical patent/TWI350479B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/345—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes of multiple operands or results
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)
TW095139563A 2005-10-26 2006-10-26 Improved pipelined digital signal procssor TWI350479B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/258,801 US8024551B2 (en) 2005-10-26 2005-10-26 Pipelined digital signal processor

Publications (2)

Publication Number Publication Date
TW200802086A true TW200802086A (en) 2008-01-01
TWI350479B TWI350479B (en) 2011-10-11

Family

ID=37968363

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095139563A TWI350479B (en) 2005-10-26 2006-10-26 Improved pipelined digital signal procssor

Country Status (6)

Country Link
US (2) US8024551B2 (zh)
EP (1) EP1941378A4 (zh)
JP (2) JP5478068B2 (zh)
CN (1) CN101297279B (zh)
TW (1) TWI350479B (zh)
WO (1) WO2007050361A2 (zh)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7728744B2 (en) * 2005-10-26 2010-06-01 Analog Devices, Inc. Variable length decoder system and method
US8285972B2 (en) * 2005-10-26 2012-10-09 Analog Devices, Inc. Lookup table addressing system and method
US8024551B2 (en) 2005-10-26 2011-09-20 Analog Devices, Inc. Pipelined digital signal processor
US8301990B2 (en) * 2007-09-27 2012-10-30 Analog Devices, Inc. Programmable compute unit with internal register and bit FIFO for executing Viterbi code
US8099655B1 (en) * 2007-12-20 2012-01-17 Pmc-Sierra Us, Inc. Galois field multiplier system and method
TW201123732A (en) * 2009-12-31 2011-07-01 Ind Tech Res Inst Processing devices
US9501285B2 (en) * 2010-05-27 2016-11-22 International Business Machines Corporation Register allocation to threads
CN101957743B (zh) * 2010-10-12 2012-08-29 中国电子科技集团公司第三十八研究所 并行数字信号处理器
US10261939B2 (en) * 2014-08-20 2019-04-16 Nxp Usa, Inc. Performing lookup table operations on a single-instruction multiple data processor
CN105356996B (zh) * 2015-12-14 2018-11-09 联想(北京)有限公司 一种密文处理方法、电子设备及密文处理装置
US11106467B2 (en) * 2016-04-28 2021-08-31 Microsoft Technology Licensing, Llc Incremental scheduler for out-of-order block ISA processors
US10453427B2 (en) 2017-04-01 2019-10-22 Intel Corporation Register spill/fill using shared local memory space
CN108052347B (zh) * 2017-12-06 2021-07-20 北京中科睿芯智能计算产业研究院有限公司 一种执行指令选择的装置、方法及指令映射方法

Family Cites Families (86)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1181461B (de) 1963-10-08 1964-11-12 Telefunken Patent Adressenaddierwerk einer programm-gesteuerten Rechenmaschine
US3805037A (en) 1972-02-22 1974-04-16 J Ellison N{40 th power galois linear gate
DE2407241A1 (de) 1974-02-15 1975-08-21 Ibm Deutschland Verfahren und anordnung zur erhoehung der verfuegbarkeit eines digitalrechners
DE3600905A1 (de) 1986-01-15 1987-07-16 Ant Nachrichtentech Verfahren zum dekodieren von binaersignalen sowie viterbi-dekoder und anwendungen
JPH01116730A (ja) * 1987-10-30 1989-05-09 Mitsubishi Electric Corp デイジタル信号処理プロセツサ
JP2614916B2 (ja) 1988-04-27 1997-05-28 日本電気株式会社 記憶アクセス制御装置
US5287511A (en) 1988-07-11 1994-02-15 Star Semiconductor Corporation Architectures and methods for dividing processing tasks into tasks for a programmable real time signal processor and tasks for a decision making microprocessor interfacing therewith
US5031131A (en) * 1988-11-14 1991-07-09 Eaton Corporation Direct digital synthesizer
US5062057A (en) 1988-12-09 1991-10-29 E-Machines Incorporated Computer display controller with reconfigurable frame buffer memory
DE3909996A1 (de) 1989-03-25 1990-10-04 Forschungszentrum Juelich Gmbh Rekuperativer keramischer waermeuebertrager
JPH03144694A (ja) * 1989-10-31 1991-06-20 Nippondenso Co Ltd デジタル画像表示用アドレス生成装置
JPH0492921A (ja) * 1990-08-03 1992-03-25 Fujitsu Ltd 指数関数演算器
CA2074769C (en) 1991-08-09 2001-03-20 International Business Machines Corporation Formula processor
US5386523A (en) 1992-01-10 1995-01-31 Digital Equipment Corporation Addressing scheme for accessing a portion of a large memory space
US5260898A (en) * 1992-03-13 1993-11-09 Sun Microsystems, Inc. Result cache for complex arithmetic units
US5351047A (en) 1992-09-21 1994-09-27 Laboratory Automation, Inc. Data decoding method and apparatus
JPH06110852A (ja) * 1992-09-29 1994-04-22 Hitachi Ltd ブロック状並列分散演算アレイプロセッサ
JP3124648B2 (ja) * 1993-03-19 2001-01-15 富士通株式会社 色データ管理方法及び装置
JPH06324658A (ja) * 1993-05-17 1994-11-25 Fuji Xerox Co Ltd 画像表示装置
KR0135846B1 (ko) 1994-02-02 1998-06-15 김광호 룩-업-테이블장치
US5530825A (en) * 1994-04-15 1996-06-25 Motorola, Inc. Data processor with branch target address cache and method of operation
US5832290A (en) 1994-06-13 1998-11-03 Hewlett-Packard Co. Apparatus, systems and method for improving memory bandwidth utilization in vector processing systems
US5507000A (en) * 1994-09-26 1996-04-09 Bull Hn Information Systems Inc. Sharing of register stack by two execution units in a central processor
US5689452A (en) 1994-10-31 1997-11-18 University Of New Mexico Method and apparatus for performing arithmetic in large galois field GF(2n)
US5710939A (en) 1995-05-26 1998-01-20 National Semiconductor Corporation Bidirectional parallel data port having multiple data transfer rates, master, and slave operation modes, and selective data transfer termination
US6029242A (en) 1995-08-16 2000-02-22 Sharp Electronics Corporation Data processing system using a shared register bank and a plurality of processors
CN103345380B (zh) * 1995-08-31 2016-05-18 英特尔公司 控制移位分组数据的位校正的装置
US5666116A (en) 1995-12-01 1997-09-09 U.S. Philips Corporation High speed variable-length decoder arrangement
JPH09270971A (ja) * 1996-04-01 1997-10-14 Matsushita Electric Ind Co Ltd テレビジョン受信機
JP3634379B2 (ja) 1996-01-24 2005-03-30 サン・マイクロシステムズ・インコーポレイテッド スタックキャッシングのための方法及び装置
US5675332A (en) 1996-02-01 1997-10-07 Samsung Electronics Co., Ltd. Plural-step chunk-at-a-time decoder for variable-length codes of Huffman type
US5996066A (en) * 1996-10-10 1999-11-30 Sun Microsystems, Inc. Partitioned multiply and add/subtract instruction for CPU with integrated graphics functions
US6009499A (en) 1997-03-31 1999-12-28 Sun Microsystems, Inc Pipelined stack caching circuit
GB9707861D0 (en) 1997-04-18 1997-06-04 Certicom Corp Arithmetic processor
US5961640A (en) 1997-04-22 1999-10-05 Vlsi Technology, Inc. Virtual contiguous FIFO having the provision of packet-driven automatic endian conversion
US6061749A (en) 1997-04-30 2000-05-09 Canon Kabushiki Kaisha Transformation of a first dataword received from a FIFO into an input register and subsequent dataword from the FIFO into a normalized output dataword
US5790827A (en) * 1997-06-20 1998-08-04 Sun Microsystems, Inc. Method for dependency checking using a scoreboard for a pair of register sets having different precisions
US5937438A (en) * 1997-06-30 1999-08-10 Lucent Technologies Inc. Sine/cosine lookup table
US6263420B1 (en) 1997-09-17 2001-07-17 Sony Corporation Digital signal processor particularly suited for decoding digital audio
US6151705A (en) 1997-10-30 2000-11-21 Hewlett-Packard Company Efficient use of the base register auto-increment feature of memory access instructions
US5970241A (en) 1997-11-19 1999-10-19 Texas Instruments Incorporated Maintaining synchronism between a processor pipeline and subsystem pipelines during debugging of a data processing system
US6094726A (en) 1998-02-05 2000-07-25 George S. Sheng Digital signal processor using a reconfigurable array of macrocells
US6223320B1 (en) 1998-02-10 2001-04-24 International Business Machines Corporation Efficient CRC generation utilizing parallel table lookup operations
GB9806687D0 (en) 1998-03-27 1998-05-27 Memory Corp Plc Memory system
US6272452B1 (en) 1998-04-02 2001-08-07 Ati Technologies, Inc. Universal asynchronous receiver transmitter (UART) emulation stage for modem communication
US6067609A (en) 1998-04-09 2000-05-23 Teranex, Inc. Pattern generation and shift plane operations for a mesh connected computer
US6138208A (en) 1998-04-13 2000-10-24 International Business Machines Corporation Multiple level cache memory with overlapped L1 and L2 memory access
US5996057A (en) 1998-04-17 1999-11-30 Apple Data processing system and method of permutation with replication within a vector register file
US6134676A (en) 1998-04-30 2000-10-17 International Business Machines Corporation Programmable hardware event monitoring method
US6332188B1 (en) 1998-11-06 2001-12-18 Analog Devices, Inc. Digital signal processor with bit FIFO
JP3983394B2 (ja) * 1998-11-09 2007-09-26 株式会社ルネサステクノロジ 幾何学処理プロセッサ
JP2001010119A (ja) * 1999-06-28 2001-01-16 Canon Inc データベース及びそれを用いた画像処理装置
US6829695B1 (en) 1999-09-03 2004-12-07 Nexql, L.L.C. Enhanced boolean processor with parallel input
US6771196B2 (en) 1999-12-14 2004-08-03 Broadcom Corporation Programmable variable-length decoder
JP2001210357A (ja) 2000-01-28 2001-08-03 Hitachi Maxell Ltd アルカリ蓄電池
US6539477B1 (en) 2000-03-03 2003-03-25 Chameleon Systems, Inc. System and method for control synthesis using a reachable states look-up table
US6480845B1 (en) 2000-06-14 2002-11-12 Bull Hn Information Systems Inc. Method and data processing system for emulating virtual memory working spaces
US6430672B1 (en) 2000-07-17 2002-08-06 International Business Machines Corporation Method for performing address mapping using two lookup tables
JP2002290494A (ja) * 2001-03-22 2002-10-04 Ricoh Co Ltd モデム
US7251672B2 (en) 2001-05-16 2007-07-31 Nxp B.V. Reconfigurable logic device
US6587057B2 (en) 2001-07-25 2003-07-01 Quicksilver Technology, Inc. High performance memory efficient variable-length coding decoder
KR100437609B1 (ko) 2001-09-20 2004-06-30 주식회사 하이닉스반도체 반도체 메모리 장치의 어드레스 변환 방법 및 그 장치
US6976152B2 (en) * 2001-09-24 2005-12-13 Broadcom Corporation Comparing operands of instructions against a replay scoreboard to detect an instruction replay and copying a replay scoreboard to an issue scoreboard
US7283628B2 (en) 2001-11-30 2007-10-16 Analog Devices, Inc. Programmable data encryption engine
US6587864B2 (en) 2001-11-30 2003-07-01 Analog Devices, Inc. Galois field linear transformer
US7508937B2 (en) 2001-12-18 2009-03-24 Analog Devices, Inc. Programmable data encryption engine for advanced encryption standard algorithm
EP1456994B1 (en) * 2001-12-18 2018-02-07 Analog Devices, Inc. Programmable data encryption engine for advanced encryption standard algorithm
US6829694B2 (en) 2002-02-07 2004-12-07 Analog Devices, Inc. Reconfigurable parallel look up table system
JP2003264467A (ja) 2002-03-08 2003-09-19 Matsushita Electric Ind Co Ltd ビタビ復号回路
US20030196072A1 (en) 2002-04-11 2003-10-16 Chinnakonda Murali S. Digital signal processor architecture for high computation speed
US7127667B2 (en) 2002-04-15 2006-10-24 Mediatek Inc. ACS circuit and viterbi decoder with the circuit
US6865659B2 (en) 2002-06-07 2005-03-08 Sun Microsystems, Inc. Using short references to access program elements in a large address space
US7173985B1 (en) 2002-08-05 2007-02-06 Altera Corporation Method and apparatus for implementing a Viterbi decoder
US7424597B2 (en) 2003-03-31 2008-09-09 Hewlett-Packard Development Company, L.P. Variable reordering (Mux) instructions for parallel table lookups from registers
US7693928B2 (en) 2003-04-08 2010-04-06 Analog Devices, Inc. Galois field linear transformer trellis system
US20050228966A1 (en) * 2004-03-16 2005-10-13 Kabushiki Kaisha Toshiba Processor system and data processing method
US7509484B1 (en) * 2004-06-30 2009-03-24 Sun Microsystems, Inc. Handling cache misses by selectively flushing the pipeline
US7302527B2 (en) * 2004-11-12 2007-11-27 International Business Machines Corporation Systems and methods for executing load instructions that avoid order violations
US7506239B2 (en) 2004-12-23 2009-03-17 Raghavan Sudhakar Scalable traceback technique for channel decoder
US7243210B2 (en) 2005-05-31 2007-07-10 Atmel Corporation Extracted-index addressing of byte-addressable memories
US7765459B2 (en) 2005-09-28 2010-07-27 Samsung Electronics Co., Ltd. Viterbi decoder and viterbi decoding method
US7728744B2 (en) 2005-10-26 2010-06-01 Analog Devices, Inc. Variable length decoder system and method
US8285972B2 (en) 2005-10-26 2012-10-09 Analog Devices, Inc. Lookup table addressing system and method
US8024551B2 (en) 2005-10-26 2011-09-20 Analog Devices, Inc. Pipelined digital signal processor
US7882284B2 (en) 2007-03-26 2011-02-01 Analog Devices, Inc. Compute unit with an internal bit FIFO circuit
US8301990B2 (en) 2007-09-27 2012-10-30 Analog Devices, Inc. Programmable compute unit with internal register and bit FIFO for executing Viterbi code

Also Published As

Publication number Publication date
US8458445B2 (en) 2013-06-04
CN101297279B (zh) 2011-02-09
EP1941378A2 (en) 2008-07-09
JP2009514097A (ja) 2009-04-02
TWI350479B (en) 2011-10-11
JP5478068B2 (ja) 2014-04-23
WO2007050361A3 (en) 2007-12-13
CN101297279A (zh) 2008-10-29
US8024551B2 (en) 2011-09-20
JP2014038640A (ja) 2014-02-27
WO2007050361A2 (en) 2007-05-03
US20110296145A1 (en) 2011-12-01
EP1941378A4 (en) 2008-12-17
US20070094483A1 (en) 2007-04-26

Similar Documents

Publication Publication Date Title
TW200802086A (en) Improved pipelined digital signal processor
WO2008063920A3 (en) Intelligent public transit system using dual-mode vehicles
GB2511957A (en) Processor with kernel mode access to user space virtual addresses
WO2010019407A3 (en) Integrated development engine for a cloud computing environment
TW200609726A (en) Methods and apparatus for providing a software implemented cache memory
WO2011073691A3 (en) Utility data processing system
JP2010102719A5 (zh)
WO2011112523A3 (en) Data storage apparatus and methods
TW200834306A (en) Configurable cache for a microprocessor
TW200625089A (en) Secure boot scheme from external memory using internal memory
GB2460602A (en) Data processing device with low-power cache access mode
GB2485082A (en) Extended page size using aggregated small pages
WO2011081840A3 (en) Dynamic system reconfiguration
WO2008116720A3 (en) Provision of data from spreadsheet to program
WO2008051350A3 (en) Mapping primary operations sequences of an algorithm in ram
WO2007085011A3 (en) Efficient memory hierarchy management
WO2009006113A3 (en) Hierarchical cache tag architecture
WO2011123361A3 (en) Mapping rdma semantics to high speed storage
GB201014318D0 (en) Improved processor architecture
TW200639655A (en) Memory-based fast fourier transformer (FFT)
GB201013528D0 (en) Alignment control
GB2425377B (en) External state cache for computer processor
TW200834307A (en) Configurable cache for a microprocessor
WO2006102638A3 (en) Processor and method of indirect register read and write operations
WO2010093661A3 (en) Microcontroller with special banking instructions

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees