TW200746438A - An SOI transistor having an embedded strain layer and a reduced floating body effect and a method for forming the same - Google Patents

An SOI transistor having an embedded strain layer and a reduced floating body effect and a method for forming the same

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Publication number
TW200746438A
TW200746438A TW096114200A TW96114200A TW200746438A TW 200746438 A TW200746438 A TW 200746438A TW 096114200 A TW096114200 A TW 096114200A TW 96114200 A TW96114200 A TW 96114200A TW 200746438 A TW200746438 A TW 200746438A
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TW
Taiwan
Prior art keywords
floating body
forming
same
body effect
soi transistor
Prior art date
Application number
TW096114200A
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English (en)
Other versions
TWI485856B (zh
Inventor
Andy Wei
Thorsten Kammler
Jan Hoentschel
Manfred Horstmann
Original Assignee
Advanced Micro Devices Inc
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Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of TW200746438A publication Critical patent/TW200746438A/zh
Application granted granted Critical
Publication of TWI485856B publication Critical patent/TWI485856B/zh

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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025Channel region of field-effect devices
    • H01L29/1029Channel region of field-effect devices of field-effect transistors
    • H01L29/1033Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
    • H01L29/1041Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface
    • H01L29/1045Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface the doping structure being parallel to the channel length, e.g. DMOS like
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    • H01L29/66409Unipolar field-effect transistors
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    • H01L29/665Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
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    • H01L29/6659Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
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    • H01L29/78684Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
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    • H01L21/823807Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
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    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Recrystallisation Techniques (AREA)
TW096114200A 2006-04-28 2007-04-23 具有埋置應變層和減少之浮體效應的soi電晶體以及用於形成該soi電晶體之方法 TWI485856B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102006019937A DE102006019937B4 (de) 2006-04-28 2006-04-28 Verfahren zur Herstellung eines SOI-Transistors mit eingebetteter Verformungsschicht und einem reduzierten Effekt des potentialfreien Körpers
US11/563,986 US7829421B2 (en) 2006-04-28 2006-11-28 SOI transistor having an embedded strain layer and a reduced floating body effect and a method for forming the same

Publications (2)

Publication Number Publication Date
TW200746438A true TW200746438A (en) 2007-12-16
TWI485856B TWI485856B (zh) 2015-05-21

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TW096114200A TWI485856B (zh) 2006-04-28 2007-04-23 具有埋置應變層和減少之浮體效應的soi電晶體以及用於形成該soi電晶體之方法

Country Status (8)

Country Link
US (1) US7829421B2 (zh)
JP (1) JP5204763B2 (zh)
KR (1) KR101494859B1 (zh)
CN (1) CN101432859B (zh)
DE (1) DE102006019937B4 (zh)
GB (1) GB2451369B (zh)
TW (1) TWI485856B (zh)
WO (1) WO2007130241A1 (zh)

Cited By (1)

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Publication number Priority date Publication date Assignee Title
TWI582832B (zh) * 2011-04-21 2017-05-11 聯華電子股份有限公司 磊晶層的製作方法

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101406604B1 (ko) 2007-01-26 2014-06-11 마이크론 테크놀로지, 인코포레이티드 게이트형 바디 영역으로부터 격리되는 소스/드레인 영역을 포함하는 플로팅-바디 dram 트랜지스터
DE102007030053B4 (de) * 2007-06-29 2011-07-21 Advanced Micro Devices, Inc., Calif. Reduzieren der pn-Übergangskapazität in einem Transistor durch Absenken von Drain- und Source-Gebieten
KR20090096885A (ko) * 2008-03-10 2009-09-15 삼성전자주식회사 국부적 매립 절연막을 구비하는 반도체 장치 및 그 제조방법
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