TW200742260A - Phase interpolator - Google Patents

Phase interpolator

Info

Publication number
TW200742260A
TW200742260A TW095146441A TW95146441A TW200742260A TW 200742260 A TW200742260 A TW 200742260A TW 095146441 A TW095146441 A TW 095146441A TW 95146441 A TW95146441 A TW 95146441A TW 200742260 A TW200742260 A TW 200742260A
Authority
TW
Taiwan
Prior art keywords
phase
signals
signal
coupled
current
Prior art date
Application number
TW095146441A
Other languages
English (en)
Other versions
TWI331452B (en
Inventor
Yong-Ping Fan
Ian A Young
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of TW200742260A publication Critical patent/TW200742260A/zh
Application granted granted Critical
Publication of TWI331452B publication Critical patent/TWI331452B/zh

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00Networks using active elements
    • H03H11/02Multiple-port networks
    • H03H11/16Networks for phase shifting
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0337Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals
    • H04L7/0338Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals the correction of the phase error being performed by a feed forward loop

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Networks Using Active Elements (AREA)
  • Pulse Circuits (AREA)
TW095146441A 2005-12-27 2006-12-12 Phase interpolator TWI331452B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/319,879 US7593496B2 (en) 2005-12-27 2005-12-27 Phase interpolator

Publications (2)

Publication Number Publication Date
TW200742260A true TW200742260A (en) 2007-11-01
TWI331452B TWI331452B (en) 2010-10-01

Family

ID=38193728

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095146441A TWI331452B (en) 2005-12-27 2006-12-12 Phase interpolator

Country Status (5)

Country Link
US (1) US7593496B2 (zh)
EP (1) EP1966887B1 (zh)
CN (1) CN101310440B (zh)
TW (1) TWI331452B (zh)
WO (1) WO2007075312A2 (zh)

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US7158443B2 (en) * 2005-06-01 2007-01-02 Micron Technology, Inc. Delay-lock loop and method adapting itself to operate over a wide frequency range
US7593496B2 (en) 2005-12-27 2009-09-22 Intel Corporation Phase interpolator
US8086209B2 (en) * 2007-10-29 2011-12-27 Broadcom Corporation Method and apparatus for frequency mixing of radio frequency signals
TWI420818B (zh) * 2009-03-10 2013-12-21 Realtek Semiconductor Corp 避免在相位內插電路中時鐘切換造成脈衝的方法及裝置
CN101692608B (zh) * 2009-08-03 2012-04-04 四川和芯微电子股份有限公司 一种高线性度可变位宽插值器
CN101834715B (zh) * 2010-04-26 2013-06-05 华为技术有限公司 一种数据处理方法及数据处理系统以及数据处理装置
US8559587B1 (en) 2012-03-21 2013-10-15 Integrated Device Technology, Inc Fractional-N dividers having divider modulation circuits therein with segmented accumulators
US8912837B2 (en) * 2012-10-12 2014-12-16 Stmicroelectronics S.R.L. Mux-based digital delay interpolator
TWI479853B (zh) * 2012-12-12 2015-04-01 Mstar Semiconductor Inc 訊號處理裝置與訊號處理方法
US9223385B2 (en) * 2012-12-19 2015-12-29 Intel Corporation Re-driver power management
JP6155659B2 (ja) * 2013-01-28 2017-07-05 株式会社ソシオネクスト 位相補間回路および受信回路
US8917132B2 (en) * 2013-03-11 2014-12-23 Micron Technology, Inc. Apparatuses, methods, and circuits including a delay circuit
US8947144B2 (en) 2013-06-18 2015-02-03 Micron Technology, Inc. Apparatuses and methods for duty cycle adjustment
US9503066B2 (en) 2013-07-08 2016-11-22 Micron Technology, Inc. Apparatuses and methods for phase interpolating clock signals and for providing duty cycle corrected clock signals
JP6372166B2 (ja) * 2014-05-27 2018-08-15 富士通株式会社 位相補間器
US9236873B1 (en) 2014-12-17 2016-01-12 Integrated Device Technology, Inc. Fractional divider based phase locked loops with digital noise cancellation
TWI552528B (zh) * 2014-12-31 2016-10-01 致茂電子股份有限公司 時脈產生裝置
CN111541445B (zh) * 2015-01-28 2023-11-17 华为技术有限公司 子采样锁相环
KR20160113341A (ko) * 2015-03-18 2016-09-29 에스케이하이닉스 주식회사 위상 보간 회로, 이를 포함하는 클럭 데이터 복원 회로 및 위상 보간 방법
CN105991112B (zh) * 2015-07-06 2018-10-23 龙迅半导体(合肥)股份有限公司 一种数据时钟恢复电路及其相位插值器
US10110208B2 (en) * 2015-11-25 2018-10-23 Micron Technology, Inc. Apparatuses and methods for providing a signal with a differential phase mixer
CN105634451B (zh) * 2015-12-29 2018-08-28 龙迅半导体(合肥)股份有限公司 一种数据时钟恢复电路及其相位插值器
US9876489B1 (en) * 2016-09-07 2018-01-23 Xilinx, Inc. Method of implementing a differential integrating phase interpolator
KR102653891B1 (ko) 2016-11-30 2024-04-02 삼성전자주식회사 지연 클록 신호의 위상을 보간하기 위한 위상 보간기 및 이를 포함하고, 위상이 보간된 클록 신호를 이용하여 데이터 샘플링을 수행하는 장치
CN106502298B (zh) * 2016-12-20 2017-11-14 中国电子科技集团公司第五十八研究所 一种应用于低压相位内插器中电流产生电路
CN109217849B (zh) * 2017-06-30 2020-10-27 华为技术有限公司 一种相位插值器
CN110266293A (zh) * 2019-06-13 2019-09-20 中国科学技术大学 一种低延时同步装置及方法
US11296684B2 (en) * 2020-03-31 2022-04-05 Taiwan Semiconductor Manufacturing Company, Ltd. Gated tri-state inverter, and low power reduced area phase interpolator system including same, and method of operating same
US11171584B1 (en) * 2020-05-11 2021-11-09 Pix Art Imaging Inc. Interpolation circuit and motor driving circuit
US11626865B1 (en) * 2021-09-22 2023-04-11 Qualcomm Incorporated Low-power high-speed CMOS clock generation circuit
TWI806416B (zh) * 2022-02-10 2023-06-21 瑞昱半導體股份有限公司 時脈產生電路與時脈信號產生方法

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JP4342654B2 (ja) 1999-10-12 2009-10-14 富士通マイクロエレクトロニクス株式会社 遅延回路および半導体集積回路
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JP3488180B2 (ja) 2000-05-30 2004-01-19 松下電器産業株式会社 周波数シンセサイザ
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US6943606B2 (en) 2001-06-27 2005-09-13 Intel Corporation Phase interpolator to interpolate between a plurality of clock phases
US7180352B2 (en) 2001-06-28 2007-02-20 Intel Corporation Clock recovery using clock phase interpolator
US6621314B2 (en) 2001-09-25 2003-09-16 Intel Corporation Delay locked loop
KR100418524B1 (ko) * 2001-10-06 2004-02-11 삼성전자주식회사 디지털 제어 내부클럭 발생회로 및 그에 따른 내부클럭발생방법
KR100477809B1 (ko) * 2002-05-21 2005-03-21 주식회사 하이닉스반도체 듀티 사이클 교정이 가능한 디지털 디엘엘 장치 및 듀티사이클 교정 방법
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WO2005002047A1 (en) 2003-06-27 2005-01-06 Cypress Semiconductor Corp. Phase-locked loop and delay-locked loop including differential delay cells having differential control inputs
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US7274236B2 (en) * 2005-04-15 2007-09-25 Micron Technology, Inc. Variable delay line with multiple hierarchy
US7593496B2 (en) 2005-12-27 2009-09-22 Intel Corporation Phase interpolator

Also Published As

Publication number Publication date
WO2007075312A2 (en) 2007-07-05
TWI331452B (en) 2010-10-01
EP1966887B1 (en) 2016-02-17
CN101310440B (zh) 2011-07-27
US20070147564A1 (en) 2007-06-28
EP1966887A2 (en) 2008-09-10
WO2007075312A3 (en) 2008-04-03
US7593496B2 (en) 2009-09-22
CN101310440A (zh) 2008-11-19

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees