TW200742078A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
TW200742078A
TW200742078A TW096108314A TW96108314A TW200742078A TW 200742078 A TW200742078 A TW 200742078A TW 096108314 A TW096108314 A TW 096108314A TW 96108314 A TW96108314 A TW 96108314A TW 200742078 A TW200742078 A TW 200742078A
Authority
TW
Taiwan
Prior art keywords
insulating film
gate electrode
semiconductor device
gate
contact
Prior art date
Application number
TW096108314A
Other languages
English (en)
Inventor
Koji Akiyama
Shintaro Aoyama
Tsuyoshi Takahashi
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of TW200742078A publication Critical patent/TW200742078A/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02181—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing hafnium, e.g. HfO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
    • H01L29/513—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Formation Of Insulating Films (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
TW096108314A 2006-03-10 2007-03-09 Semiconductor device TW200742078A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006066300A JP2007243049A (ja) 2006-03-10 2006-03-10 半導体装置

Publications (1)

Publication Number Publication Date
TW200742078A true TW200742078A (en) 2007-11-01

Family

ID=38509251

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096108314A TW200742078A (en) 2006-03-10 2007-03-09 Semiconductor device

Country Status (3)

Country Link
JP (1) JP2007243049A (zh)
TW (1) TW200742078A (zh)
WO (1) WO2007105413A1 (zh)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102007027765A1 (de) 2007-06-16 2008-12-18 Tuchenhagen Gmbh Doppelsitzventil
WO2013113341A1 (de) 2012-02-03 2013-08-08 Gea Tuchenhagen Gmbh Verfahren zur sitzreinigung eines doppelsitzventils und doppelsitzventil zur durchführung des verfahrens
DE102012003892A1 (de) 2012-02-28 2013-08-29 Gea Tuchenhagen Gmbh Verfahren zur Reinigung eines Ventils
CA2876746C (en) 2012-06-16 2018-01-23 Gea Tuchenhagen Gmbh Double-seat valve with a seat-cleaning function
WO2018012598A1 (ja) * 2016-07-15 2018-01-18 ローム株式会社 半導体装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3688631B2 (ja) * 2001-11-22 2005-08-31 株式会社東芝 半導体装置の製造方法
JP3776889B2 (ja) * 2003-02-07 2006-05-17 株式会社東芝 半導体装置およびその製造方法
WO2005038929A1 (ja) * 2003-10-15 2005-04-28 Nec Corporation 半導体装置の製造方法
JP4526995B2 (ja) * 2004-04-09 2010-08-18 東京エレクトロン株式会社 ゲート絶縁膜の形成方法ならびにコンピュータ読取可能な記憶媒体およびコンピュータプログラム
JP2005317583A (ja) * 2004-04-27 2005-11-10 Renesas Technology Corp 半導体装置およびその製造方法

Also Published As

Publication number Publication date
WO2007105413A1 (ja) 2007-09-20
JP2007243049A (ja) 2007-09-20

Similar Documents

Publication Publication Date Title
JP2011119690A5 (zh)
JP2011029635A5 (ja) 半導体装置
JP2012023352A5 (zh)
TWI373142B (en) Manufacturing method of thin film transistor using oxide semiconductor
JP2013138191A5 (zh)
JP2010219511A5 (ja) 半導体装置
JP2011054949A5 (ja) 半導体装置
JP2010153828A5 (ja) 半導体装置
JP2011228695A5 (zh)
JP2012151460A5 (ja) 半導体装置
JP2010212671A5 (ja) 半導体装置
JP2010212673A5 (ja) 半導体装置
JP2013058770A5 (zh)
JP2010056541A5 (zh)
JP2011222989A5 (ja) 半導体装置
JP2011233876A5 (zh)
JP2011086929A5 (ja) 半導体装置
IN2012DN05057A (zh)
JP2014143410A5 (ja) 半導体装置
JP2011228693A5 (zh)
JP2010170110A5 (ja) 半導体装置
MX2011008993A (es) Ajuste de voltaje umbral a traves de modificacion de pila dielectrica de puerta.
JP2011129899A5 (ja) 半導体装置
JP2011103458A5 (zh)
EP2450955A3 (en) Termination and contact structures for a high voltage GaN-based heterojunction transistor