TW200736629A - Integrated circuit arrangement and design method - Google Patents

Integrated circuit arrangement and design method

Info

Publication number
TW200736629A
TW200736629A TW095141800A TW95141800A TW200736629A TW 200736629 A TW200736629 A TW 200736629A TW 095141800 A TW095141800 A TW 095141800A TW 95141800 A TW95141800 A TW 95141800A TW 200736629 A TW200736629 A TW 200736629A
Authority
TW
Taiwan
Prior art keywords
integrated circuit
compaction
network
test
circuit arrangement
Prior art date
Application number
TW095141800A
Other languages
English (en)
Inventor
Hendrikus Petrus Elisabeth Vranken
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Publication of TW200736629A publication Critical patent/TW200736629A/zh

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31703—Comparison aspects, e.g. signature analysis, comparators
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/3193—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response
    • G01R31/31932—Comparators

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Logic Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
TW095141800A 2005-11-14 2006-11-10 Integrated circuit arrangement and design method TW200736629A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP05110725 2005-11-14

Publications (1)

Publication Number Publication Date
TW200736629A true TW200736629A (en) 2007-10-01

Family

ID=37946470

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095141800A TW200736629A (en) 2005-11-14 2006-11-10 Integrated circuit arrangement and design method

Country Status (8)

Country Link
US (1) US7945828B2 (zh)
EP (1) EP1952168B1 (zh)
JP (1) JP2009516164A (zh)
CN (1) CN101310191B (zh)
AT (1) ATE464572T1 (zh)
DE (1) DE602006013690D1 (zh)
TW (1) TW200736629A (zh)
WO (1) WO2007054845A2 (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI614634B (zh) * 2014-06-19 2018-02-11 新唐科技股份有限公司 偵測錯誤注入的方法與裝置
TWI783555B (zh) * 2021-06-28 2022-11-11 瑞昱半導體股份有限公司 半導體裝置與測試脈衝訊號產生方法

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090150112A1 (en) * 2007-12-05 2009-06-11 Sun Microsystems, Inc. Scan method and system of testing chip having multiple cores
CN104122497B (zh) * 2014-08-11 2016-09-21 中国科学院自动化研究所 集成电路内建自测试所需测试向量的生成电路及方法
CN108872837A (zh) * 2018-08-28 2018-11-23 长鑫存储技术有限公司 数据压缩电路、存储器、集成电路测试装置及测试方法
CN111175635B (zh) * 2019-12-31 2021-12-03 中国电子产品可靠性与环境试验研究所（（工业和信息化部电子第五研究所）（中国赛宝实验室）） 集成电路测试装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7552373B2 (en) * 2002-01-16 2009-06-23 Syntest Technologies, Inc. Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit
US7243110B2 (en) * 2004-02-20 2007-07-10 Sand Technology Inc. Searchable archive
US7308634B2 (en) * 2005-04-01 2007-12-11 Kabushiki Kaisha Toshiba Systems and methods for LBIST testing using multiple functional subphases

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI614634B (zh) * 2014-06-19 2018-02-11 新唐科技股份有限公司 偵測錯誤注入的方法與裝置
TWI783555B (zh) * 2021-06-28 2022-11-11 瑞昱半導體股份有限公司 半導體裝置與測試脈衝訊號產生方法

Also Published As

Publication number Publication date
ATE464572T1 (de) 2010-04-15
JP2009516164A (ja) 2009-04-16
EP1952168B1 (en) 2010-04-14
US20090024893A1 (en) 2009-01-22
WO2007054845A3 (en) 2007-08-02
CN101310191B (zh) 2011-04-20
CN101310191A (zh) 2008-11-19
DE602006013690D1 (de) 2010-05-27
US7945828B2 (en) 2011-05-17
EP1952168A2 (en) 2008-08-06
WO2007054845A2 (en) 2007-05-18

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