TW200731354A - Process method and recording medium - Google Patents

Process method and recording medium

Info

Publication number
TW200731354A
TW200731354A TW095139747A TW95139747A TW200731354A TW 200731354 A TW200731354 A TW 200731354A TW 095139747 A TW095139747 A TW 095139747A TW 95139747 A TW95139747 A TW 95139747A TW 200731354 A TW200731354 A TW 200731354A
Authority
TW
Taiwan
Prior art keywords
layer
oxide film
layer surface
processing method
recording medium
Prior art date
Application number
TW095139747A
Other languages
English (en)
Other versions
TWI328836B (zh
Inventor
Yusuke Muraki
Shigeki Tozawa
Takehiko Orii
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of TW200731354A publication Critical patent/TW200731354A/zh
Application granted granted Critical
Publication of TWI328836B publication Critical patent/TWI328836B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/161Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table including two or more of the elements provided for in group H01L29/16, e.g. alloys
    • H01L29/165Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table including two or more of the elements provided for in group H01L29/16, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02057Cleaning during device manufacture
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66636Lateral single gate silicon transistors with source or drain recessed by etching or first recessed by etching and then refilled
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7834Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with a non-planar structure, e.g. the gate or the source or the drain being non-planar
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7842Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
    • H01L29/7848Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being located in the source/drain region, e.g. SiGe source and drain

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
TW095139747A 2005-10-27 2006-10-27 Process method and recording medium TW200731354A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005312608 2005-10-27

Publications (2)

Publication Number Publication Date
TW200731354A true TW200731354A (en) 2007-08-16
TWI328836B TWI328836B (zh) 2010-08-11

Family

ID=37967622

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095139747A TW200731354A (en) 2005-10-27 2006-10-27 Process method and recording medium

Country Status (4)

Country Link
US (1) US20100216296A1 (zh)
JP (1) JP4762998B2 (zh)
TW (1) TW200731354A (zh)
WO (1) WO2007049510A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI736966B (zh) * 2018-09-13 2021-08-21 日商中央硝子股份有限公司 矽氧化物之蝕刻方法及蝕刻裝置

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102008049733B3 (de) * 2008-09-30 2010-06-17 Advanced Micro Devices, Inc., Sunnyvale Transistor mit eingebettetem Si/Ge-Material mit geringerem Abstand zum Kanalgebiet und Verfahren zur Herstellung des Transistors
US10290553B2 (en) * 2015-06-24 2019-05-14 Tokyo Electron Limited System and method of determining process completion of post heat treatment of a dry etch process
JP6656082B2 (ja) 2016-05-19 2020-03-04 東京エレクトロン株式会社 酸化膜除去方法および除去装置、ならびにコンタクト形成方法およびコンタクト形成システム
JP6956551B2 (ja) 2017-03-08 2021-11-02 東京エレクトロン株式会社 酸化膜除去方法および除去装置、ならびにコンタクト形成方法およびコンタクト形成システム
JP6561093B2 (ja) 2017-07-24 2019-08-14 東京エレクトロン株式会社 シリコン酸化膜を除去する方法
JP7038564B2 (ja) 2018-02-22 2022-03-18 東京エレクトロン株式会社 膜形成方法及び基板処理装置
US11854688B2 (en) 2020-02-19 2023-12-26 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and method
DE102020115279B4 (de) 2020-02-19 2024-08-01 Taiwan Semiconductor Manufacturing Co., Ltd. Verfahren zum ausbilden einer halbleitervorrichtung
JP7414593B2 (ja) * 2020-03-10 2024-01-16 東京エレクトロン株式会社 基板処理方法及び基板処理装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5282925A (en) * 1992-11-09 1994-02-01 International Business Machines Corporation Device and method for accurate etching and removal of thin film
JPH06224513A (ja) * 1993-01-22 1994-08-12 Matsushita Electric Works Ltd 半導体レーザアレイ製造用基板および半導体レーザアレイの製造方法
JPH08195381A (ja) * 1995-01-17 1996-07-30 Fujitsu Ltd 半導体装置の製造方法
US6858532B2 (en) * 2002-12-10 2005-02-22 International Business Machines Corporation Low defect pre-emitter and pre-base oxide etch for bipolar transistors and related tooling
JP4039385B2 (ja) * 2003-04-22 2008-01-30 東京エレクトロン株式会社 ケミカル酸化膜の除去方法
US7611995B2 (en) * 2003-04-22 2009-11-03 Tokyo Electron Limited Method for removing silicon oxide film and processing apparatus
US7166528B2 (en) * 2003-10-10 2007-01-23 Applied Materials, Inc. Methods of selective deposition of heavily doped epitaxial SiGe
JP4495470B2 (ja) * 2004-01-13 2010-07-07 三星電子株式会社 エッチング方法
KR101025323B1 (ko) * 2004-01-13 2011-03-29 가부시키가이샤 아루박 에칭 장치 및 에칭 방법
JP4375619B2 (ja) * 2004-05-26 2009-12-02 富士通マイクロエレクトロニクス株式会社 半導体装置の製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI736966B (zh) * 2018-09-13 2021-08-21 日商中央硝子股份有限公司 矽氧化物之蝕刻方法及蝕刻裝置
TWI828998B (zh) * 2018-09-13 2024-01-11 日商中央硝子股份有限公司 矽氧化物之蝕刻方法及蝕刻裝置

Also Published As

Publication number Publication date
WO2007049510A1 (ja) 2007-05-03
JP4762998B2 (ja) 2011-08-31
US20100216296A1 (en) 2010-08-26
JPWO2007049510A1 (ja) 2009-04-30
TWI328836B (zh) 2010-08-11

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